DG411HS, DG412HS, DG413HS
Vishay Siliconix
Precision Monolithic Quad SPST CMOS Analog Switches
DESCRIPTION
FEATURES
The DG411HS series of monolithic quad analog switches
was designed to provide high speed, low error switching of
precision analog signals. Combining low power (0.35 µW)
with high speed (tON: 68 ns), the DG411HS family is ideally
suited for portable and battery powered industrial and
military applications.
To achieve high-voltage ratings and superior switching
performance, the DG411HS series was built on Vishay
Siliconix’s high voltage silicon gate process. An epitaxial
layer prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks input voltages up to the supply levels when
off.
The DG411HS and DG412HS respond to opposite control
logic as shown in the Truth Table. The DG413HS has two
normally open and two normally closed switches.
•
•
•
•
•
•
•
44 V supply max. rating
± 15 V analog signal range
On-resistance - RDS(on): 25
Fast switching - tON: 68 ns
Ultra low power - PD: 0.35 µW
TTL, CMOS compatible
Single supply capability
Available
Available
BENEFITS
•
•
•
•
Widest dynamic range
Low signal rrrors and distortion
Break-before-make switching action
Simple interfacing
APPLICATIONS
•
•
•
•
•
Precision automatic test equipment
Precision data acquisition
Communication systems
Battery powered systems
Computer peripherals
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG411HS
DG411HS
QFN16
DG411HS
Dual-In-Line and SOIC
LCC
D1 IN1 IN2 D2
IN1
1
16
IN2
16
D1
2
15
D2
S1
3
14
S2
S1
1
V+
V-
2
VGND
S4
4
13
5
12
6
11
VL
S3
D4
7
10
D3
IN4
8
9
IN3
GND
S4
15
14
Key
13
3
4
12
S2
11
V+
10
VL
9
5
Top View
D1 IN1 NC IN2 D2
6
7
S3
3
2
1
20
19
S1
4
18
S2
V-
5
17
V+
NC
6
16
NC
GND
7
15
VL
S4
8
14
S3
8
9
10
11 12
13
D4 IN4 IN3 D3
D4 IN4 NC IN3 D3
Top View
Top View
TRUTH TABLE
Logic
DG411HS
DG412HS
0
ON
OFF
1
OFF
ON
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 72053
S13-1283-Rev. D, 27-May-13
For technical questions, contact: pmostechsupport@vishay.com
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1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG413HS
DG413HS
DG413HS
QFN16
Dual-In-Line and SOIC
LCC
D1 IN1 IN2 D2
Key
IN1
1
16
IN2
D1
2
15
D2
S1
3
14
S2
S1
1
12
S2
V-
4
13
V+
V-
2
11
V+
GND
5
12
VL
GND
3
10
VL
S4
6
11
S3
S4
9
S3
D4
7
10
D3
IN4
8
9
IN3
16
15
14
6
7
3
13
4
5
IN1 NC
2
1
IN2
20
D2
19
S1
4
18
S2
V-
5
17
V+
NC
6
16
NC
GND
7
15
VL
S4
8
14
S3
8
D4 IN4 IN3 D3
Top View
Top View
D1
9
D4
10
11
12
IN4 NC
IN3
13
D3
Top View
TRUTH TABLE
Logic
SW1, SW4
SW2, SW3
0
OFF
ON
1
ON
OFF
ORDERING INFORMATION
Temp. Range
DG411HS, DG412HS
Package
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
16-Pin QFN 4 x 4 mm (Variation 1)
Part Number
DG411HSDJ
DG411HSDJ-E3
DG412HSDJ
DG412HSDJ-E3
DG411HSDY
DG411HSDY-E3
DG411HSDY-T1
DG411HSDY-T1-E3
DG412HSDY
DG412HSDY-E3
DG412HSDY-T1
DG412HSDY-T1-E3
DG411HSDN-T1-E4
DG412HSDN-T1-E4
DG413HS
- 40 °C to 85 °C
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2
16-Pin Plastic DIP
DG413HSDJ
DG413HSDJ-E3
16-Pin Narrow SOIC
DG413HSDY
DG413HSDY-E3
DG413HSDY-T1
DG413HSDY-T1-E3
16-Pin QFN 4 x 4 mm (Variation 1)
DG413HSDN-T1-E4
For technical questions, contact: pmostechsupport@vishay.com
Document Number: 72053
S13-1283-Rev. D, 27-May-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
V+ to V-
Unit
44
GND to V-
25
V
(GND - 0.3) to (V+) + 0.3
VL
(V-) - 2 to (V+) + 2
or 30 mA, whichever occurs first
Digital Inputsa, VS, VD
Continuous Current (Any terminal)
30
Peak Current, S or D (Pulsed 1 ms, 10 % duty cycle)
100
Storage Temperature
Power Dissipation (Package)b
mA
(AK, AZ Suffix)
- 65 to 150
(DJ, DY, DN Suffix)
- 65 to 125
16-Pin Plastic DIPc
470
16-Pin Narrow SOICd
600
16-Pin CerDIPe
900
LCC-20e
900
16-Pin (4 x 4 mm) QFNf
1880
°C
mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mW/°C above 25 °C.
d. Derate 7.6 mW/°C above 75 °C.
e. Derate 12 mW/°C above 75 °C.
f. Derate 23.5 mW/°C above 70 °C.
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Specified
V+ = 15 V, V- = - 15 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
Temp.b
V+ = 13.5 V, V- = - 13.5 V
IS = - 10 mA, VD = ± 8.5 V
Room
Full
25
Room
Full
± 0.1
- 0.25
- 20
0.25
20
- 0.25
-5
0.25
5
Room
Full
± 0.1
- 0.25
- 20
0.25
20
- 0.25
-5
0.25
5
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Typ.c
Min.d
Max.d
Min.d
15
- 15
Max.d
Unit
15
V
35
45
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Switch Off
Leakage Current
VANALOG
RDS(on)
IS(off)
ID(off)
Full
V+ = 16.5 V, V- = - 16.5 V
VD = ± 15.5 mA, VS = ± 15.5 V
- 15
35
45
ID(on)
V+ = 16.5 V, V- = - 16.5 V
VD = VS = ± 15.5 V
Room
Full
± 0.1
- 0.4
- 40
0.4
40
- 0.4
- 10
0.4
10
Input Current, VIN Low
IIL
VIN under test = 0.8 V
Full
0.005
- 0.5
0.5
- 0.5
0.5
Input Current, VIN High
IIH
VIN under test = 2.4 V
Full
0.005
- 0.5
0.5
- 0.5
0.5
Input Capacitancee
CIN
f = 1 MHz
Room
5
Turn-On Time
tON
Room
Full
68
105
127
105
116
Turn-Off Time
tOFF
RL = 300 , CL = 35 pF
VS = ± 10 V, see figure 2
Room
Full
42
80
94
80
90
Channel On
Leakage Current
nA
Digital Control
µA
pF
Dynamic Characteristics
Break-Before-Make
Time Delay
Charge
Injectione
Document Number: 72053
S13-1283-Rev. D, 27-May-13
tD
DG413HS only, VS = 10 V
RL = 300 , CL = 35 pF
Room
20
Q
Vg = 0 V, Rg = 0 , CL = 10 nF
Room
22
For technical questions, contact: pmostechsupport@vishay.com
ns
pC
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Specified
V+ = 15 V, V- = - 15 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
Temp.b
RL = 50 , CL = 5 pF
f = 1 MHz
Room
- 91
Room
- 88
Room
12
f = 1 MHz
Room
12
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
Dynamic Characteristics (Cont’d)
Off Isolatione
OIRR
Channel-to-Channel Crosstalke
XTALK
Source Off Capacitancee
CS(off)
Drain Off Capacitancee
CD(off)
Channel On Capacitancee
CD(on)
Room
30
Positive Supply Current
I+
Room
Full
0.0001
Negative Supply Current
I-
Room
Full
- 0.0001
Logic Supply Current
IL
Room
Full
0.0001
Room
Full
- 0.0001
dB
pF
Power Supplies
Ground Current
V+ = 16.5 V, V- = - 16.5 V
VIN = 0 or 5 V
IGND
1
5
1
5
-1
-5
-1
-5
1
5
1
5
-1
-5
µA
-1
-5
SPECIFICATIONSa (for Unipolar Supplies)
Parameter
Symbol
Test Conditions
Unless Specified
V+ = 12 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
Temp.b
V+ = 10.8 V, IS = - 10 mA
VD = 3 V, 8 V
Room
Full
49
Room
Hot
95
140
180
140
160
Room
Hot
36
70
79
70
74
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
12
12
V
80
100
80
100
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
VANALOG
RDS(on)
Full
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
RL = 300 , CL = 35 pF
VS = 8 V, see figure 2
Break-Before-Make
Time Delay
tD
DG413HS only, VS = 8 V
RL = 300 , CL = 35 pF
Room
60
Charge Injection
Q
Vg = 6 V, Rg = 0 , CL = 1 nF
Room
60
ns
pC
Power Supplies
Positive Supply Current
I+
Room
Hot
0.0001
Negative Supply Current
I-
Room
Hot
- 0.0001
Logic Supply Current
IL
Room
Hot
0.0001
IGND
Room
Hot
- 0.0001
V+ = 13.2 V, VIN = 0 or 5 V
Ground Current
1
5
-1
-5
1
5
-1
-5
1
5
-1
-5
1
5
µA
-1
-5
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 72053
S13-1283-Rev. D, 27-May-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
65
300
55
rDS(on) - Drain-Source On-Resistance (Ω)
rDS(on) - Drain-Source On-Resistance (Ω)
TA = 25 °C
±5V
45
±8V
35
± 10 V
± 12 V
± 15 V
25
15
± 20 V
5
- 20
TA = 25 °C
VL = 5 V
V+ = 3.0 V
VL = 3 V
250
200
V+ = 5.0 V
150
100
V+ = 8.0 V
V+ = 12.0 V
V+ = 15.0 V
50
V+ = 20.0 V
0
- 15
- 10
-5
0
5
10
15
20
0
2
4
6
VD - Drain Voltage (V)
On-Resistance vs. VD and Dual Supply Voltage
IS, ID (pA)
rDS(on) - Drain-Source On-Resistance (Ω)
V+ = + 5 V
V - = - 15 V
VL = 5 V
ID(on)
IS(off)
ID(off)
- 25
- 50
- 75
-10
-5
0
5
10
14
16
18
20
V+ = 15 V
V - = - 15 V
VL = 5 V
40
35
125 °C
30
85 °C
25
25 °C
20
- 55 °C
15
10
5
- 15
15
VD or V S - Drain or Source Voltage (V)
-5
0
5
VD - Drain Voltage (V)
Leakage Current vs. Analog Voltage
On-Resistance vs. VD and Temperature
- 10
10
15
0
75
V+ = 12 V
V- = 0 V
VL = 5 V
65
- 10
0
125 °C
55
85 °C
45
25 °C
35
LOSS
- 20
LOSS, OIRR, XTLAK (dB)
rDS(on) - Drain-Source On-Resistance (Ω)
12
45
0
- 100
- 15
10
On-Resistance vs. VD and Unipolar Supply Voltage
50
25
8
VD - Drain Voltage (V)
- 55 °C
25
- 30
- 40
- 50
XTALK
- 60
- 70
V+ = 15 V
V - = - 15 V
VL = 5 V
RL = 50 Ω
OIRR
- 80
- 90
15
- 100
- 110
5
0
2
4
6
8
10
12
100 K
Document Number: 72053
S13-1283-Rev. D, 27-May-13
10 M
100 M
1G
Frequency (Hz)
VD - Drain Voltage (V)
On-Resistance vs. VD and Temperature
1M
Insertion Loss, Off-Isolation, Crosstalk
vs. Frequency
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
100
100
80
80
60
60
Q - Charge Injection (pC)
Q - Charge Injection (pC)
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
40
V = ± 15 V
20
V = ± 12 V
0
- 20
- 40
40
0
V = ± 12 V
- 20
- 40
- 60
- 60
- 80
- 80
- 100
- 15
- 10
-5
0
5
10
- 100
- 15
15
- 10
-5
0
5
10
V - Drain Voltage (V)
VS - Source Voltage (V)
Charge Injection vs. Analog Voltage
Charge Injection vs. Analog Voltage
140
120
V = ± 15 V
20
15
140
V+ = 15 V
V - = - 15 V
VL = 5 V
V+ = 12 V
V- = 0 V
VL = 5 V
120
TON/TOFF (ns)
TON/TOFF (ns)
tON
100
80
tON
60
80
60
tOFF
tOFF
40
20
- 55
100
40
- 35
- 15
5
25
45
65
85
105
20
- 55
125
- 35
- 15
Temperature (°C)
5
25
45
65
Temperature (°C)
85
105
125
Switching Time vs. Temperature
Switching Time vs. Temperature
100 mA
V+ = 15 V
V - = - 15 V
VL = 5 V
10 mA
= 1 SW
= 4 SW
1 mA
I SUPPLY
I+, I100 µA
10 µA
IL
1 µA
100 nA
10 nA
10
100
1k
10 k
100 k
1M
10 M
f - Frequency (Hz)
Supply Current vs. Input Switching Frequency
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Document Number: 72053
S13-1283-Rev. D, 27-May-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
SCHEMATIC DIAGRAM (Typical Channel)
V+
S
VL
VLevel
Shift/
Drive
VIN
V+
GND
D
V-
Figure 1.
TEST CIRCUITS
+5V
+ 15 V
Logic
Input
tr < 5 ns
tf < 5 ns
3V
50 %
0V
V+
VL
± 10 V
S
tOFF
D
Switch
Input*
VO
VS
VO
90 %
IN
RL
300 Ω
V-
GND
CL
35 pF
90 %
0V
tON
- 15 V
Note:
Logic input waveform is inverted for switches that
have the opposite logic sense control
CL (includes fixture and stray capacitance)
RL
VO = V S
RL + rDS(on)
Figure 2. Switching Time
+5V
+ 15 V
Logic
Input
VL
VS1
V+
S1
D1
VS2
Switch
Output
IN2
RL1
300 Ω
V-
GND
90 %
VO2
D2
S2
50 %
0V
VS1
VO1
VO1
IN1
3V
RL2
300 Ω
CL2
35 pF
CL1
35 pF
Switch
Output
0V
VS2
VO2
0V
90 %
tD
tD
- 15 V
CL (includes fixture and stray capacitance)
Figure 3. Break-Before-Make (DG413HS)
Document Number: 72053
S13-1283-Rev. D, 27-May-13
For technical questions, contact: pmostechsupport@vishay.com
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG411HS, DG412HS, DG413HS
Vishay Siliconix
TEST CIRCUITS
ΔVO
Rg
+5V
+ 15 V
VL
V+
VO
INX
OFF
D
S
IN
Vg
ON
OFF
VO
CL
1 nF
3V
V-
GND
INX
OFF
ON
Q = ΔVO x CL
OFF
-15 V
Figure 4. Charge Injection
+5V
+ 15 V
C
C
VL
V+
D1
S1
VS
Rg = 50 Ω
50 Ω
IN1
0 V, 2.4 V
S2
D2
VO
NC
0 V, 2.4 V
RL
IN2
GND
XTALK Isolation = 20 log
V-
C
VO
- 15 V
VS
C = RF bypass
Figure 5. Crosstalk
+5V
+ 15 V
C
VL
V+
C
VL
Rg = 50 Ω
0 V, 2.4 V
+ 15 V
C
VO
D
S
VS
+5V
C
V+
S
RL
50 Ω
IN
GND
V-
Meter
IN
C
HP4192A
Impedance
Analyzer
or Equivalent
0 V, 2.4 V
D
- 15 V
Off Isolation = 20 log
GND
V-
C
VO
VS
- 15 V
C = RF Bypass
Figure 6. Off-Isolation
Figure 7. Source/Drain Capacitances
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72053.
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For technical questions, contact: pmostechsupport@vishay.com
Document Number: 72053
S13-1283-Rev. D, 27-May-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW):
16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS
16
15
14
13
12
11
10
Dim
A
A1
B
C
D
E
e
H
L
Ĭ
9
E
1
2
3
4
5
6
7
8
INCHES
Min
Max
Min
Max
1.35
1.75
0.053
0.069
0.10
0.20
0.004
0.008
0.38
0.51
0.015
0.020
0.18
0.23
0.007
0.009
9.80
10.00
0.385
0.393
3.80
4.00
0.149
0.157
1.27 BSC
0.050 BSC
5.80
6.20
0.228
0.244
0.50
0.93
0.020
0.037
0_
8_
0_
8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
H
D
C
All Leads
e
Document Number: 71194
02-Jul-01
B
A1
L
Ĭ
0.101 mm
0.004 IN
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Package Information
Vishay Siliconix
PDIP: 16ĆLEAD
16
15
14
13
12
11
10
9
E
E1
1
2
3
4
5
6
7
8
D
S
Q1
A
A1
L
15°
MAX
C
B1
e1
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
Q1
S
B
eA
MILLIMETERS
Min
Max
INCHES
Min
Max
3.81
5.08
0.150
0.200
0.38
1.27
0.015
0.050
0.38
0.51
0.015
0.020
0.89
1.65
0.035
0.065
0.20
0.30
0.008
0.012
18.93
21.33
0.745
0.840
7.62
8.26
0.300
0.325
5.59
7.11
0.220
0.280
2.29
2.79
0.090
0.110
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
1.27
2.03
0.050
0.080
0.38
1.52
.015
0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
Document Number: 71261
06-Jul-01
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1
Package Information
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Vishay Siliconix
QFN 4x4-16L Case Outline
(5)
(4)
VARIATION 1
MILLIMETERS(1)
DIM
VARIATION 2
MILLIMETERS(1)
INCHES
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.75
0.85
0.95
0.029
0.033
0.037
0.75
0.85
0.95
0.029
0.033
0.037
A1
0
-
0.05
0
-
0.002
0
-
0.05
0
-
0.002
0.35
0.010
0.014
0.25
0.35
0.010
2.2
0.079
0.087
2.5
2.7
0.098
A3
b
0.20 ref.
0.25
D
D2
0.30
0.008 ref.
4.00 BSC
2.0
2.1
0.012
0.20 ref.
0.157 BSC
0.083
0.30
4.00 BSC
2.6
e
0.65 BSC
0.026 BSC
0.65 BSC
E
4.00 BSC
0.157 BSC
4.00 BSC
E2
2.0
K
L
2.1
2.2
0.079
0.20 min.
0.5
0.6
0.083
0.087
2.5
0.008 min.
0.7
0.020
0.024
0.008 ref.
2.6
0.3
0.4
0.014
0.157 BSC
0.102
0.106
0.026 BSC
0.157 BSC
2.7
0.098
0.20 min.
0.028
0.012
0.102
0.106
0.008 min.
0.5
0.012
0.016
N(3)
16
16
16
16
Nd(3)
4
4
4
4
Ne(3)
4
4
4
4
0.020
Notes
(1) Use millimeters as the primary measurement.
(2) Dimensioning and tolerances conform to ASME Y14.5M. - 1994.
(3) N is the number of terminals. Nd and Ne is the number of terminals in each D and E site respectively.
(4) Dimensions b applies to plated terminal and is measured between 0.15 mm and 0.30 mm from terminal tip.
(5) The pin 1 identifier must be existed on the top surface of the package by using identification mark or other feature of package body.
(6) Package warpage max. 0.05 mm.
ECN: S13-0893-Rev. B, 22-Apr-13
DWG: 5890
Revision: 22-Apr-13
Document Number: 71921
1
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.372
(9.449)
0.152
0.022
0.050
0.028
(0.559)
(1.270)
(0.711)
(3.861)
0.246
(6.248)
0.047
(1.194)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72608
Revision: 21-Jan-08
Legal Disclaimer Notice
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Disclaimer
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