DG641/642/643
Vishay Siliconix
Low On-Resistance Wideband/Video Switches
Wide Bandwidth: 500 MHz
Low Crosstalk at 5 MHz: –85 dB
Low rDS(on): 5 , DG642
TTL Logic Compatible
Fast Switching: tON 50 ns
Single Supply Compatibility
High Current: 100 mA, DG642
High Precision
Improved Frequency Response
Low Insertion Loss
Improved System Performance
Reduced Board Space
Low Power Consumption
RF and Video Switching
RGB Switching
Video Routing
Cellular Communications
ATE
Radar/FLIR Systems
Satellite Receivers
Programmable Filters
To achieve TTL compatibility, low channel capacitances and
fast switching times, the DG641/642/643 are built on the
Vishay Siliconix proprietary D/CMOS process. Each switch
conducts equally well in both directions when on, and blocks
up to 14 Vp-p when off. An epitaxial layer prevents latchup.
The DG641/642/643 are high performance monolithic video
switches designed for switching wide bandwidth analog and
digital signals. DG641 is a quad SPST, DG642 is a single
SPDT, and DG643 is a dual SPDT function. These devices
have exceptionally low on-resistances (5 typ—DG642), low
capacitance and high current handling capability.
Dual-In-Line and SOIC
Dual-In-Line and SOIC
IN1
1
16 IN2
D1
2
15 D2
S1
3
14 S2
V–
GND
S4
13 V+
4
DG641
12 GND
5
11 S3
6
D4
7
10 D3
IN4
8
9
Dual-In-Line and SOIC
S1
1
8
IN
D1
2
7
V+
V–
3
6
D2
GND
4
5
S2
DG642
Top View
IN3
IN1
1
16
IN2
D1
2
15
D2
GND
3
14
GND
S1
4
13
S2
V–
5
12
V+
S4
6
11
S3
GND
7
10
GND
D4
8
9
D3
Top View
DG643
Top View
Logic
Switch
Logic
SW1
SW2
Logic
SW1, SW2
SW3, SW4
0
OFF
0
OFF
ON
0
OFF
ON
1
ON
1
ON
OFF
1
ON
OFF
Logic “0” 0.8 V
Logic “1” 2.4 V
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
Logic “0” 0.8 V
Logic “1” 2.4 V
Logic “0” 0.8 V
Logic “1” 2.4 V
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4-1
DG641/642/643
Vishay Siliconix
Temp Range
Package
Part Number
DG641
–40 to 85_C
16-Pin Plastic DIP
DG641DJ
16-Pin Narrow SOIC
DG641DY
DG642
–40 to 85_C
8-Pin Plastic DIP
DG642DJ
8-Pin Narrow SOIC
DG642DY
16-Pin Plastic DIP
DG643DJ
16-Pin Narrow SOIC
DG643DY
DG643
–40 to 85_C
85 C
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 125_C
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
Power Dissipation (Package)b
V– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to +0.3 V
8-Pin Plastic DIP and Narrow SOICc . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mW
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –0.3 V to (V+) +0.3 V
or 20 mA, whichever occurs first
16-Pin Plastic DIPd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
16-Pin Narrow SOICe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
VS, VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –0.3 V to (V–) +14 V
or 20 mA, whichever occurs first
Continuous Current (Any Terminal Except S or D) . . . . . . . . . . . . . . . . 20 mA
Continuous Current S or D: DG641/643 . . . . . . . . . . . . . . . . . . . . . . . 75 mA
DG642 . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Current, S or D (Pulsed 1 ms, 10% duty cycle max)
DG641/643 . . . . . . . . . . . . . . . . . . . . . . 200 mA
DG642 . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 7.6 mW/_C above 75_C
d. Derate 6 mW/_C above 75_C
e. Derate 80 mW/_C above 75_C
V+
GND
5V
Reg
S
IN
D
V–
FIGURE 1.
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4-2
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Limits
–40 to 85_C
V+ = 15 V, V– = –3 V
VINH = 2.4 V, VINL = 0.8 Ve
Tempa
Minb
V– = –5 V, V+ = 12 V
Full
–5
8
V– = GND, V+ = 12 V
Full
0
8
Typc
Maxb
Unit
Analog Switch
Analog Signal Rangedd
Drain-Source On-Resistance
rDS(on) Match
VANALOG
rDS(on)
IS = –10 mA,, VD = 0 V
DrDS(on)
Room
Full
8
15
20
Room
1
2
Source Off Leakage Current
IS(off)
VS = 0 V, VD = 10 V
Room
Full
–10
–100
–0.02
10
100
Drain Off Leakage Current
ID(off)
VS = 10 V, VD = 0V
Room
Full
–10
–100
–0.02
10
100
Channel On Leakage Current
ID(on)
VS = VD = 0 V
Room
Full
–10
–100
–0.1
10
100
2.4
V
W
nA
A
Digital Control
Input Voltage High
VINH
Full
Input Voltage Low
VINL
Full
IIN
VIN = GND or V+
Room
Full
On State Input Capacitanced
CS(on)
VS = VD = 0 V
Off State Input Capacitanced
CS(off)
VS = 0 V
Off State Output Capacitanced
CD(off)
BW
Input Current
V
0.8
–1
–20
0.05
1
20
Room
10
20
Room
4
12
VD = 0 V
Room
4
12
RL = 50 W , See Figure 6
Room
500
Room
Full
50
70
140
Room
Full
28
50
85
mA
Dynamic Characteristics
Bandwidth
Turn On Time
tON
Turn Off Time
tOFF
RL = 1 kW,
kW , CL = 35 pF, See Figure 2
Charge Injection
Off Isolation
All Hostile Crosstalk
pF
F
MHz
ns
Q
CL = 1000 pF, VD = 0 V, See Figure 3
Room
–19
OIRR
RIN = 75 W , RL = 75 W , f = 5 MHz
See Figure 4
Room
–60
XTALK(AH)
RIN = 10 W , RL = 75 W , f = 5 MHz
See Figure 5
Room
–87
Room
Full
3.5
pC
dB
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I–
VIN = 0 V or VIN = 5 V
Room
Full
–6
–9
–3
6
9
mA
Notes:
a. Room = 25_C, Full = as determined by the operating temperature suffix.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-3
DG641/642/643
Vishay Siliconix
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Limits
–40 to 85_C
V+ = 15 V, V– = –3 V
VINH = 2.4 V, VINL = 0.8 Ve
Tempa
Minb
V– = –5 V, V+ = 12 V
Full
–5
8
V– = GND, V+ = 12 V
Full
0
8
Typc
Maxb
Unit
Analog Switch
Analog Signal Ranged
Drain-Source On-Resistance
VANALOG
rDS(on)
IS = –10 mA,, VD = 0 V
DrDS(on)
rDS(on) Match
Room
Full
5
8
9
Room
0.5
1
Source Off Leakage Current
IS(off)
VS = 0 V, VD = 10 V
Room
Full
–10
–200
–0.04
10
200
Drain Off Leakage Current
ID(off)
VS = 10 V, VD = 0V
Room
Full
–10
–200
–0.04
10
200
Channel On Leakage Current
ID(on)
VS = VD = 0 V
Room
Full
–10
–200
–0.2
10
200
2.4
V
W
nA
A
Digital Control
Input Voltage High
VINH
Full
Input Voltage Low
VINL
Full
Input Current
IIN
VIN = GND or V+
Room
Full
CS(on)
VS = VD = 0 V
V
0.8
–1
–20
0.05
1
20
Room
19
40
mA
Dynamic Characteristics
On State Input Capacitanced
Off State Input
Capacitanced
CS(off)
VS = 0 V
Room
8
20
CD(off)
VD = 0 V
Room
8
20
Bandwidth
BW
RL = 50 W , See Figure 6
Room
500
Turn On Time
tON
Room
Full
60
100
160
Room
Full
40
60
100
CL = 1000 pF, VD = 0 V, See Figure 3
Room
–40
RIN = 75 W , RL = 75 W , f = 5 MHz
See Figure 4
Room
–63
RIN = 10 W , RL = 75 W , f = 5 MHz
See Figure 5
Room
–85
Room
Full
3.5
Off State Output Capacitanced
RL = 1 kW,
kW , CL = 35 pF, See Figure 2
Turn Off Time
Charge Injection
tOFF
Q
Off Isolation
All Hostile Crosstalk
XTALK(AH)
pF
F
MHz
ns
pC
dB
Power Supplies
Positive Supply Current
I+
VIN = 0 V or VIN = 5 V
Negative Supply Current
I–
Room
Full
–6
–9
–3
6
9
mA
Notes:
a. Room = 25_C, Full = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
www.vishay.com S FaxBack 408-970-5600
4-4
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
_
Supply Current vs. Temperature
Leakages vs. Temperature
100 nA
6
5
10 nA
4
I+
I D(off), I S(off)
Current (mA)
3
2
1
IGND
0
–1
1 nA
100 pA
10 pA
–2
I–
–3
1 pA
–4
–5
–55
–35
–15
5
25
45
65
85 105
0.1 pA
–55
125
25
50
75
Temperature (_C)
Temperature (_C)
DG641/643
rDS(on) vs. Drain Voltage
DG642
rDS(on) vs. Drain Voltage
100
125
9
11
20
r DS(on) – Drain-Source On-Resistance ( )
40
r DS(on) – Drain-Source On-Resistance ( )
0
–25
V+ = 15 V
V– = –3 V
30
125_C
20
25_C
–55_C
10
V+ = 15 V
V– = –3 V
15
125_C
10
25_C
–55_C
5
0
0
–3
–1
1
3
5
7
9
11
–3
VD – Drain Voltage (V)
–1
1
3
5
7
VD – Drain Voltage (V)
On Capacitance
Off Isolation
22
–110
20
–100
–90
18
OIRR (dB)
C (pF)
–80
16
14
DG642
–70
DG641/643
–60
–50
12
DG642
–40
10
–30
DG641/643
8
–20
–10
6
0
2
4
6
(VD) – (V–)
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
8
10
12
1
10
100
f – Frequency (MHz)
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4-5
DG641/642/643
Vishay Siliconix
_
All Hostile Crosstalk
Charge Injection vs. VD
110
0
CL = 1000 pF
100
DG641/643
90
–10
70
Q (pC)
XTALK (dB)
80
DG642
60
DG641/643
–20
50
40
DG642
–30
30
20
10
–40
1
10
100
–3
–2
–1
f – Frequency (MHz)
1
0
3
2
4
5
6
7
8
VD – Drain Voltage (V)
Switching Times vs. Temperature
Operating Supply Voltage Range
20
90
V+ – Positive Supply Voltage (V)
80
70
60
t (ns)
tON
50
40
30
tOFF
20
18
16
Operating
Voltage
Area
14
12
10
0
–55
10
–25
0
25
50
Temperature (_C)
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4-6
75
100
125
0
–1
–2
–3
–4
–5
–6
V– – Negative Supply (V)
Document Number: 70058
S-52433—Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
+15 V
3V
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