IRF540STRL

IRF540S, SiHF540S Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration 100 VGS = 10 V 0.077 72 11 32 Single D D2PAK DESCRIPTION (TO-263) G G D S • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • 175 °C Operating Temperature • Fast Switching • Ease of Paralleling • Compliant to RoHS Directive 2002/95/EC S N-Channel MOSFET Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free SnPb D2PAK (TO-263) SiHF540S-GE3 IRF540SPbF SiHF540S-E3 IRF540S SiHF540S D2PAK (TO-263) SiHF540STRL-GE3a IRF540STRLPbFa SiHF540STL-E3a IRF540STRLa SiHF540STLa D2PAK (TO-263) SiHF540STRR-GE3a IRF540STRRPbFa SiHF540STR-E3a IRF540STRRa SiHF540STRa Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current SYMBOL VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C ID IDM Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e EAS Single Pulse Avalanche Energyb IAR Avalanche Currenta EAR Repetitive Avalanche Energya Maximum Power Dissipation TC = 25 °C PD Maximum Power Dissipation (PCB Mount)e TA = 25 °C c dV/dt Peak Diode Recovery dV/dt Operating Junction and Storage Temperature Range TJ, Tstg Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 °C, L = 440 μH, Rg = 25 , IAS = 28 A (see fig. 12). c. ISD  28 A, dI/dt  170 A/μs, VDD  VDS, TJ  175 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). LIMIT 100 ± 20 28 20 110 1.0 0.025 230 28 15 150 3.7 5.5 - 55 to + 175 300d UNIT V A W/°C mJ A mJ W V/ns °C * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 www.vishay.com 1 IRF540S, SiHF540S Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 62 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VDS VGS = 0 V, ID = 250 μA 100 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.13 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V nA IGSS IDSS VGS = ± 20 V - - ± 100 VDS = 100 V, VGS = 0 V - - 25 VDS = 80 V, VGS = 0 V, TJ = 150 °C - - 250 μA - - 0.077  gfs VDS = 50 V, ID = 17 Ab 8.7 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 1700 - - 560 - - 120 - - - 72 - - 11 RDS(on) ID = 17 Ab VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 10 V ID = 17 A, VDS = 80 V, see fig. 6 and 13b pF nC Gate-Drain Charge Qgd - - 32 Turn-On Delay Time td(on) - 11 - - 44 - - 53 - - 43 - - 4.5 - - 7.5 - - - 28 - - 110 - - 2.5 V - 180 360 ns - 1.3 2.8 μC Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 50 V, ID = 17 A, Rg = 9.1 , RD = 2.9 , see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 28 A, VGS = 0 Vb TJ = 25 °C, IF = 17 A, dI/dt = 100 A/μsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. www.vishay.com 2 Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 IRF540S, SiHF540S Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 102 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 25 °C 101 4.5 V ID, Drain Current (A) ID, Drain Current (A) 102 175 °C 101 20 µs Pulse Width TC = 25 °C 10-1 100 101 4 VDS, Drain-to-Source Voltage (V) 91022_01 20 µs Pulse Width VDS = 50 V 4.5 V 20 µs Pulse Width TC = 175 °C 10-1 91022_02 100 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 175 °C Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 101 VGS Top 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 6 VGS, Gate-to-Source Voltage (V) 91022_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 102 5 91022_04 3.0 ID = 17 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160180 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRF540S, SiHF540S 3000 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 2400 Ciss 1800 1200 Coss 600 Crss ISD, Reverse Drain Current (A) Vishay Siliconix 0 101 25 °C 100 VGS = 0 V 10-1 100 101 0.4 VDS, Drain-to-Source Voltage (V) 91022_05 20 0.8 103 ID, Drain Current (A) VDS = 20 V 12 Operation in this area limited by RDS(on) 5 VDS = 80 V VDS = 50 V 8 2 10 µs 102 5 100 µs 2 1 ms 10 5 4 0 91022_06 10 20 30 40 50 60 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 1 0.1 70 91022_08 10 ms TC = 25 °C TJ = 175 °C Single Pulse 2 For test circuit see figure 13 0 1.6 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 17 A 16 1.2 VSD, Source-to-Drain Voltage (V) 91022_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage VGS, Gate-to-Source Voltage (V) 150 °C 2 5 1 2 5 10 2 5 102 2 5 103 2 5 104 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 IRF540S, SiHF540S Vishay Siliconix RD VDS 30 VGS 25 ID, Drain Current (A) D.U.T. Rg 20 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 15 Fig. 10a - Switching Time Test Circuit 10 5 VDS 0 90 % 25 50 75 100 125 150 175 TC, Case Temperature (°C) 91022_09 10 % VGS Fig. 9 - Maximum Drain Current vs. Case Temperature td(on) td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 D = 0.5 PDM 0.2 0.1 0.1 t1 t2 0.05 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) 0.02 0.01 10-2 10-5 91022_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 www.vishay.com 5 IRF540S, SiHF540S Vishay Siliconix L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V 0.01 Ω tp IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 600 ID 11 A 20 A Bottom 28 A Top 500 400 300 200 100 0 VDD = 25 V 25 91022_12c 50 75 100 125 175 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. QG 10 V 50 kΩ 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 IRF540S, SiHF540S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91022. Document Number: 91022 S10-1442-Rev. C, 05-Jul-10 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1