IRF720
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
•
•
•
•
•
•
TO-220AB
G
G
D
S
S
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
N-Channel MOSFET
PRODUCT SUMMARY
VDS (V)
DESCRIPTION
400 V
RDS(on) (Ω)
VGS = 10 V
1.8
Qg max. (nC)
20
Qgs (nC)
3.3
Qgd (nC)
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
11
Configuration
Dynamic dV/dt rating
Available
Repetitive avalanche rated
Fast switching
Available
Ease of paralleling
Simple drive requirements
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
The TO-220AB package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220AB contribute to its
wide acceptance throughout the industry.
Single
ORDERING INFORMATION
Package
Lead (Pb)-free
TO-220AB
IRF720PbF
Lead (Pb)-free and halogen-free
IRF720PbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-source voltage
VDS
400
V
Gate-source voltage
VGS
± 20
V
VGS at 10 V
Continuous drain current
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
Linear derating factor
3.3
2.1
A
13
0.40
W/°C
Single pulse avalanche energy b
EAS
190
mJ
Repetitive avalanche current a
IAR
3.3
A
EAR
5.0
mJ
PD
50
W
dV/dt
4.0
V/ns
TJ, Tstg
-55 to +150
Repetitive avalanche energy
a
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
Mounting torque
For 10 s
6-32 or M3 screw
300
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V, starting TJ = 25 °C, L = 30 mH, Rg = 25 Ω, IAS = 3.3 A (see fig. 12)
c. ISD ≤ 3.3 A, dI/dt ≤ 65 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91043
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF720
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain)
RthJC
-
2.5
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.51
-
V/°C
Static
Drain-source breakdown voltage
VDS temperature coefficient
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
Gate-source leakage
IGSS
VGS = ± 20
-
-
± 100
nA
Zero gate voltage drain current
IDSS
Gate-source threshold voltage
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
μA
-
-
1.8
Ω
gfs
VDS = 50 V, ID = 2.0 A b
1.7
-
-
S
Input capacitance
Ciss
410
-
Coss
-
120
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
Output capacitance
-
47
-
-
-
20
-
-
3.3
-
-
11
Drain-source on-state resistance
Forward transconductance
RDS(on)
ID = 2.0 A b
VGS = 10 V
Dynamic
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
-
10
-
tr
VDD = 200 V, ID = 3.3 A
Rg = 18 Ω, RD = 56 Ω, see fig. 10 b
-
14
-
-
30
-
-
13
-
f = 1 MHz, open drain
1.2
-
7.3
-
4.5
-
Rise time
Turn-off delay time
td(off)
Fall time
tf
Gate input resistance
Rg
Internal drain inductance
LD
Internal source inductance
LS
VGS = 10 V
ID = 3.3 A,
VDS = 320 V,
see fig. 6 and 13 b
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
Ω
nH
G
-
7.5
-
-
-
3.3
S
-
-
13
TJ = 25 °C, IS = 3.3 A, VGS = 0 V b
-
-
1.6
V
-
270
600
ns
-
1.4
3.0
μC
S
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IF = 3.3 A, dI/dt = 100 A/μs b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91043
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF720
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Vishay Siliconix
ID, Drain Current (A)
101
100
RDS(on), Drain-to-Source On Resistance
(Normalized)
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
10-1
4.5 V
20 µs Pulse Width
TC = 25 °C
10-2
10-1
100
101
VDS, Drain-to-Source Voltage (V)
91043_01
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
4.5 V
10-1
20 µs Pulse Width
TC = 150 °C
10-2
10-1
100
Crss
1
0.1
VDS, Drain-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
ID = 3.3 A
VDS = 320 V
16
VDS = 200 V
VDS = 80 V
12
8
4
VDS = 26.2V
6
7
8
9
VGS, Gate-to-Source Voltage (V)
101
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
200
20
TJ = 150 °C
S21-0853-Rev. D, 16-Aug-2021
Coss
91043_05
TJ = 25 °C
5
400
100
10
4
Ciss
0
Fig. 2 - Typical Output Characteristics, TC = 150 °C
0.01
600
101
VDS, Drain-to-Source Voltage (V)
91043_02
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
800
Capacitance (pF)
ID, Drain Current (A)
100
Fig. 4 - Normalized On-Resistance vs. Temperature
1000
VGS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
91043_04
Fig. 1 - Typical Output Characteristics, TC = 25 °C
101
ID = 3.3 A
VGS = 10 V
For test circuit
see figure 13
0
0
10
91043_06
5
10
15
20
25
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91043
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF720
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Vishay Siliconix
3.5
ISD, Reverse Drain Current (A)
101
ID, Drain Current (A)
3.0
150 °C
100
25 °C
2.5
2.0
1.5
1.0
0.5
VGS = 0 V
10-1
0.0
0.4
0.6
0.8
1.2
1.0
1.4
25
VSD, Source-to-Drain Voltage (V)
91043_07
125
VGS
2
10 µs
D.U.T.
Rg
+
- VDD
5
100 µs
2
1
10 V
1 ms
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
5
10 ms
2
150
RD
VDS
10
ID, Drain Current (A)
100
Fig. 9 - Maximum Drain Current vs. Case Temperature
Operation in this area limited
by RDS(on)
5
75
TC, Case Temperature (°C)
91043_09
Fig. 7 - Typical Source-Drain Diode Forward Voltage
102
50
0.1
Fig. 10a - Switching Time Test Circuit
5
TC = 25 °C
TJ = 150 °C
Single Pulse
2
10-2
2
0.1
5
1
2
5
10
2
VDS
5
102
2
5
103
90 %
VDS, Drain-to-Source Voltage (V)
91043_08
Fig. 8 - Maximum Safe Operating Area
10 %
VGS
td(on)
td(off)
tr
tf
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 − 0.5
0.2
PDM
0.1
0.05
0.1
t1
0.02
0.01
Single Pulse
(Thermal Response)
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-2
10-5
91043_11
S21-0853-Rev. D, 16-Aug-2021
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
Document Number: 91043
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF720
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Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
VDS
Vary tp to obtain
required IAS
Qg
VGS
D.U.T.
Rg
Qgs
+
- VDD
IAS
Qgd
VG
10 V
tp
0.01 Ω
Charge
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
VDS
50 kΩ
tp
12 V
0.2 μF
0.3 μF
VDD
+
D.U.T.
VDS
-
VDS
VGS
3 mA
IAS
IG
ID
Current sampling resistors
Fig. 12b - Unclamped Inductive Waveforms
Fig. 13b - Gate Charge Test Circuit
EAS, Single Pulse Energy (mJ)
500
ID
1.5 A
2.1 A
Bottom 3.3 A
Top
400
300
200
100
0
VDD = 50 V
25
91043_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91043
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF720
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91043.
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91043
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-220-1
A
E
F
D
H(1)
Q
ØP
3
2
L(1)
1
M*
L
b(1)
C
b
e
J(1)
e(1)
MILLIMETERS
DIM.
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.24
4.65
0.167
0.183
b
0.69
1.02
0.027
0.040
b(1)
1.14
1.78
0.045
0.070
c
0.36
0.61
0.014
0.024
D
14.33
15.85
0.564
0.624
E
9.96
10.52
0.392
0.414
e
2.41
2.67
0.095
0.105
e(1)
4.88
5.28
0.192
0.208
F
1.14
1.40
0.045
0.055
H(1)
6.10
6.71
0.240
0.264
J(1)
2.41
2.92
0.095
0.115
L
13.36
14.40
0.526
0.567
L(1)
3.33
4.04
0.131
0.159
ØP
3.53
3.94
0.139
0.155
Q
2.54
3.00
0.100
0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
Document Number: 66542
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 04-Nov-2021
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
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Revision: 01-Jan-2022
1
Document Number: 91000
