IRF740
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
• Dynamic dV/dt rating
TO-220AB
Available
• Repetitive avalanche rated
• Fast switching
G
Available
• Ease of paralleling
• Simple drive requirements
G
D
S
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
S
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
N-Channel MOSFET
PRODUCT SUMMARY
VDS (V)
400
RDS(on) (Ω)
VGS = 10 V
Qg max. (nC)
63
Qgs (nC)
9.0
Qgd (nC)
DESCRIPTION
0.55
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220AB package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220AB contribute to its
wide acceptance throughout the industry.
32
Configuration
Single
ORDERING INFORMATION
Package
TO-220AB
Lead (Pb)-free
IRF740PbF
Lead (Pb)-free and halogen-free
IRF740PbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
400
Gate-source voltage
VGS
± 20
VGS at 10 V
Continuous drain current
Pulsed drain
TC = 25 °C
TC = 100 °C
current a
ID
IDM
Linear derating factor
UNIT
V
10
6.3
A
40
1.0
W/°C
mJ
Single pulse avalanche energy b
EAS
520
Repetitive avalanche current a
IAR
10
A
Repetitive avalanche energy a
EAR
13
mJ
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
Mounting torque
d
For 10 s
6-32 or M3 screw
PD
125
W
dV/dt
4.0
V/ns
TJ, Tstg
-55 to +150
300
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V, starting TJ = 25 °C, L = 9.1 mH, Rg = 25 Ω, IAS = 10 A (see fig. 12)
c. ISD ≤ 10 A, dI/dt ≤ 120 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91054
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain)
RthJC
-
1.0
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
VGS = 0 V, ID = 250 μA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.49
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
Gate-source leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
μA
-
-
0.55
Ω
gfs
VDS = 50 V, ID = 6.0 A b
5.8
-
-
S
Input capacitance
Ciss
1400
-
Coss
-
330
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
Output capacitance
-
120
-
-
-
63
-
-
9.0
Drain-source on-state resistance
Forward transconductance
RDS(on)
ID = 6.0 A b
VGS = 10 V
Dynamic
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
-
-
32
Turn-on delay time
td(on)
-
14
-
tr
VDD = 200 V, ID = 10 A
Rg = 9.1 Ω, RD = 20 Ω, see fig. 10 b
-
27
-
-
50
-
-
24
-
f = 1 MHz, open drain
0.8
-
5.9
-
4.5
-
-
7.5
-
-
-
10
-
-
40
Rise time
Turn-off delay time
td(off)
Fall time
tf
Gate input resistance
Rg
Internal drain inductance
LD
Internal source inductance
LS
VGS = 10 V
ID = 10 A, VDS = 320 V,
see fig. 6 and 13 b
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
Ω
nH
G
S
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current a
Body diode voltage
IS
ISM
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 10 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μs b
-
-
2.0
V
-
370
790
ns
-
3.8
8.2
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91054
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
ID, Drain Current (A)
101
100
4.5 V
20 µs Pulse Width
TC = 25 °C
101
100
10-1
VDS, Drain-to-Source Voltage (V)
91054_01
3.0
RDS(on), Drain-to-Source On Resistance
(Normalized)
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
ID = 10 A
VGS = 10 V
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
TJ, Junction Temperature (°C)
91054_04
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
2500
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Top
2000
4.5 V
100
Capacitance (pF)
ID, Drain Current (A)
101
20 40 60 80 100 120 140 160
1500
Ciss
1000
Coss
500
Crss
20 µs Pulse Width
TC = 150 °C
10-1
100
VDS, Drain-to-Source Voltage (V)
91054_02
0
101
100
VDS, Drain-to-Source Voltage (V)
91054_05
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
ID, Drain Current (A)
101
25 °C
100
20 µs Pulse Width
VDS = 50 V
VGS, Gate-to-Source Voltage (V)
20
150 °C
91054_03
5
6
7
8
9
VDS = 320 V
VDS = 200 V
Fig. 3 - Typical Transfer Characteristics
S21-0853-Rev. D, 16-Aug-2021
VDS = 80 V
12
8
4
For test circuit
see figure 13
0
0
10
VGS, Gate-to-Source Voltage (V)
ID = 10 A
16
10-1
4
101
91054_06
15
30
45
60
75
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage
Document Number: 91054
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740
www.vishay.com
Vishay Siliconix
ISD, Reverse Drain Current (A)
10
150 °C
ID, Drain Current (A)
101
25 °C
100
8
6
4
2
VGS = 0 V
10-1
0.50
0.70
0.90
1.10
0
25
1.50
1.30
VSD, Source-to-Drain Voltage (V)
91054_07
50
100
150
Fig. 9 - Maximum Drain Current vs. Case Temperature
103
RD
VDS
5
Operation in this area limited
by RDS(on)
2
125
TC, Case Temperature (°C)
91054_09
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID, Drain Current (A)
75
VGS
102
D.U.T.
RG
+
- VDD
5
10 µs
2
10
10 V
100 µs
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
5
1 ms
2
1
10 ms
5
2
0.1
0.1
91054_08
Fig. 10a - Switching Time Test Circuit
TC = 25 °C
TJ = 150 °C
Single Pulse
2
5
1
2
5
10
2
5
102
2
5
VDS
103
90 %
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
10 %
VGS
td(on)
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 - 0.5
PDM
0.2
0.1
0.1
t1
0.05
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
0.02
0.01
10-2
10-5
91054_11
S21-0853-Rev. D, 16-Aug-2021
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (S)
Document Number: 91054
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740
www.vishay.com
Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
VDS
10 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
EAS, Single Pulse Energy (mJ)
1200
ID
4.5 A
5.3 A
Bottom 10 A
Top
1000
800
600
400
200
0
VDD = 50 V
25
91054_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
S21-0853-Rev. D, 16-Aug-2021
Fig. 13b - Gate Charge Test Circuit
Document Number: 91054
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF740
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
•
•
•
•
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91054.
S21-0853-Rev. D, 16-Aug-2021
Document Number: 91054
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Revision: 01-Jan-2023
1
Document Number: 91000
