IRF830A
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Vishay Siliconix
Power MOSFET
FEATURES
D
• Low gate charge Qg results in simple drive
Available
requirement
• Improved gate, avalanche and dynamic dV/dt
Available
ruggedness
• Fully characterized capacitance and avalanche
voltage and current
• Effective Coss specified
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
TO-220AB
G
G
D
S
S
N-Channel MOSFET
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
500
VGS = 10 V
Qg max. (nC)
24
Qgs (nC)
6.3
Qgd (nC)
APPLICATIONS
1.4
• Switch mode power supply (SMPS)
• Uninterruptable power supply
• High speed power Switching
11
Configuration
TYPICAL SMPS TOPOLOGIES
Single
• Two transistor forward
• Half bridge
• Full bridge
ORDERING INFORMATION
Package
TO-220AB
Lead (Pb)-free
IRF830APbF
Lead (Pb)-free and halogen-free
IRF830APbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
500
Gate-source voltage
VGS
± 30
VGS at 10 V
Continuous drain current
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
Linear derating factor
Single pulse avalanche energy
b
UNIT
V
5.0
3.2
A
20
0.59
W/°C
mJ
EAS
230
Repetitive avalanche current a
IAR
5.0
A
Repetitive avalanche energy a
EAR
7.4
mJ
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
Mounting torque
For 10 s
6-32 or M3 screw
PD
74
W
dV/dt
5.3
V/ns
TJ, Tstg
-55 to +150
300
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Starting TJ = 25 °C, L = 18 mH, Rg = 25 Ω, IAS = 5.0 A (see fig. 12)
c. ISD ≤ 5.0 A, dI/dt ≤ 370 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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IRF830A
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain)
RthJC
-
1.7
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
VGS = 0 V, ID = 250 μA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.60
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.5
V
Gate-source leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
μA
-
-
1.4
Ω
gfs
VDS = 50 V, ID = 3.0 A b
2.8
-
-
S
Input capacitance
Ciss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
620
-
-
93
-
-
4.3
-
Drain-source on-state resistance
Forward transconductance
RDS(on)
ID = 3.0 A b
VGS = 10 V
Dynamic
Output capacitance
Coss
Reverse Transfer capacitance
Crss
Output capacitance
Coss
VGS = 0 V; VDS = 1.0 V, f = 1.0 MHz
Coss
VGS = 0 V; VDS = 400 V, f = 1.0 MHz
27
Coss eff.
VGS = 0 V; VDS = 0 V to 400 V c
39
Output capacitance
Effective output capacitance
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Rise time
Turn-off delay time
tr
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
ID = 5.0 A, VDS = 400 V,
see fig. 6 and 13 b
886
-
-
24
-
-
6.3
-
-
11
-
10
-
VDD = 250 V, ID = 5.0 A,
Rg = 14 Ω, RD = 49 Ω, see fig. 10 b
-
21
-
-
21
-
-
15
-
f = 1 MHz, open drain
1.7
-
10.7
-
-
5.0
-
-
20
pF
nC
ns
Ω
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 5.0 A, VGS = 0 V b
TJ = 25 °C, IF = 5.0 A, dI/dt = 100 A/μs b
-
-
1.5
V
-
430
650
ns
-
1.62
2.4
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF830A
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF830A
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Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
Fig. 7 - Typical Source-Drain Diode Forward Voltage
10 %
VGS
td(on)
tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs. Case Temperature
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF830A
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Vishay Siliconix
Thermal Response (ZthJC)
10
1
D = 0.50
0.20
PDM
0.10
0.1
0.05
t1
t2
0.02
0.01
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
10-2
10-5
10-4
10-3
10-2
0.1
1
t1, Rectangular Pulse Duration (s)
91061_11
15 V
Driver
L
VDS
D.U.T.
RG
+
A
- VDD
IAS
20 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
EAS, Single Pulse Avalanche Energy (mJ)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
500
ID
2.2 A
3.2 A
Bottom 5.0 A
Top
400
300
200
100
0
25
VDS
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
91061_12c
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
tp
QG
10 V
QGS
IAS
QGD
VG
Fig. 12b - Unclamped Inductive Waveforms
Charge
Fig. 12d - Basic Gate Charge Waveform
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF830A
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Vishay Siliconix
VDSav, Avalanche Voltage (V)
790
785
780
775
770
0.0
1.0
2.0
3.0
4.0
5.0
IAV, Avalanche Current (A)
91061_12d
Fig. 13a - Typical Drain-to-Source Voltage vs.
Avalanche Current
Current regulator
Same type as D.U.T.
50 kΩ
12 V
0.2 µF
0.3 µF
+
D.U.T.
-
VDS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF830A
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Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91061.
S21-0852-Rev. D, 16-Aug-2021
Document Number: 91061
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Package Information
www.vishay.com
Vishay Siliconix
TO-220-1
A
E
F
D
H(1)
Q
ØP
3
2
L(1)
1
M*
L
b(1)
C
b
e
J(1)
e(1)
MILLIMETERS
DIM.
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.24
4.65
0.167
0.183
b
0.69
1.02
0.027
0.040
b(1)
1.14
1.78
0.045
0.070
c
0.36
0.61
0.014
0.024
D
14.33
15.85
0.564
0.624
E
9.96
10.52
0.392
0.414
e
2.41
2.67
0.095
0.105
e(1)
4.88
5.28
0.192
0.208
F
1.14
1.40
0.045
0.055
H(1)
6.10
6.71
0.240
0.264
J(1)
2.41
2.92
0.095
0.115
L
13.36
14.40
0.526
0.567
L(1)
3.33
4.04
0.131
0.159
ØP
3.53
3.94
0.139
0.155
Q
2.54
3.00
0.100
0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
Document Number: 66542
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 04-Nov-2021
Legal Disclaimer Notice
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Vishay
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Revision: 01-Jan-2022
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Document Number: 91000