IRF9620S, SiHF9620S
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Vishay Siliconix
Power MOSFET
FEATURES
S
•
•
•
•
•
•
•
•
D2PAK (TO-263)
G
G D
S
D
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
P-Channel MOSFET
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
DESCRIPTION
-200
VGS = -10 V
Qg max. (nC)
22
12
Qgd (nC)
10
Configuration
The power MOSFETs technology is the key to Vishay’s
advanced line of Power MOSFET transistors. The efficient
geometry and unique processing of the Power MOSFETs
design achieve very low on-state resistance combined with
high transconductance and extreme device ruggedness.
The D2PAK (TO-263) is a surface-mount power package
capable of accommodating die sizes up to HEX-4. It
provides the highest power capability and the lowest
possible on-resistance in any existing surface-mount
package. The D2PAK (TO-263) is suitable for high current
applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface
mount application.
1.5
Qgs (nC)
Surface-mount
Available in tape and reel
Dynamic dV/dt rating
P-channel
Available
Fast switching
Ease of paralleling
Available
Simple drive requirements
Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
Single
ORDERING INFORMATION
Package
D2PAK (TO-263)
D2PAK (TO-263)
Lead (Pb)-free and Halogen-free
SiHF9620S-GE3
SiHF9620STRL-GE3 a
Lead (Pb)-free
IRF9620SPbF
IRF9620STRLPbF a
Note
a. See device orientation
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
-200
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
VGS at -10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Current a
ID
IDM
-2.0
0.32
0.025
ILM
TC = 25 °C
Maximum Power Dissipation (PCB mount) e
TA = 25 °C
Peak Diode Recovery dV/dt c
Operating Junction and Storage Temperature Range
For 10 s
Soldering Recommendations (Peak temperature) d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5)
b. Not Applicabl
c. ISD ≤ -3.5 A, dI/dt ≤ 95 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
e. When mounted on 1” square PCB (FR-4 or G-10 material)
S21-0904-Rev. D, 30-Aug-2021
PD
A
-14
Linear Derating Factor
Maximum Power Dissipation
V
-3.5
Linear Derating Factor (PCB mount) e
Inductive Current, Clamp
UNIT
-14
40
3.0
dV/dt
-5.0
TJ, Tstg
-55 to +150
300
W/°C
A
W
V/ns
°C
Document Number: 91083
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9620S, SiHF9620S
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
-
62
Maximum Junction-to-Ambient
(PCB mount) a
RthJA
-
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
-
3.1
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material)
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0, ID = -250 μA
-200
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = -1 mA
-
-0.22
-
V/°C
VGS(th)
VDS = VGS, ID = -250 μA
-2.0
-
-4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = -200 V, VGS = 0 V
-
-
-100
VDS = -160 V, VGS = 0 V, TJ = 125 °C
-
-
-500
Drain-Source On-State Resistance
Forward Transconductance
μA
-
-
1.5
Ω
gfs
VDS = -50 V, ID = -1.5 A
1.0
-
-
S
VGS = 0 V,
VDS = -25 V,
f = 1.0 MHz, see fig. 10
-
350
-
-
100
-
-
30
-
-
-
22
-
-
12
RDS(on)
ID = -1.5 A b
VGS = -10 V
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
-
-
10
Turn-On Delay Time
td(on)
-
15
-
Rise Time
Turn-Off Delay Time
tr
td(off)
Fall Time
tf
Gate Input Resistance
Rg
Internal Drain Inductance
LD
Internal Source Inductance
LS
VGS = -10 V
ID = -4.0 A, VDS = -160 V,
see fig. 11 and 18 b
pF
nC
VDD = -100 V, ID = -1.5 A,
RG = 50 Ω, RD = 67 Ω, see fig. 17 b
-
25
-
-
20
-
-
15
-
f = 1 MHz, open drain
0.9
-
5.7
-
4.5
-
-
7.5
-
-
-
-3.5
S
-
-
-14
TJ = 25 °C, IS = -3.5 A, VGS = 0 V b
-
-
-7.0
V
-
300
450
ns
-
1.9
2.9
nC
Between lead,
6 mm (0.25") from
package and center of
die contact
ns
Ω
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Current a
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IF = -3.5 A, dI/dt = 100 A/μs b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91083
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9620S, SiHF9620S
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
-5
-5
80 µs Pulse Test
VGS = - 10, - 9, - 8, - 7 V
ID, Drain Current (A)
ID, Drain Current (A)
-4
-6V
-3
-2
-5V
VGS = - 10, - 9, - 8, - 7 V
-4
-3
-6V
-2
-5V
-1
-1
80 µs Pulse Test
-4V
-4V
0
0
- 20
- 10
0
- 30
- 40
- 50
VDS, Drain-to-Source Voltage (V)
91083_01
Negative ID, Drain Current (A)
ID, Drain Current (A)
102
TJ = 25 °C
TJ = 125 °C
-3
-2
-1
80 µs Pulse Test
VDS > ID(on) x RDS(on) max.
0
-2
-4
-6
-8
10
100 µs
5
1 ms
2
1
10 ms
5
TC = 25 °C
TJ = 150 °C
Single Pulse
2
2
1
5
10
2
5
102
2
5
103
Negative VDS, Drain-to-Source Voltage (V)
91083_04
Fig. 2 - Typical Transfer Characteristics
ZthJC(t)/RthJC, Normalized Effective Transient
Thermal Impedence (Per Unit)
-5
2
- 10
VGS, Gate-to-Source Voltage (V)
91083_02
-4
Operation in this area limited
by RDS(on)
5
0.1
0
-3
Fig. 3 - Typical Saturation Characteristics
TJ = - 55 °C
-4
-2
VDS, Drain-to-Source Voltage (V)
91083_03
Fig. 1 - Typical Output Characteristics
-5
-1
0
Fig. 4 - Maximum Safe Operating Area
2.0
1.0
0.5
0.2
0.1
D = 0.5
PDM
0.2
0.1
t1
0.05
0.05
t2
0.02
0.01
Single Pulse (Transient
Thermal Impedence)
0.02
0.01
10-5
Notes:
1. Duty Factor, D = t1/t2
2. Per Unit Base = RthJC = 3.12 °C/W
3. TJM - TC = PDM ZthJC(t)
2
5
10-4
2
5
10-3
2
5
10-2
2
5
0.1
2
5
1.0
2
5
10
t1, Square Wave Pulse Duration (s)
91083_05
Fig. 5 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91083
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9620S, SiHF9620S
www.vishay.com
RDS(on), Drain-to-Source On Resistance
(Normalized)
Vishay Siliconix
4.0
gfs,Transconductance (S)
80 µs Pulse Test
VDS > ID(on) x RDS(on) max.
3.2
TJ = - 55 °C
2.4
TJ = 25 °C
TJ = 125 °C
1.6
0.8
0.0
0
-1
-2
-3
-4
-5
ID, Drain Current (A)
91083_06
ID = - 1.0 A
VGS = - 10 V
2.0
1.5
1.0
0.5
0.0
- 40
0
40
80
120
160
TJ, Junction Temperature (°C)
91083_09
Fig. 9 - Normalized On-Resistance vs. Temperature
Fig. 6 - Typical Transconductance vs. Drain Current
500
- 20
IDR, Reverse Drain Current (A)
2.5
- 10
Ciss
C, Capacitance (pF)
400
-5
-2
TJ = 150 °C
- 1.0
TJ = 25 °C
- 0.5
300
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
C ,C
Coss = Cds + gs gd
Cgs + Cgd
Coss
200
≈ Cgs + Cgd
Crss
100
- 0.2
0
- 3.2
- 4.4
- 5.6
- 6.8
VSD, Source-to-Drain Voltage (V)
91083_07
BVDSS, Drain-to-Source Breakdown
Voltage (Normalized)
1.25
1.15
1.05
0.95
0.85
91083_08
0
40
80
120
160
TJ, Junction Temperature (°C)
Fig. 8 - Breakdown Voltage vs. Temperature
S21-0904-Rev. D, 30-Aug-2021
- 20
- 30
- 40
- 50
VDS, Drain-to-Source Voltage (V)
91083_10
Fig. 7 - Typical Source-Drain Diode Forward Voltage
0.75
- 40
- 10
0
- 8.0
Fig. 10 - Typical Capacitance vs. Drain-to-Source Voltage
Negative VGS, Gate-to-Source Voltage (V)
- 0.1
- 2.0
91083_11
20
ID = - 3.5 A
VDS = - 100 V
VDS = - 60 V
16
VDS = - 40 V
12
8
4
For test circuit
see figure 18
0
0
4
8
12
16
20
QG, Total Gate Charge (nC)
Fig. 11 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91083
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9620S, SiHF9620S
www.vishay.com
RDS(on), Drain-to-Source
On Resistance (Ω)
5
Vishay Siliconix
L
RDS(on) measured with current
pulse of 2.0 µs duration. Initial
TJ = 25 °C. (Heating effect of
2.0 µs pulse is minimal.)
4
Vary tp to obtain
required IL
VGS = - 10 V
3
VGS = - 10 V
VDS
V DD
+
D.U.T.
tp
-
EC
0.05 Ω
IL
2
VDD = 0.5 VDS
VGS = - 20 V
EC = 0.75 VDS
Fig. 15 - Clamped Inductive Test Circuit
1
0
0
-4
-8
- 12
- 16
VDD
- 20
ID, Drain Current (A)
91083_12
IL
Fig. 12 - Typical On-Resistance vs. Drain Current
tp
3.5
VDS
Negative ID, Drain Current (A)
EC
3.0
Fig. 16 - Clamped Inductive Waveforms
2.5
RD
2.0
VDS
1.5
VGS
D.U.T.
RG
1.0
0.5
+VDD
- 10 V
0.0
25
50
75
100
125
150
TC, Case Temperature (°C)
91083_13
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 17a - Switching Time Test Circuit
Fig. 13 - Maximum Drain Current vs. Case Temperature
PD, Power Dissipation (W)
td(on)
40
VGS
35
10 %
tr
td(off) tf
30
25
20
90 %
VDS
15
Fig. 17b - Switching Time Waveforms
10
5
0
0
91083_14
20
40
60
80
100
120
140
TC, Case Temperature (°C)
Fig. 14 - Power vs. Temperature Derating Curve
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91083
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9620S, SiHF9620S
www.vishay.com
Vishay Siliconix
Current regulator
Same type as D.U.T.
50 kΩ
QG
- 10 V
0.2 µF
12 V
0.3 µF
QGS
-
QGD
D.U.T.
VG
+ VDS
VGS
- 3 mA
Charge
IG
ID
Current sampling resistors
Fig. 18a - Basic Gate Charge Waveform
Fig. 18b - Gate Charge Test Circuit
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 19 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91083.
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91083
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
(Datum A)
3
A
4
4
L1
B
A
E
c2
H
Gauge
plane
4
0° to 8°
5
D
B
Detail A
Seating plane
H
1
2
C
3
C
L
L3
L4
Detail “A”
Rotated 90° CW
scale 8:1
L2
B
A1
B
A
2 x b2
c
2xb
E
0.010 M A M B
± 0.004 M B
2xe
Plating
5
b1, b3
Base
metal
c1
(c)
D1
4
5
(b, b2)
Lead tip
MILLIMETERS
DIM.
MIN.
MAX.
View A - A
INCHES
MIN.
4
E1
Section B - B and C - C
Scale: none
MILLIMETERS
MAX.
DIM.
MIN.
INCHES
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D1
6.86
-
0.270
-
A1
0.00
0.25
0.000
0.010
E
9.65
10.67
0.380
0.420
6.22
-
0.245
-
b
0.51
0.99
0.020
0.039
E1
b1
0.51
0.89
0.020
0.035
e
b2
1.14
1.78
0.045
0.070
H
14.61
15.88
0.575
0.625
b3
1.14
1.73
0.045
0.068
L
1.78
2.79
0.070
0.110
2.54 BSC
0.100 BSC
c
0.38
0.74
0.015
0.029
L1
-
1.65
-
0.066
c1
0.38
0.58
0.015
0.023
L2
-
1.78
-
0.070
c2
1.14
1.65
0.045
0.065
L3
D
8.38
9.65
0.330
0.380
L4
0.25 BSC
4.78
5.28
0.010 BSC
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
www.vishay.com
1
AN826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead
0.420
0.355
0.635
(16.129)
(9.017)
(10.668)
0.145
(3.683)
0.135
(3.429)
0.200
0.050
(5.080)
(1.257)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 73397
11-Apr-05
www.vishay.com
1
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.
Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and
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Revision: 01-Jan-2022
1
Document Number: 91000
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