IRFB18N50K
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
• Low gate charge Qg results in simple drive
requirement
TO-220AB
• Improved gate, avalanche, and dynamic dV/dt
ruggedness
G
G
D
Available
• Fully characterized capacitance and avalanche
voltage and current
S
• Low RDS(on)
S
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
N-Channel MOSFET
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
VDS (V)
500
RDS(on) (Ω)
Available
VGS = 10 V
0.26
Qg max. (nC)
120
Qgs (nC)
34
Qgd (nC)
54
Configuration
APPLICATIONS
• Switch mode power supply (SMPS)
• Uninterruptible power supply
Single
• High speed power switching
• Hard switched and high frequency circuits
ORDERING INFORMATION
Package
TO-220
Lead (Pb)-free
IRFB18N50KPbF
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
500
Gate-source voltage
VGS
± 30
Continuous drain current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
UNIT
V
17
11
A
IDM
68
1.8
W/°C
EAS
370
mJ
current a
IAR
17
A
Repetitive avalanche energy a
EAR
22
mJ
Linear derating factor
Single pulse avalanche energy b
Repetitive avalanche
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
Mounting torque
PD
220
W
dV/dt
7.8
V/ns
TJ, Tstg
-55 to +150
For 10 s
300
6-32 or M3 screw
10
°C
N
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. Starting TJ = 25 °C, L = 2.5 mH, RG = 25 Ω, IAS = 17 A
c. ISD ≤ 17 A, dI/dt ≤ 376 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S21-0340-Rev. B, 12-Apr-2021
Document Number: 91100
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IRFB18N50K
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient a
RthJA
-
58
Case-to-sink, flat, greased surface
RthCS
0.50
-
Maximum junction-to-case (drain) a
RthJC
-
0.56
UNIT
°C/W
Note
a. Rth is measured at TJ approximately 90 °C
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
VGS = 0 V, ID = 250 μA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.59
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
3.0
-
5.0
V
Gate-source leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 500 V, VGS = 0 V
-
-
50
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
μA
-
0.26
0.29
Ω
gfs
VDS = 50 V, ID = 10 A
6.4
-
-
S
Input capacitance
Ciss
-
2830
-
Output capacitance
Coss
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
Output capacitance
Coss
Drain-source on-state resistance
Forward transconductance
RDS(on)
ID = 10 A b
VGS = 10 V
Dynamic
Effective output capacitance
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Turn-off delay time
VGS = 0 V
Coss eff.
Total gate charge
Rise time
VDS = 1.0 V, f = 1.0 MHz
tr
td(off)
Fall time
tf
Gate input resistance
Rg
-
330
-
-
38
-
-
3310
-
VDS = 400 V, f = 1.0 MHz
-
93
-
VDS = 0 V to 400 V c
-
155
-
-
-
120
-
-
34
-
-
54
-
22
-
-
60
-
-
45
-
ID = 17 A, VDS = 400 V,
see fig. 6 and 13 b
VGS = 10 V
VDD = 250 V, ID = 17 A,
RG = 7.5 Ω, see fig. 10 b
f = 1 MHz, open drain
-
30
-
0.7
-
2.7
-
-
17
-
-
68
pF
nC
ns
Ω
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current a
Body diode voltage
IS
ISM
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 17 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 17 A, dI/dt = 100 A/μs b
-
-
1.5
V
-
520
780
ns
-
5.3
8.0
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
c. Coss eff. is a fixed capacitance that givs the same charging time as Coss while VDS is rising from 0 % to 80 % VDS
S21-0340-Rev. B, 12-Apr-2021
Document Number: 91100
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFB18N50K
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Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100.00
10
1
VGS
TOP
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
0.1
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
5.0V
0.01
TJ = 150°C
10.00
1.00
TJ = 25°C
0.10
20µs PULSE WIDTH
Tj = 25°C
VDS = 100V
20µs PULSE WIDTH
0.01
0.001
0.1
1
10
5.0
100
VDS, Drain-to-Source Voltage (V)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig. 1 - Typical Output Characteristics
100
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
ID, Drain-to-Source Current (A)
TOP
10
5.0V
1
0.1
20µs PULSE WIDTH
Tj = 150°C
0.01
0.1
1
10
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
S21-0340-Rev. B, 12-Apr-2021
6.0
7.0
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
100
3.0
ID = 17A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160
TJ , Junction Temperature ( ° C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91100
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IRFB18N50K
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VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
1000
Coss
100
ISD , Reverse Drain Current (A)
100
100000
C, Capacitance(pF)
Vishay Siliconix
TJ = 150 ° C
10
TJ = 25 ° C
1
Crss
10
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
ID = 17A
16
V GS = 0 V
0.5
0.8
1.1
1.4
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
V DS= 400V
V DS= 250V
V DS= 100V
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
ID , Drain Current (A)
VGS , Gate-to-Source Voltage (V)
20
0.1
0.2
12
8
10us
100us
10
1ms
10ms
1
4
0
0
30
60
90
120
150
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S21-0340-Rev. B, 12-Apr-2021
0.1
TC = 25 °C
TJ = 150 °C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91100
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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IRFB18N50K
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Vishay Siliconix
RD
VDS
20
VGS
D.U.T.
ID , Drain Current (A)
RG
+
- VDD
15
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
10
Fig. 10a - Switching Time Test Circuit
VDS
5
90 %
0
25
50
75
100
125
150
10 %
VGS
TC , Case Temperature ( °C)
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response(Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
Notes:
1. Duty factor D =t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S21-0340-Rev. B, 12-Apr-2021
Document Number: 91100
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFB18N50K
www.vishay.com
Vishay Siliconix
VDS
15 V
tp
Driver
L
VDS
D.U.T.
RG
+
A
- VDD
IAS
20 V
tp
IAS
0.01 Ω
EAS , Single Pulse Avalanche Energy (mJ)
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
750
ID
7.6A
11A
BOTTOM 17A
TOP
600
450
300
150
0
25
50
75
100
125
150
Starting T J, Junction Temperature ( ° C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
S21-0340-Rev. B, 12-Apr-2021
Fig. 13b - Gate Charge Test Circuit
Document Number: 91100
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFB18N50K
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Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91100.
S21-0340-Rev. B, 12-Apr-2021
Document Number: 91100
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Package Information
www.vishay.com
Vishay Siliconix
TO-220-1
A
E
F
D
H(1)
Q
ØP
3
2
L(1)
1
M*
L
b(1)
C
b
e
J(1)
e(1)
MILLIMETERS
DIM.
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.24
4.65
0.167
0.183
b
0.69
1.02
0.027
0.040
b(1)
1.14
1.78
0.045
0.070
c
0.36
0.61
0.014
0.024
D
14.33
15.85
0.564
0.624
E
9.96
10.52
0.392
0.414
e
2.41
2.67
0.095
0.105
e(1)
4.88
5.28
0.192
0.208
F
1.14
1.40
0.045
0.055
H(1)
6.10
6.71
0.240
0.264
J(1)
2.41
2.92
0.095
0.115
L
13.36
14.40
0.526
0.567
L(1)
3.33
4.04
0.131
0.159
ØP
3.53
3.94
0.139
0.155
Q
2.54
3.00
0.100
0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
Document Number: 66542
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 04-Nov-2021
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Revision: 01-Jan-2022
1
Document Number: 91000