IRFD113

IRFD113 www.vishay.com Vishay Siliconix Power MOSFET FEATURES D • For automatic insertion HVMDIP • Compact plastic package • End stackable G S • Fast switching • Low drive current G • Easily paralleled S D • Excellent temperature stability N-Channel MOSFET • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 PRODUCT SUMMARY VDS (V) RDS(on) (Ω) DESCRIPTION 60 VGS = 10 V Qg (Max.) (nC) 7 Qgs (nC) 2 Qgd (nC) 7 Configuration The HVMDIP technology is the key to Vishay’s advanced line of power MOSFET transistors. The efficient geometry and unique processing of the HVMDIP design achieves very low on-state resistance combined with high transconductance and extreme device ruggedness. HVMDIPs feature all of the established advantages of MOSFETs such as voltage control, very fast switching, ease of paralleling, and temperature stability of the electrical parameters. 0.8 Single The HVMDIP 4 pin, dual-in-line package brings the advantages of HVMDIPs to high volume applications where automatic PC board insertion is desireable, such as circuit boards for computers, printers, telecommunications equipment, and consumer products. Their compatibility with automatic insertion equipment, low-profile and end stackable features represent the stat-of-the-art in power device packaging. ORDERING INFORMATION Package HVMDIP Lead (Pb)-free IRFD113PbF ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source Voltagea VDS 60 Gate-source voltage VGS ± 20 ID 0.8 IDM 6.4 Continuous drain current VGS at 10 V TC = 25 °C Pulsed drain currentb Linear derating factor Inductive current, clamped Maximum power dissipation L = 100 μH TC = 25 °C Operating junction and storage temperature range Soldering recommendations (peak temperature) for 10 s UNIT V A 0.008 W/°C ILM PD 6.4 A 1.0 W TJ, Tstg - 55 to + 150 300c °C Notes a. TJ = 25 °C to 150 °C b. Repetitive rating; pulse width limited by maximum junction temperature c. 1.6 mm from case S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient SYMBOL TYP. MAX. UNIT RthJA - 120 °C/W SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage VDS VGS = 0 V, ID = 250 μA 60 - - VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 IGSS V VGS = ± 20 V - - ± 500 VDS = max. rating, VGS = 0 V - - 250 VDS = max. rating x 0.8, VGS = 0 V, TC = 125 °C - - 1000 0.8 - - A Zero Gate Voltage Drain Current IDSS On-State Drain Currentb ID(on) VGS = 10 V VDS > ID(on) x RDS(on) max. RDS(on) VGS = 10 V ID = 0.8 A nA μA - 0.6 0.8 Ω gfs VDS > ID(on) x RDS(on) max., ID = 0.8 A 0.8 1.2 - S Input Capacitance Ciss 135 200 Coss - 80 100 Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 25 V, f = 1.0 MHz - Output Capacitance - 20 25 - 5 7 - 2 - Drain-Source On-State Resistanceb Forward Transconductanceb Dynamic Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Internal Drain Inductance LD Internal Source Inductance LS VGS = 10 V ID = 4 A, VDS = 0.8 max. rating VDD = 0.5 VDS , ID = 0.8 A, Rg = 50 Ω Between lead, 6 mm (0.25") from package and center of die contact D G - 7 - - 10 20 pF nC - 15 25 - 15 25 - 10 20 - 4.0 - - 6.0 - - - 0.8 - - 6.4 - - 2 V - 100 - ns - 0.2 - μC ns nH S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Body Diode Voltagea VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TA = 25 °C, IS = 0.8 A, VGS = 0 V TJ = 150 °C, IF = 1.0 A, dI/dt = 100 A/μs Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width ≤ 300 μs; duty cycle ≤ 2 % S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Saturation Characteristics Fig. 1 - Typical Transfer Characteristics Fig. 3 - Maximum Safe Operatung Area S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix Fig. 4 - Typical Transconductance vs. Drain Current Fig. 6 - Breakdown Voltage vs. Temperature Fig. 5 - Typical Source-Drain Diode Forward Voltage Fig. 7 - Normalized On-Resistance vs. Temperature S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix Fig. 8 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 10 - Typical On-Resistance vs. Darin Current Fig. 9 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 11 - Maximum Darin Current vs. Case Temperature S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix Fig. 16 - Gate Charge Test Circuit Fig. 12 - Power vs. Temperature Derating Fig. 13 - Clamped Inductive Test Circuit EC IP VDS Fig. 17 - Typical Time to Accumulated 1 % Gate Failure IL VDD Fig. 14 - Clamped Inductive Waveforms Fig. 15 - Switching Time Test Circuit S21-0886-Rev. B, 30-Aug-2021 Fig. 18 - Typical High Temperature Reverse Bias (HTRB) Failure Rate Document Number: 91487 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD113 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91487. S21-0886-Rev. B, 30-Aug-2021 Document Number: 91487 7 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2022 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Document Number: 91000