IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Super Fast Body Diode Eliminates the Need for
External Diodes in ZVS Applications
500
RDS(on) (Ω)
VGS = 10 V
0.320
Qg (Max.) (nC)
92
Qgs (nC)
24
Qgd (nC)
44
Configuration
• Lower Gate Charge Results in Simpler Drive
Reqirements
COMPLIANT
• Enhanced dV/dt Capabilities Offer Improved
Ruggedness
Single
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
D
TO-220 FULLPAK
RoHS
• Lead (Pb)-free
APPLICATIONS
G
•
•
•
•
S
G D S
Zero Voltage Switching SMPS
Telecom and Server Power Supplies
Uninterruptible Power Supplies
Motor Control Applications
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220 FULLPAK
IRFIB7N50LPbF
SiHFIB7N50L-E3
Lead (Pb)-free
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
500
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
Pulsed Drain
VGS at 10 V
TC = 25 °C
TC = 100 °C
Currenta
ID
IDM
Linear Derating Factor
Single Pulse Avalanche
Energyb
UNIT
V
6.8
4.3
A
27
0.37
W/°C
mJ
EAS
550
Avalanche Currenta
IAR
6.8
A
Repetitive Avalanche Energya
EAR
4.6
mJ
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
PD
46
W
dV/dt
24
V/ns
TJ, Tstg
- 55 to + 150
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 12).
b. Starting TJ = 25 °C, L = 24 mH, RG = 25 Ω, IAS = 6.8 A (see fig. 14).
c. ISD ≤ 6.8 A, dI/dt ≤ 650 A/µs, VDD ≤ VDS, dV/dt = 24 V/ns, TJ ≤ 150 °C.
d. 1.6 mm from case.
Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
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IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
65
Maximum Junction-to-Case (Drain)
RthJC
-
2.69
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.44
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 500 V, VGS = 0 V
-
-
50
µA
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
2.0
mA
Drain-Source On-State Resistance
-
0.32
0.38
Ω
gfs
VDS = 50 V, ID = 4.1 A
4.7
-
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
2220
-
-
230
-
RDS(on)
Forward Transconductance
VGS = 10 V
ID = 4.1 Ab
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Coss
Effective Output Capacitance
Effective Output Capacitance
(Energy Related)
Coss eff.
Qgs
Gate-Drain Charge
Qgd
Internal Gate Resistance
RG
Rise Time
Turn-Off Delay Time
Fall Time
2780
-
VDS = 400 V, f = 1.0 MHz
-
63
-
-
140
-
-
100
-
-
-
92
-
-
24
VDS = 0 V to 400 Vc
Qg
Gate-Source Charge
Turn-On Delay Time
23
-
VGS = 0 V
Coss eff. (ER)
Total Gate Charge
-
VDS = 1.0 V, f = 1.0 MHz
VGS = 10 V
ID = 6.8 A, VDS = 400 V,
see fig. 7 and 16b
f = 1 MHz, open drain
td(on)
tr
td(off)
tf
VGS = 10 V
VDD = 250 V, ID = 6.8 A,
RG = 9.0 Ω,
see fig. 11a and 11bb
-
-
44
-
0.88
-
-
23
-
-
36
-
-
47
-
-
19
-
-
-
6.8
-
-
27
pF
nC
Ω
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
MOSFET symbol
showing the
integral reverse
p - n junction diode
TJ = 25 °C, IS = 6.8 A, VGS = 0 Vb
D
G
A
S
-
-
1.5
-
85
130
-
130
200
Body Diode Reverse Recovery Time
trr
TJ = 25 °C, IF = 6.8 A,
TJ = 125 °C, dI/dt = 100 A/µsb
Body Diode Reverse Recovery Charge
Qrr
TJ = 25 °C, IS = 6.8 A,
TJ = 125 °C, dI/dt = 100 A/µsb
-
280
420
-
570
860
IRRM
TJ = 25 °C
-
5.9
8.9
V
ns
nC
Drain-Source Body Diode Characteristics
Body Diode Reverse Recovery Current
A
Forward Turn-On Time
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 12).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 % to 80 % VDS.
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Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
10
BOTTOM
ID, Drain-to-Source Current (Α)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
1
5.0V
0.1
TJ = 150 °C
10
T J = 25 °C
1
VDS = 50 V
≤ 60 μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 25°C
0.01
0.1
0.1
1
10
100
3
V DS, Drain-to-Source Voltage (V)
5
6
7
8
9
VGS, Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
100
10
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
5.0V
1
≤60μs PULSE WIDTH
Tj = 150°C
0.1
RDS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
TOP
ID, Drain-to-Source Current (A)
4
2.5
ID = 6.8A
VGS = 10V
2.0
1.5
1.0
0.5
0.0
0.1
1
10
100
-60 -40 -20
0
20
40
60
80 100 120 140 160
V DS, Drain-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
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IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
100000
12.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
ID= 6.8A
C oss = C ds + C gd
10000
C, Capacitance(pF)
VGS, Gate-to-Source Voltage (V)
C rss = C gd
Ciss
1000
Coss
100
Crss
VDS= 400V
10.0
8.0
6.0
4.0
2.0
0.0
10
1
10
100
1000
0
10
20
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
12
40
50
60
70
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
100.00
ISD, Reverse Drain Current (A)
10
8
Energy (μJ)
30
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
6
4
2
10.00
T J = 150°C
1.00
T J = 25°C
0.10
VGS = 0V
0
0.01
0
50 100 150 200 250 300 350 400 450 500 550
VDS, Drain-to-Source Voltage (V)
Fig. 6 - Typical Output Capacitance Stored Energy vs. VDS
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-to-Drain Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
VDS
ID, Drain-to-Source Current (A)
100
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
VGS
D.U.T.
RG
10
RD
+
- VDD
100μsec
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1
Fig. 11a - Switching Time Test Circuit
DC
0.1
1msec
Tc = 25°C
Tj = 150°C
Single Pulse
VDS
10msec
90 %
0.01
1
10
100
1000
10000
VDS, Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
10 %
VGS
t d(on)
tr
t d(off) t f
Fig. 11b - Switching Time Waveforms
7
ID, Drain Current (A)
6
5
4
3
2
1
0
25
50
75
100
125
150
T C , Case Temperature (°C)
Fig. 10 - Maximum Drain Current vs. Case Temperature
Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
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IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
Thermal Response ( Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
R1
R1
τJ
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
τJ
τ1
R2
R2
R3
R3
τC
τ
τ2
τ1
τ3
τ2
Ri (°C/W)
0.2965
τi (sec)
0.001144
0.9847
1.4118
0.151939
1.705500
τ3
Ci= τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
2500
EAS , Single Pulse Avalanche Energy (mJ)
VGS(th) Gate threshold Voltage (V)
5.0
4.0
ID = 250μA
3.0
2.0
1.0
ID
1.4A
1.7A
BOTTOM 6.8A
TOP
2000
1500
1000
500
0
-75
-50
-25
0
25
50
75
100
125
150
25
50
75
100
125
150
T J , Temperature ( °C )
Starting T J , Junction Temperature (°C)
Fig. 13 - Threshold Voltage vs. Temperature
Fig. 14 - Maximum Avalanche Energy vs. Drain Current
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Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
QG
15 V
10 V
L
VDS
D.U.T
RG
+
A
- VDD
IAS
20 V
tp
QGS
Driver
Q GD
VG
A
0.01 Ω
Charge
Fig. 15a - Unclamped Inductive Test Circuit
Fig. 16a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
V DS
50 kΩ
tp
12 V
0.2 µF
0.3 µF
D.U.T.
+
V
- DS
VGS
3 mA
I AS
IG
ID
Current sampling resistors
Fig. 15b - Unclamped Inductive Waveforms
Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
Fig. 16b - Gate Charge Test Circuit
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IRFIB7N50L, SiHFIB7N50L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 17 - For N-Channel
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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91177.
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Document Number: 91177
S09-0063-Rev. A, 02-Feb-09
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
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therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
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Document Number: 91000
Revision: 18-Jul-08
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