IRFP22N60K, SiHFP22N60K
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Requirement
600
RDS(on) ()
VGS = 10 V
0.24
Qg (Max.) (nC)
150
Qgs (nC)
45
Qgd (nC)
76
Configuration
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Available
RoHS*
COMPLIANT
• Fully Characterized Capacitance and Avalanche Voltage
and Current
Single
• Enhanced Body Diode dV/dt Capability
D
• Compliant to RoHS Directive 2002/95/EC
TO-247AC
BENEFITS
• Hard Switching Primary or PFS Switch
G
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
S
D
• High Speed Power Switching
S
G
• Motor Drive
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247AC
IRFP22N60KPbF
SiHFP22N60K-E3
IRFP22N60K
SiHFP22N60K
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
Pulsed Drain
VGS at 10 V
TC = 25 °C
TC = 100 °C
Currenta
ID
IDM
Linear Derating Factor
Single Pulse Avalanche
Energyb
UNIT
V
22
14
A
88
2.9
W/°C
EAS
380
mJ
Repetitive Avalanche Currenta
IAR
22
A
Energya
EAR
37
mJ
Repetitive Avalanche
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
PD
370
W
dV/dt
15
V/ns
TJ, Tstg
- 55 to + 150
300d
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.5 mH, Rg = 25 , IAS = 22 A (see fig. 12).
c. ISD 22 A, dI/dt 360 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Case-to-Sink, Flat, Greased Surface
RthCS
0.24
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.34
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
VDS
VGS = 0 V, ID = 250 μA
MIN.
TYP.
MAX.
UNIT
600
-
-
V
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
VDS/TJ
VGS(th)
-
0.30
-
V/°C
VDS = VGS, ID = 250 μA
3.0
-
5.0
V
nA
Reference to 25 °C, ID = 1
VGS = ± 30 V
-
-
± 100
VDS = 600 V, VGS = 0 V
-
-
50
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
250
IGSS
IDSS
RDS(on)
gfs
mAd
ID = 13 Ab
VGS = 10 V
VDS = 50 V, ID = 13 Ab
μA
-
0.240
0.280
11
-
-
S
-
3570
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Coss
Effective Output Capacitance
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Turn-Off Delay Time
Fall Time
VGS = 0 V
Coss eff.
Total Gate Charge
Rise Time
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
tr
td(off)
VGS = 10 V
-
350
-
-
36
-
VDS = 1.0 V , f = 1.0 MHz
-
4710
-
VDS = 480 V , f = 1.0 MHz
-
92
-
VDS = 0 V to 480 V
-
180
-
-
-
150
-
-
45
-
-
76
-
26
-
-
99
-
-
48
-
-
37
-
-
-
22
-
-
88
ID = 22 A, VDS = 480 V
see fig. 6 and 13b
VDD = 300 V, ID = 22 A,
Rg = 6.2, VGS = 10 V,
see fig. 10b
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
trr
Qrr
IRRM
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 22 A, VGS = 0 Vb
TJ = 25 °C
TJ = 125 °C
TJ = 25 °C
IF = 22 A,
dI/dt = 100 A/μsb
TJ =1 25 °C
TJ = 25 °C
-
-
1.5
-
590
890
-
670
1010
-
7.2
11
-
8.5
13
-
26
39
V
ns
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
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Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100
100.00
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
10
ID, Drain-to-Source Current ( A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
5.0V
0.01
T J = 150°C
10.00
1.00
T J = 25°C
0.10
VDS = 50V
20µs PULSE WIDTH
20µs PULSE WIDTH
Tj = 25°C
0.001
0.01
0.1
1
10
100
5.0
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
3.0
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
1
20µs PULSE WIDTH
Tj = 150°C
0.1
1
10
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
100
r
, Drain-to-Source On Resistance
DS(on)
(Normalized)
ID, Drain-to-Source Current (A)
5.0V
0.1
7.0
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
TOP
10
6.0
I D = 22A
2.5
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
100
120
140
160
TJ, Junction Temperature (° C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
100000
ISD, Reverse Drain Current (A)
Crss
Coss
10000
C, Capacitance (pF)
100.0
VGS = 0V,
f = 1 MHZ
C iss
= C gs + C gd , C ds
SHORTED
= Cgd
= Cds + Cgd
Ciss
1000
Coss
100
Crss
10
T J = 150°C
10.0
1.0
T J = 25°C
VGS = 0V
0.1
1
10
100
1000
0.2
VDS, Drain-to-Source Voltage (V)
0.6
0.8
1.0
1.2
1.4
VSD, Source-toDrain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
1000
20
ID= 22A
OPERATION IN THIS AREA
LIMITED BY RDS(on)
VDS= 480V
VDS= 300V
VDS= 120V
16
ID, Drain-to-Source Current (A)
VGS , Gate-to-Source Voltage (V)
0.4
12
8
4
0
0
40
80
120
160
Q G Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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100
100µsec
10
1msec
1
0.1
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
10msec
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
RD
VDS
25
VGS
ID, Drain Current (A)
D.U.T.
RG
20
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
15
Fig. 10a - Switching Time Test Circuit
10
VDS
90 %
5
0
25
50
75
100
125
150
10 %
VGS
TC, Case Temperature (° C)
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
t1
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+T C
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
VDS
15 V
Driver
L
VDS
tp
D.U.T
RG
+
- VDD
IAS
20 V
tp
IAS
A
0.01Ω
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
800
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP
9.8A
14A
22A
BOTTOM
600
400
200
0
25
50
75
100
125
150
Starting T J, Junction Temperature
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP22N60K, SiHFP22N60K
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91208.
Document Number: 91208
S11-0445-Rev. B, 21-Mar-11
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Package Information
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Vishay Siliconix
TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9
MILLIMETERS
DIM.
MIN.
MAX.
A
4.83
A1
2.29
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
NOTES
5.21
D1
16.25
16.85
5
2.55
D2
0.56
0.76
A2
1.50
2.49
E
15.50
15.87
b
1.12
1.33
E1
13.46
14.16
5
b1
1.12
1.28
E2
4.52
5.49
3
b2
1.91
2.39
b3
1.91
2.34
b4
2.87
3.22
b5
2.87
3.18
c
0.55
0.69
c1
0.55
0.65
D
20.40
20.70
4
6
e
L
14.90
15.40
6, 8
L1
3.96
4.16
6
ØP
3.56
3.65
7
6
4
5.44 BSC
Ø P1
7.19 ref.
Q
5.31
5.69
S
5.54
5.74
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition
Revision: 19-Oct-2020
Document Number: 91360
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
VERSION 2: FACILITY CODE = Y
A
A
4
E
B
3 R/2
E/2
7 ØP
Ø k M DBM
A2
S
(Datum B)
ØP1
A
D2
Q
4
4
2xR
(2)
D1
D
1
2
4
D
3
Thermal pad
5 L1
C
L
See view B
2 x b2
3xb
0.10 M C A M
4
E1
A
0.01 M D B M
View A - A
C
2x e
A1
b4
(b1, b3, b5)
Planting
Lead Assignments
1. Gate
2. Drain
3. Source
4. Drain
D DE
Base metal
E
C
(c)
C
c1
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS
DIM.
MIN.
MAX.
A
4.58
5.31
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
D2
0.51
1.30
15.87
A1
2.21
2.59
E
15.29
A2
1.17
2.49
E1
13.72
b
0.99
1.40
e
5.46 BSC
b1
0.99
1.35
Øk
b2
1.53
2.39
L
14.20
16.25
b3
1.65
2.37
L1
3.71
4.29
b4
2.42
3.43
ØP
3.51
3.66
b5
2.59
3.38
Ø P1
-
7.39
c
0.38
0.86
Q
5.31
5.69
4.52
c1
0.38
0.76
R
D
19.71
20.82
S
D1
13.08
-
NOTES
0.254
5.49
5.51 BSC
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c
Revision: 19-Oct-2020
Document Number: 91360
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
VERSION 3: FACILITY CODE = N
A
E
R/2
D2
B
A
P
A2
D1
L1
D
D
K M D BM
R
S
Q
N
P1
b2
L
C
e
b
b4
C
E1
A1
0.01 M D B M
0.10 M C A M
b1, b3, b5
c
c1
Base metal
Plating
b, b2, b4
MILLIMETERS
MILLIMETERS
DIM.
MIN.
MAX.
DIM.
MIN.
A
4.65
5.31
D2
0.51
MAX.
1.35
A1
2.21
2.59
E
15.29
15.87
13.46
A2
1.17
1.37
E1
b
0.99
1.40
e
-
b1
0.99
1.35
k
b2
1.65
2.39
L
14.20
b3
1.65
2.34
L1
3.71
b4
2.59
3.43
N
b5
2.59
3.38
P
3.56
c
0.38
0.89
P1
-
7.39
c1
0.38
0.84
Q
5.31
5.69
D
19.71
20.70
R
4.52
D1
13.08
-
S
5.46 BSC
0.254
16.10
4.29
7.62 BSC
3.66
5.49
5.51 BSC
ECN: E20-0545-Rev. F, 19-Oct-2020
DWG: 5971
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
Revision: 19-Oct-2020
Document Number: 91360
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 09-Jul-2021
1
Document Number: 91000