IRFP31N50LPBF

IRFP31N50L, SiHFP31N50L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Super Fast Body Diode Eliminates the Need for External Diodes in ZVS Applications 500 RDS(on) () VGS = 10 V 0.15 Available RoHS* Qg (Max.) (nC) 210 Qgs (nC) 58 • Lower Gate Charge Results in Simpler Drive Requirements 100 • Enhanced dV/dt Capabilities Offer Improved Ruggedness Qgd (nC) Configuration Single COMPLIANT • Higher Gate Voltage Threshold Offers Improved Noise Immunity D • Compliant to RoHS Directive 2002/95/EC TO-247AC APPLICATIONS G • Zero Voltage Switching SMPS • Telecom and Server Power Supplies S D • Uninterruptible Power Supplies S G • Motor Control Applications N-Channel MOSFET ORDERING INFORMATION Package TO-247AC IRFP31N50LPbF SiHFP31N50L-E3 IRFP31N50L SiHFP31N50L Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID UNIT V 31 20 A IDM 124 3.7 W/°C Single Pulse Avalanche Energyb EAS 460 mJ Repetitive Avalanche Currenta IAR 31 A Repetitive Avalanche Energya EAR 46 mJ Linear Derating Factor Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw PD 460 W dV/dt 19 V/ns TJ, Tstg - 55 to + 150 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 1 mH, Rg = 25 , IAS = 31 A (see fig. 12). c. ISD  31 A, dI/dt  422 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 www.vishay.com 1 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL TYP. MAX. UNIT RthJA RthCS RthJC 0.24 - 40 0.26 °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 500 - - V V/°C Static Drain-Source Breakdown Voltage VDS/TJ Reference to 25 °C, ID = 1 mA - 0.28 - VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA - - μA IDSS VDS = 500 V, VGS = 0 V 50 Zero Gate Voltage Drain Current VDS Temperature Coefficient Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs - - 2.0 mA - 0.15 0.18  VDS = 50 V, ID = 19 Ab 15 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 5000 - - 553 - VDS = 400 V, VGS = 0 V, TJ = 125 °C ID = 19 Ab VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance Coss eff. Effective Output Capacitance Coss eff. (ER) Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Internal Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time VGS = 0 V - 59 VDS = 1.0 V , f = 1.0 MHz - 6630 - VDS = 400 V , f = 1.0 MHz - 155 - VDS = 0 V to 400 Vc VGS = 10 V ID = 31 A, VDS = 400 V, see fig. 7 and 13b f = 1 MHz, open drain - 276 - - 200 - - - 210 - - 58 - - 100 - 1.1 - td(on) - 28 - tr - 115 - - 54 - - 53 - - - 31 - - 124 td(off) VDD = 250 V, ID = 31 A, Rg = 4.3 , see fig. 10b tf pF nC  ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 31 A, VGS = 0 Vb - - 1.5 TJ = 25 °C, IF = 31 A - 170 250 TJ = 125 °C, dI/dt = 100 A/μsb - 220 330 TJ = 25 °C, IS = 31 A, VGS = 0 Vb - 570 860 nC TJ = 125 °C, dI/dt = 100 A/μsb - 1.2 1.8 TJ = 25 °C - 7.9 12 μC A V ns Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Forward Turn-On Time ton Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 % to 80 % VDS. www.vishay.com 2 Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) ID, Drain-to-Source Current (A) Top 100 Bottom 1000 VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V ID, Drain-to-Source Current (A) 100 10 1 5.0 V 100 TJ = 150 °C 10 TJ = 25 °C 1 0.1 0.01 0.1 1 20 μs PULSE WIDTH TJ = 25 °C 100 10 4 VDS, Drain-to-Source Voltage (V) ID, Drain-to-Source Current (A) Top 10 Bottom VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 5.0 V 1 0.1 20 μs PULSE WIDTH TJ = 150 °C 0.01 0.1 10 1 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 5 6 8 9 7 VGS, Gate-to-Source Voltage (V) 10 11 Fig. 3 - Typical Transfer Characteristics 100 RDS(on), Drain-to-Source On Resistance (Normalized) Fig. 1 - Typical Output Characteristics 100 VDS = 50 V 20 μs PULSE WIDTH 0.1 3.0 ID = 31 A 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 VGS = 10 V 20 40 60 80 100 120 140 160 TJ, Junction Temperature Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix 20 1 000 000 C, Capacitance (pF) 100 000 ID = 31 A f = 1 MHz SHORTED VGS, Gate-to-Source Voltage (V) VGS = 0 V, Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd 10 000 Ciss 1000 Coss 100 VDS = 400 V VDS = 250 V VDS = 100 V 12 8 4 Crss 10 0 1 1000 100 10 0 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 120 40 80 QG, Total Gate Charge (nC) 160 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 1000 30 ISD, Reverse Drain Current (A) 25 Energy (µs) 20 15 10 100 TJ = 150 °C 10 TJ = 25 °C 1 5 0 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 6 - Output Capacitance Stored Energy vs. VDS www.vishay.com 4 0.1 0.2 VGS = 0 V 1.4 1.0 0.6 VSD, Source-to-Drain Voltage (V) 1.8 Fig. 8 - Typical Source Drain Diode Forward Voltage Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix RD VDS 35 VGS ID, Drain Current (A) D.U.T. RG 30 25 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 20 Fig. 10a - Switching Time Test Circuit 15 VDS 10 90 % 5 0 25 50 75 125 100 10 % VGS 150 TC, Case Temperature (°C) td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 1 D = 0.50 0.1 0.20 0.10 0.05 PDM 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t1/ t2 2. Peak TJ = PDM x ZthJC + TC 0.001 0.00001 0.001 0.0001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V L VDS D.U.T RG IAS 20 V tp tp Driver + A - VDD A IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix ID, Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 100 10us 100us 10 1 1ms TC = 25 °C TJ = 150 °C Single Pulse 10ms 100 10 1000 EAS, Single Pulse Avalanche Energy (mJ) 1000 1000 ID 14A 20A BOTTOM 30A TOP 800 600 400 200 0 25 50 Fig. 12c - Maximum Avalanche Energy vs. Drain Current 75 100 125 150 Starting TJ, Junction Temperature(°C) VDS, Drain-to-Source Voltage (V) Fig. 12d - Gate Charge Test Circuit Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Maximum Safe Operating Area www.vishay.com 6 Fig. 13b - Basic Gate Charge Waveform Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFP31N50L, SiHFP31N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91220. Document Number: 91220 S11-0488-Rev. C, 21-Mar-11 www.vishay.com 7 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) VERSION 1: FACILITY CODE = 9 MILLIMETERS DIM. MIN. MAX. A 4.83 A1 2.29 MILLIMETERS NOTES DIM. MIN. MAX. NOTES 5.21 D1 16.25 16.85 5 2.55 D2 0.56 0.76 A2 1.50 2.49 E 15.50 15.87 b 1.12 1.33 E1 13.46 14.16 5 b1 1.12 1.28 E2 4.52 5.49 3 b2 1.91 2.39 b3 1.91 2.34 b4 2.87 3.22 b5 2.87 3.18 c 0.55 0.69 c1 0.55 0.65 D 20.40 20.70 4 6 e L 14.90 15.40 6, 8 L1 3.96 4.16 6 ØP 3.56 3.65 7 6 4 5.44 BSC Ø P1 7.19 ref. Q 5.31 5.69 S 5.54 5.74 Notes (1) Package reference: JEDEC® TO247, variation AC (2) All dimensions are in mm (3) Slot required, notch may be rounded (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body (5) Thermal pad contour optional with dimensions D1 and E1 (6) Lead finish uncontrolled in L1 (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition Revision: 19-Oct-2020 Document Number: 91360 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix VERSION 2: FACILITY CODE = Y A A 4 E B 3 R/2 E/2 7 ØP Ø k M DBM A2 S (Datum B) ØP1 A D2 Q 4 4 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L See view B 2 x b2 3xb 0.10 M C A M 4 E1 A 0.01 M D B M View A - A C 2x e A1 b4 (b1, b3, b5) Planting Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain D DE Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 MILLIMETERS NOTES DIM. MIN. MAX. D2 0.51 1.30 15.87 A1 2.21 2.59 E 15.29 A2 1.17 2.49 E1 13.72 b 0.99 1.40 e 5.46 BSC b1 0.99 1.35 Øk b2 1.53 2.39 L 14.20 16.25 b3 1.65 2.37 L1 3.71 4.29 b4 2.42 3.43 ØP 3.51 3.66 b5 2.59 3.38 Ø P1 - 7.39 c 0.38 0.86 Q 5.31 5.69 4.52 c1 0.38 0.76 R D 19.71 20.82 S D1 13.08 - NOTES 0.254 5.49 5.51 BSC Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c Revision: 19-Oct-2020 Document Number: 91360 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix VERSION 3: FACILITY CODE = N A E R/2 D2 B A P A2 D1 L1 D D K M D BM R S Q N P1 b2 L C e b b4 C E1 A1 0.01 M D B M 0.10 M C A M b1, b3, b5 c c1 Base metal Plating b, b2, b4 MILLIMETERS MILLIMETERS DIM. MIN. MAX. DIM. MIN. A 4.65 5.31 D2 0.51 MAX. 1.35 A1 2.21 2.59 E 15.29 15.87 13.46 A2 1.17 1.37 E1 b 0.99 1.40 e - b1 0.99 1.35 k b2 1.65 2.39 L 14.20 b3 1.65 2.34 L1 3.71 b4 2.59 3.43 N b5 2.59 3.38 P 3.56 c 0.38 0.89 P1 - 7.39 c1 0.38 0.84 Q 5.31 5.69 D 19.71 20.70 R 4.52 D1 13.08 - S 5.46 BSC 0.254 16.10 4.29 7.62 BSC 3.66 5.49 5.51 BSC ECN: E20-0545-Rev. F, 19-Oct-2020 DWG: 5971 Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154") Revision: 19-Oct-2020 Document Number: 91360 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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