IRFP460
www.vishay.com
Vishay Siliconix
Power MOSFET
TO-247
D
FEATURES
S
•
•
•
•
•
•
•
G
S
D
G
N-Channel MOSFET
Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
500
VGS = 10 V
210
Qgs (nC)
29
Qgd (nC)
Configuration
DESCRIPTION
0.27
Qg (max.) (nC)
Dynamic dV/dt rating
Repetitive avalanche rated
Available
Isolated central mounting hole
Fast switching
Ease of paralleling
Simple drive requirements
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because its isolated mounting hole.
It also provides greater creepage distances between pins to
meet the requirements of most safety specifications.
110
Single
ORDERING INFORMATION
Package
TO-247
Lead (Pb)-free
IRFP460PbF
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
500
Gate-source voltage
VGS
± 20
Continuous drain current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain currenta
ID
UNIT
V
20
13
A
IDM
80
2.2
W/°C
Single pulse avalanche energy b
EAS
960
mJ
Repetitive avalanche current a
IAR
20
A
Repetitive avalanche energy a
EAR
28
mJ
Linear derating factor
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
for 10 s
Mounting Torque
6-32 or M3 screw
PD
280
W
dV/dt
3.5
V/ns
TJ, Tstg
-55 to +150
300 d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V, starting TJ = 25 °C, L = 4.3 mH, RG = 25 Ω, IAS = 20 A (see fig. 12)
c. ISD ≤ 20 A, dI/dt ≤ 160 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
S22-0058-Rev. B, 31-Jan-2022
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
40
Case-to-sink, flat, greased surface
RthCS
0.24
-
Maximum junction-to-case (drain)
RthJC
-
0.45
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
500
-
-
V
V/°C
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage
VDS
ΔVDS/TJ
VGS(th)
Gate-source leakage
IGSS
Zero gate voltage drain current
IDSS
VGS = 0 V, ID = 250 μA
Reference to 25 °C, ID = 1 mA
-
0.63
-
2.0
-
4.0
V
VGS = ± 20 V
-
-
± 100
nA
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
VDS = VGS, ID = 250 μA
μA
-
-
0.27
Ω
gfs
VDS = 50 V, ID = 12 Ab
13
-
-
S
Input capacitance
Ciss
4200
-
Coss
-
870
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
Output capacitance
-
350
-
-
-
210
-
-
29
Drain-source on-state resistance
Forward transconductance
RDS(on)
VGS = 10 V
ID = 12 Ab
Dynamic
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
-
-
110
Turn-on delay time
td(on)
-
18
-
tr
-
59
-
-
110
-
-
58
-
-
5.0
-
-
13
-
-
-
20
-
-
80
Rise time
Turn-off delay time
td(off)
Fall time
tf
Internal drain inductance
LD
Internal source inductance
LS
VGS = 10 V
ID = 20 A, VDS = 400 V
see fig. 6 and 13b
VDD = 250 V, ID = 20 A ,
RG = 4.3 Ω, RD = 13 Ω, see fig. 10b
Between lead,
6 mm (0.25") from
package and center of
die contact
D
G
pF
nC
ns
nH
S
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current a
Body diode voltage
IS
ISM
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
G
TJ = 25 °C, IS = 20 A, VGS = 0
A
S
Vb
TJ = 25 °C, IF = 20A, dI/dt = 100 A/μsb
-
-
1.8
V
-
570
860
ns
-
5.7
8.6
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
S22-0058-Rev. B, 31-Jan-2022
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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
VGS
ID, Drain Current (A)
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
101
4.5 V
100
ID, Drain Current (A)
Top
150 °C
101
25 °C
20 µs Pulse Width
TC = 25 °C
4
101
100
VDS, Drain-to-Source Voltage (V)
91237_01
ID, Drain Current (A)
4.5 V
20 µs Pulse Width
TC = 150 °C
100
100
91237_02
101
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 150 °C
S22-0058-Rev. B, 31-Jan-2022
6
7
8
9
10
Fig. 3 - Typical Transfer Characteristics
3.5
RDS(on), Drain-to-Source On Resistance
(Normalized)
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
5
VGS, Gate-to-Source Voltage (V)
91237_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
101
20 µs Pulse Width
VDS = 50 V
100
3.0
ID = 20 A
VGS = 10 V
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20
91237_04
0 20
40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91237
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VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Capacitance (pF)
8000
6000
Ciss
4000
Coss
2000
102
ISD, Reverse Drain Current (A)
10 000
Vishay Siliconix
150 °C
25 °C
Crss
100
101
VDS, Drain-to-Source Voltage (V)
91237_05
VGS, Gate-to-Source Voltage (V)
0.8
1.0
1.8
2.0
Operation in this area limited
by RDS(on)
5
ID, Drain Current (A)
16
VDS = 250 V
12
VDS = 100 V
8
2
102
10 µs
5
2
100 µs
10
5
1 ms
4
80
120
160
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S22-0058-Rev. B, 31-Jan-2022
1
1
200
QG, Total Gate Charge (nC)
TC = 25 °C
TJ = 150 °C
Single Pulse
2
For test circuit
see figure 13
0
91237_06
1.6
103
VDS = 400 V
40
1.4
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID = 20 A
0
1.2
VSD, Source-to-Drain Voltage (V)
91237_07
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
VGS = 0 V
101
0.6
0
91237_08
2
5
10
2
5
10 ms
102
2
5
103
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91237
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RD
VDS
VGS
16
ID, Drain Current (A)
D.U.T.
RG
20
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
12
Fig. 10 - Switching Time Test Circuit
8
VDS
4
90 %
0
25
50
75
100
125
150
TC, Case Temperature (°C)
91237_09
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 11 - Switching Time Waveforms
Thermal Response (ZthJC)
1
0 - 0.5
0.1 0.2
0.1
10-2
PDM
0.05
0.02
0.01
Single Pulse
(Thermal Response)
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-3
10-5
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (S)
91237_11
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S22-0058-Rev. B, 31-Jan-2022
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L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
VDS
A
10 V
0.01 Ω
tp
IAS
Fig. 13 - Unclamped Inductive Test Circuit
Fig. 14 - Unclamped Inductive Waveforms
EAS, Single Pulse Energy (mJ)
2400
ID
8.9 A
13 A
Bottom 20 A
Top
2000
1600
1200
800
400
0
VDD = 50 V
25
91237_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 15 - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 16 - Basic Gate Charge Waveform
S22-0058-Rev. B, 31-Jan-2022
Fig. 17 - Gate Charge Test Circuit
Document Number: 91237
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Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
•
•
•
•
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 18 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91237.
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Document Number: 91237
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Package Information
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TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9
MILLIMETERS
DIM.
MIN.
MAX.
A
4.83
A1
2.29
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
NOTES
5.21
D1
16.25
16.85
5
2.55
D2
0.56
0.76
A2
1.50
2.49
E
15.50
15.87
b
1.12
1.33
E1
13.46
14.16
5
b1
1.12
1.28
E2
4.52
5.49
3
b2
1.91
2.39
b3
1.91
2.34
b4
2.87
3.22
b5
2.87
3.18
c
0.55
0.69
c1
0.55
0.65
D
20.40
20.70
4
6
e
L
14.90
15.40
6, 8
L1
3.96
4.16
6
ØP
3.56
3.65
7
6
4
5.44 BSC
Ø P1
7.19 ref.
Q
5.31
5.69
S
5.54
5.74
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition
Revision: 19-Oct-2020
Document Number: 91360
1
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VERSION 2: FACILITY CODE = Y
A
A
4
E
B
3 R/2
E/2
7 ØP
Ø k M DBM
A2
S
(Datum B)
ØP1
A
D2
Q
4
4
2xR
(2)
D1
D
1
2
4
D
3
Thermal pad
5 L1
C
L
See view B
2 x b2
3xb
0.10 M C A M
4
E1
A
0.01 M D B M
View A - A
C
2x e
A1
b4
(b1, b3, b5)
Planting
Lead Assignments
1. Gate
2. Drain
3. Source
4. Drain
D DE
Base metal
E
C
(c)
C
c1
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS
DIM.
MIN.
MAX.
A
4.58
5.31
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
D2
0.51
1.30
15.87
A1
2.21
2.59
E
15.29
A2
1.17
2.49
E1
13.72
b
0.99
1.40
e
5.46 BSC
b1
0.99
1.35
Øk
b2
1.53
2.39
L
14.20
16.25
b3
1.65
2.37
L1
3.71
4.29
b4
2.42
3.43
ØP
3.51
3.66
b5
2.59
3.38
Ø P1
-
7.39
c
0.38
0.86
Q
5.31
5.69
4.52
c1
0.38
0.76
R
D
19.71
20.82
S
D1
13.08
-
NOTES
0.254
5.49
5.51 BSC
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c
Revision: 19-Oct-2020
Document Number: 91360
2
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Vishay Siliconix
VERSION 3: FACILITY CODE = N
A
E
R/2
D2
B
A
P
A2
D1
L1
D
D
K M D BM
R
S
Q
N
P1
b2
L
C
e
b
b4
C
E1
A1
0.01 M D B M
0.10 M C A M
b1, b3, b5
c
c1
Base metal
Plating
b, b2, b4
MILLIMETERS
MILLIMETERS
DIM.
MIN.
MAX.
DIM.
MIN.
A
4.65
5.31
D2
0.51
MAX.
1.35
A1
2.21
2.59
E
15.29
15.87
13.46
A2
1.17
1.37
E1
b
0.99
1.40
e
-
b1
0.99
1.35
k
b2
1.65
2.39
L
14.20
b3
1.65
2.34
L1
3.71
b4
2.59
3.43
N
b5
2.59
3.38
P
3.56
c
0.38
0.89
P1
-
7.39
c1
0.38
0.84
Q
5.31
5.69
D
19.71
20.70
R
4.52
D1
13.08
-
S
5.46 BSC
0.254
16.10
4.29
7.62 BSC
3.66
5.49
5.51 BSC
ECN: E20-0545-Rev. F, 19-Oct-2020
DWG: 5971
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
Revision: 19-Oct-2020
Document Number: 91360
3
For technical questions, contact: hvm@vishay.com
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Revision: 01-Jan-2022
1
Document Number: 91000