IRFP460PBF

IRFP460, SiHFP460 Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Dynamic dV/dt Rating 500 RDS(on) (Ω) VGS = 10 V • Repetitive Avalanche Rated 0.27 Available Qg (Max.) (nC) 210 • Isolated Central Mounting Hole Qgs (nC) 29 • Fast Switching 110 • Ease of Paralleling Qgd (nC) Configuration Single RoHS* COMPLIANT • Simple Drive Requirements • Lead (Pb)-free Available D TO-247 DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because its isolated mounting hole. It also provides greater creepage distances between pins to meet the requirements of most safety specifications. G S D G S N-Channel MOSFET ORDERING INFORMATION Package TO-247 IRFP460PbF SiHFP460-E3 IRFP460 SiHFP460 Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL LIMIT VDS VGS 500 ± 20 20 13 80 2.2 960 20 28 280 3.5 - 55 to + 150 300d 10 1.1 ID IDM TC = 25 °C for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 4.3 mH, RG = 25 Ω, IAS = 20 A (see fig. 12). c. ISD ≤ 20 A, dI/dt ≤ 160 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91237 S-81360-Rev. A, 28-Jul-08 www.vishay.com 1 IRFP460, SiHFP460 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - Maximum Junction-to-Case (Drain) RthJC - 0.45 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 µA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.63 - V/°C VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VGS = ± 20 V - - ± 100 VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 ID = 12 Ab - - 0.27 Ω Ab 13 - - S - 4200 - IGSS IDSS RDS(on) gfs VGS = 10 V VDS = 50 V, ID = 12 µA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 20 A, VDS = 400 V see fig. 6 and 13b - 870 - - 350 - - - 210 - - 29 Gate-Drain Charge Qgd - - 110 Turn-On Delay Time td(on) - 18 - Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance tr td(off) VDD = 250 V, ID = 20 A , RG = 4.3 Ω, RD = 13 Ω, see fig. 10b tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D - 59 - - 110 - - 58 - - 5.0 - - 13 - - - 20 - - 80 pF nC ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 20 A, VGS = 0 S Vb TJ = 25 °C, IF = 20A, dI/dt = 100 A/µsb - - 1.8 V - 570 860 ns - 5.7 8.6 µC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91237 S-81360-Rev. A, 28-Jul-08 IRFP460, SiHFP460 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted VGS ID, Drain Current (A) 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 101 4.5 V 100 ID, Drain Current (A) Top 150 °C 101 25 °C 20 µs Pulse Width TC = 25 °C 4 101 100 VDS, Drain-to-Source Voltage (V) 91237_01 ID, Drain Current (A) 4.5 V 20 µs Pulse Width TC = 150 °C 100 100 91237_02 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 150 °C Document Number: 91237 S-81360-Rev. A, 28-Jul-08 6 7 8 9 10 Fig. 3 - Typical Transfer Characteristics 3.5 RDS(on), Drain-to-Source On Resistance (Normalized) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 5 VGS, Gate-to-Source Voltage (V) 91237_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 101 20 µs Pulse Width VDS = 50 V 100 3.0 ID = 20 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 91237_04 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFP460, SiHFP460 Vishay Siliconix VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 8000 6000 Ciss 4000 Coss 2000 102 ISD, Reverse Drain Current (A) 10 000 150 °C 25 °C Crss 100 101 VDS, Drain-to-Source Voltage (V) 91237_05 VGS, Gate-to-Source Voltage (V) 0.8 1.0 ID, Drain Current (A) VDS = 250 V 12 VDS = 100 V 8 2 102 10 µs 5 2 100 µs 10 5 1 ms 4 80 120 160 1 1 200 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage TC = 25 °C TJ = 150 °C Single Pulse 2 For test circuit see figure 13 0 www.vishay.com 4 2.0 Operation in this area limited by RDS(on) 5 16 91237_06 1.8 1.6 103 VDS = 400 V 40 1.4 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 20 A 0 1.2 VSD, Source-to-Drain Voltage (V) 91237_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 20 VGS = 0 V 101 0.6 0 91237_08 2 5 10 2 5 10 ms 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91237 S-81360-Rev. A, 28-Jul-08 IRFP460, SiHFP460 Vishay Siliconix RD VDS VGS 16 ID, Drain Current (A) D.U.T. RG 20 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 12 Fig. 10a - Switching Time Test Circuit 8 VDS 4 90 % 0 25 50 75 100 125 150 10 % VGS TC, Case Temperature (°C) 91237_09 td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 1 0 - 0.5 0.1 0.2 0.1 10-2 PDM 0.05 0.02 0.01 Single Pulse (Thermal Response) t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-3 10-5 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (S) 91237_11 Fig. 11a - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T RG + - IAS V DD A VDS 10 V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91237 S-81360-Rev. A, 28-Jul-08 IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRFP460, SiHFP460 Vishay Siliconix EAS, Single Pulse Energy (mJ) 2400 ID 8.9 A 13 A Bottom 20 A Top 2000 1600 1200 800 400 VDD = 50 V 0 25 50 75 100 125 150 Starting TJ, Junction Temperature (°C) 91237_12c Fig. 12c - Maximum Avalanche Energy vs. Drain Current QG 10 V QGS QGD VG Charge Fig. 13a - Basic Gate Charge Waveform Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF + D.U.T. - VDS VGS 3 mA IG ID Current sampling resistors Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91237 S-81360-Rev. A, 28-Jul-08 IRFP460, SiHFP460 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91237. Document Number: 91237 S-81360-Rev. A, 28-Jul-08 www.vishay.com 7 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) A A 4 E B 3 R/2 E/2 7 ØP Ø k M DBM A2 S (Datum B) ØP1 A D2 Q 4 4 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L A See view B 2 x b2 3xb 0.10 M C A M 4 E1 0.01 M D B M View A - A C 2x e A1 b4 Planting Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain D DE (b1, b3, b5) Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 A1 2.21 2.59 A2 1.17 2.49 b 0.99 1.40 b1 0.99 1.35 b2 1.53 2.39 b3 1.65 2.37 b4 2.42 3.43 b5 2.59 3.38 c 0.38 0.86 c1 0.38 0.76 D 19.71 20.82 D1 13.08 ECN: X13-0103-Rev. D, 01-Jul-13 DWG: 5971 INCHES MIN. MAX. 0.180 0.209 0.087 0.102 0.046 0.098 0.039 0.055 0.039 0.053 0.060 0.094 0.065 0.093 0.095 0.135 0.102 0.133 0.015 0.034 0.015 0.030 0.776 0.820 0.515 - DIM. D2 E E1 e Øk L L1 N ØP Ø P1 Q R S MILLIMETERS MIN. MAX. 0.51 1.30 15.29 15.87 13.72 5.46 BSC 0.254 14.20 16.25 3.71 4.29 7.62 BSC 3.51 3.66 7.39 5.31 5.69 4.52 5.49 5.51 BSC INCHES MIN. MAX. 0.020 0.051 0.602 0.625 0.540 0.215 BSC 0.010 0.559 0.640 0.146 0.169 0.300 BSC 0.138 0.144 0.291 0.209 0.224 0.178 0.216 0.217 BSC Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. Outline conforms to JEDEC outline TO-247 with exception of dimension c. 8. Xian and Mingxin actually photo. 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