IRFPS30N60KPBF

IRFPS30N60K, SiHFPS30N60K Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement 600 RDS(on) (Ω) VGS = 10 V 0.16 Qg (Max.) (nC) 220 Qgs (nC) 64 Qgd (nC) 110 Configuration • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness Available RoHS* COMPLIANT • Fully Characterized Capacitance and Avalanche Voltage and Current Single • Lead (Pb)-free Available D APPLICATIONS SUPER-247TM • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply G • High Speed Power Switching S D G S N-Channel MOSFET ORDERING INFORMATION Super-247TM Package IRFPS30N60KPbF Lead (Pb)-free SiHFPS30N60K-E3 IRFPS30N60K SnPb SiHFPS30N60K ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 600 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID UNIT V 30 19 A IDM 120 3.6 W/°C EAS 520 mJ Currenta IAR 30 A Repetitive Avalanche Energya EAR 45 mJ Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s PD 450 W dV/dt 13 V/ns TJ, Tstg - 55 to + 150 300d °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. Starting TJ = 25 °C, L = 1.1 mH, RG = 25 Ω, IAS = 30 A. c. ISD ≤ 30 A, dI/dt ≤ 630 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 www.vishay.com 1 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambienta RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - Maximum Junction-to-Case (Drain)a RthJC - 0.28 UNIT °C/W Note a. Rth is measured at TJ approximately 90 °C. SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS VDS VGS = 0 V, ID = 250 µA MIN. TYP. MAX. UNIT 600 - - V V/°C Static Drain-Source Breakdown Voltage VDS Temperature Coefficient ΔVDS/TJ - 0.66 - VGS(th) VDS = VGS, ID = 250 µA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V - - 50 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 250 - 0.16 0.19 Ω 16 - - S - 5870 - Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs Reference to 25 °C, ID = 1 mAd ID = 18 Ab VGS = 10 V VDS = 50 V, ID = 18 A µA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance Total Gate Charge VGS = 0 V, VDS = 25 V, f = 1.0 MHz VDS = 1.0 V , f = 1.0 MHz VGS = 0 V Coss eff. 530 - 54 - - 6920 - VDS = 480 V , f = 1.0 MHz - 140 - VDS = 0 V to 480 Vc - 270 - - - 220 Qg Gate-Source Charge Qgs - - 64 Qgd - - 110 Turn-On Delay Time td(on) - 29 - - 120 - - 56 - - 50 - - - 30 - - 120 Rise Time Fall Time tr td(off) ID = 30 A, VDS = 480 Vb Gate-Drain Charge Turn-Off Delay Time VGS = 10 V - VDD = 300 V, ID = 30 A, RG = 3.9 Ω, VGS = 10 Vb tf pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Body Diode Recovery Current Forward Turn-On Time IRRM ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 30 A, VGS = 0 S Vb TJ = 25 °C, IF = 30 A, dI/dt = 100 A/µsb - - 1.5 V - 640 960 ns - 11 16 µC - 31 - A Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 100.0 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 10 ID, Drain-to-Source Current ( A) ID, Drain-to-Source Current (A) TOP 1 5.0V 0.1 T J = 150°C 10.0 T J = 25°C 1.0 VDS = 50V 20μs PULSE WIDTH 20μs PULSE WIDTH Tj = 25°C 0.01 0.1 0.1 1 10 100 5.0 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics 100 3.0 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 1 20μs PULSE WIDTH Tj = 150°C 0.1 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 8.0 9.0 I D = 30A 100 2.0 (Normalized) 5.0V 0.1 7.0 2.5 RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) TOP 10 6.0 VGS , Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix 1000000 C, Capacitance (pF) 100000 100.0 C ds ISD, Reverse Drain Current (A) VGS = 0V, f = 1 MHZ C iss = C gs + Cgd , SHORTED Crss = Cgd Coss = Cds + Cgd 10000 Ciss 1000 Coss 100 10.0 TJ = 150°C 1.0 T J = 25°C Crss 10 1 10 100 1000 0.2 VDS, Drain-to-Source Voltage (V) 0.4 0.6 0.8 1.0 1.2 1.4 VSD, Source-toDrain Voltage (V) Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 1000 20 ID= 30A OPERATION IN THIS AREA LIMITED BY R DS(on) VDS= 480V VDS= 300V VDS= 120V 16 ID, Drain-to-Source Current (A) VGS , Gate-to-Source Voltage (V) VGS = 0V 0.1 12 8 4 0 0 40 80 120 160 200 240 Q G Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 100 100μsec 10 1msec 1 0.1 Tc = 25°C Tj = 150°C Single Pulse 1 10 10msec 100 1000 10000 V , Drain-toSource Voltage (V) Fig. 8 -DS Maximum Safe Operating Area Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix RD VDS 30 VGS D.U.T. RG + - VDD 24 ID , Drain Current (A) 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 18 Fig. 10a - Switching Time Test Circuit 12 VDS 90 % 6 0 25 50 75 100 125 150 10 % VGS TC , Case Temperature (°C) td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms (Z thJC) 1 D = 0.50 0.1 Thermal Response 0.20 0.10 0.05 0.01 0.02 0.01 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = 2. Peak T 0.001 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC 0.1 +T C 1 t 1, Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 www.vishay.com 5 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix VDS 15 V tp Driver L VDS D.U.T RG + - VDD IAS 20 V tp A IAS 0.01Ω Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms 1000 ID TOP EAS , Single Pulse Avalanche Energy (mJ) 800 13A 19A 30A BOTTOM 600 400 200 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 IRFPS30N60K, SiHFPS30N60K Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - • • • • RG dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91256. Document Number: 91256 S09-0007-Rev. B, 19-Jan-09 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. 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