IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
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Vishay Siliconix
Power MOSFET
FEATURES
S
DPAK
(TO-252)
• Surface mountable
SiHFR9020)
IPAK
(TO-251)
as
IRFR9020,
• Straight lead option (order as IRFU9020,
SiHFU9020)
G
D
(order
D
• Repetitive avalanche ratings
G
Available
• Dynamic dV/dt rating
S
G
D S
• Simple drive requirements
D
• Ease of paralleling
P-Channel MOSFET
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PRODUCT SUMMARY
DESCRIPTION
VDS (V)
RDS(on) (Ω)
-50
VGS = -10 V
Qg max. (nC)
14
Qgs (nC)
6.5
Qgd (nC)
The power MOSFET technology is the key to Vishay’s
advanced line of power MOSFET transistors. The efficient
geometry and unique processing of this latest “State of the
Art” design achieves: very low on-state resistance
combined with high transconductance; superior reverse
energy and diode recovery dV/dt.
0.28
6.5
Configuration
Single
The power MOSFET transistors also feature all of the well
established advantages of MOSFET’S such as voltage
control, very fast switching, ease of paralleling and
temperature stability of the electrical parameters.
Surface-mount packages enhance circuit performance by
reducing stray inductances and capacitance. The TO-252
surface mount package brings the advantages of power
MOSFET’s to high volume applications where PC board
surface mounting is desirable. The surface-mount option
IRFR9020, SiHFR9020 is provided on 16mm tape. The
straight lead option IRFU9020, SiHFU9020 of the device is
called the IPAK (TO-251).
They are well suited for applications where limited heat
dissipation is required such as, computers and peripherals,
telecommunication equipment, DC/DC converters, and a
wide range of consumer products.
ORDERING INFORMATION
PACKAGE
Lead (Pb)-free and halogen-free
Lead (Pb)-free
DPAK (TO-252)
DPAK (TO-252)
DPAK (TO-252)
SiHFR9020-GE3
SiHFR9020TR-GE3 a
SiHFR9020TRL-GE3 a
IPAK (TO-251)
SiHFU9020-GE3
IRFR9020TRLPBF-BE3 ab
-
-
-
IRFR9020PbF
IRFR9020TRPbF a
IRFR9020TRLPbF a
IRFU9020PbF
Notes
a. See device orientation
b. “-BE3” denotes alternate manufacturing location
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
-50
Gate-source voltage
VGS
± 20
TC = 25 °C
VGS at -10 V
Continuous drain current
Pulsed drain currenta
V
-9.9
ID
TC = 100 °C
UNIT
A
-6.3
IDM
-40
Linear derating factor
0.33
W/°C
Single pulse avalanche energy b
EAS
250
mJ
Repetitive avalanche current a
IAR
-9.9
A
Repetitive avalanche energy a
EAR
4.2
mJ
Maximum power dissipation
TC = 25 °C
PD
42
W
dV/dt
5.8
V/ns
TJ, Tstg
-55 to +150
Peak diode recovery dV/dt c
Operating junction and storage temperature range
Soldering recommendations (peak temperature)d
for 10 s
°C
300
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 16)
b. VDD = -25 V, starting TJ = 25 °C, L = 5.1 mH, Rg = 25 Ω, peak IL = -9.9 A
c. ISD ≤ -9.9 A, dI/dt ≤ -120 A/μs, VDD ≤ 40 V, TJ ≤ 150 °C
d. 0.063" (1.6 mm) from case
e. When mounted on 1" square PCB (FR-4 or G-10 material)
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
-
110
Case-to-sink
RthCS
-
1.7
-
Maximum junction-to-case (drain)
RthJC
-
-
3.0
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
Static
Drain-source breakdown voltage
VDS
VGS = 0 V, ID = -250 μA
- 50
-
-
VGS(th)
VDS = VGS, ID = -50 μA
- 2.0
-
- 4.0
V
Gate-source leakage
IGSS
VGS = ±20 V
-
-
± 500
nA
Zero gate voltage drain current
IDSS
VDS = max. rating, VGS = 0 V
-
-
250
VDS = 0.8 x max. rating, VGS = 0 V, TJ = 125 °C
-
-
1000
Gate-source threshold voltage
Drain-source on-state resistance
Forward transconductance
μA
-
0.20
0.28
Ω
gfs
VDS ≤ -50 V, IDS = - 5.7 A
2.3
3.5
-
S
VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 9
-
490
-
-
320
-
-
70
-
-
9.4
14
-
4.3
6.5
-
4.3
6.5
-
8.2
12
-
57
66
-
12
18
RDS(on)
VGS = -10 V
ID = 5.7 A b
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Rise time
Turn-off delay time
tr
td(off)
Fall time
tf
Internal drain inductance
LD
Internal source inductance
LS
VGS = -10 V
ID = -9.7 A, VDS = 0.8 x max.
rating, see fig. 18 (Independent
operating temperature)
VDD = -25 V, ID = -9.7 A,
Rg = 18 Ω, RD = 2.4 Ω, see fig. 17
(Independent operating temperature)
Between lead, 6 mm (0.25")
from package and center of
die contact.
D
G
-
25
38
-
4.5
-
-
7.5
-
pF
nC
ns
nH
S
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
-
-
-9.9
-
-
- 40
-
-
- 6.3
UNIT
Drain-source body diode characteristics
Continuous source-drain diode current
Pulsed diode forward current a
IS
ISM
MOSFET symbol
showing the integral reverse
p - n junction diode
D
G
A
S
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
TJ = 25 °C, IS = - 9.9 A, VGS = 0 V b
TJ = 25 °C, IF = - 9,7 A, dI/dt = 100 A/μs b
V
56
110
280
ns
0.17
0.34
0.85
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 16)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Saturation Characteristics
Fig. 2 - Typical Transfer Characteristics
Fig. 4 - Maximum Safe Operating Area
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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www.vishay.com
Vishay Siliconix
Fig. 5 - Typical Transconductance vs. Drain Current
Fig. 8 - Breakdown Voltage vs. Temperature
Fig. 6 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Breakdown Voltage vs. Temperature
Fig. 10 - Typical Gate Charge vs. Gate-to-Source Voltage
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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www.vishay.com
Fig. 11 - Typical On-Resistance vs. Drain Current
Vishay Siliconix
Fig. 14 - Unclamped Inductive Test Circuit
IAS
VDS
IL
VDD
tp
VDS
Fig. 12 - Maximum Drain Current vs. Case Temperature
Fig. 15 - Unclamped Inductive Waveforms
Fig. 13 - Maximum Avalanche vs. Starting Junction
Temperature
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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Vishay Siliconix
Fig. 16 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration
td(on)
tr
td(off) tf
VGS
10 %
QG
- 10 V
QGS
90 %
VDS
QGD
VG
Charge
Fig. 17 - Switching Time Waveforms
Fig. 19 - Basic Gate Charge Waveform
Fig. 18 - Switching Time Test Circuit
Fig. 20 - Gate Charge Test Circuit
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
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www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 21 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?90350.
S21-0771-Rev. E, 19-Jul-2021
Document Number: 90350
7
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
TO-252AA Case Outline
VERSION 1: FACILITY CODE = Y
E
A
C2
H
D
D1
L3
b3
e
b2
e1
L
gage plane height (0.5 mm)
L4
b
L5
E1
C
A1
MILLIMETERS
DIM.
MIN.
A
2.18
MAX.
2.38
A1
-
0.127
b
0.64
0.88
b2
0.76
1.14
b3
4.95
5.46
C
0.46
0.61
C2
0.46
0.89
D
5.97
6.22
D1
4.10
-
E
6.35
6.73
E1
4.32
-
H
9.40
10.41
e
2.28 BSC
e1
4.56 BSC
L
1.40
1.78
L3
0.89
1.27
L4
-
1.02
L5
1.01
1.52
Note
• Dimension L3 is for reference only
Revision: 03-Oct-2022
Document Number: 71197
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
VERSION 2: FACILITY CODE = N
E
e
A
b3
E1
E1/2
c2
θ
e
L4
L5
L6
H
D
L3
D1
θ
0.25
(3°)
DETAIL "B"
C A B
(3°)
DETAIL "B"
A1
C
L
(L1)
b1
SEATING
C
PLANE
θ
L2
GAUGE
PLANE
H
C
(b)
c1
3x b
2x e
c
2x b2
MILLIMETERS
MILLIMETERS
DIM.
A
MIN.
2.18
MAX.
DIM.
MIN.
2.39
L
1.50
A1
-
0.13
L1
b
0.65
0.89
L2
MAX.
1.78
2.74 ref.
0.51 BSC
b1
0.64
0.79
L3
b2
0.76
1.13
L4
-
1.02
b3
4.95
5.46
L5
1.14
1.49
c
0.46
0.61
L6
0.65
0.85
c1
0.41
0.56
0°
10°
1
0°
15°
2
25°
35°
c2
0.46
0.60
D
5.97
6.22
D1
5.21
-
E
6.35
6.73
E1
4.32
e
H
2.29 BSC
9.94
0.89
1.27
Notes
• Dimensioning and tolerance confirm to ASME Y14.5M-1994
• All dimensions are in millimeters. Angles are in degrees
• Heat sink side flash is max. 0.8 mm
• Radius on terminal is optional
10.34
ECN: E22-0399-Rev. R, 03-Oct-2022
DWG: 5347
Revision: 03-Oct-2022
Document Number: 71197
2
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
Case Outline for TO-251AA (High Voltage)
OPTION 1:
4
E1
3
E
Thermal PAD
4
b4
θ2
4
A
0.010 0.25 M C A B
L2 4
c2
A
θ1
B
D
D1
A
C
3
Seating
plane
5
C
L1 L3
(Datum A)
C
L
B
B
A
A1
3 x b2
View A - A
2xe
c
3xb
0.010 0.25 M C A B
Plating
5
b1, b3
Base
metal
Lead tip
5
c1
(c)
(b, b2)
Section B - B and C - C
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
DIM.
MIN.
MAX.
MIN.
A
2.18
2.39
0.086
0.094
D1
5.21
-
0.205
MAX.
-
A1
0.89
1.14
0.035
0.045
E
6.35
6.73
0.250
0.265
4.32
-
0.170
-
b
0.64
0.89
0.025
0.035
E1
b1
0.65
0.79
0.026
0.031
e
b2
0.76
1.14
0.030
0.045
L
8.89
9.65
0.350
0.380
b3
0.76
1.04
0.030
0.041
L1
1.91
2.29
0.075
0.090
b4
4.95
5.46
0.195
0.215
L2
0.89
1.27
0.035
0.050
c
0.46
0.61
0.018
0.024
L3
1.14
1.52
0.045
0.060
c1
0.41
0.56
0.016
0.022
1
0'
15'
0'
15'
c2
0.46
0.86
0.018
0.034
2
25'
35'
25'
35'
D
5.97
6.22
0.235
0.245
2.29 BSC
2.29 BSC
ECN: E21-0682-Rev. C, 27-Dec-2021
DWG: 5968
Notes
• Dimensioning and tolerancing per ASME Y14.5M-1994
• Dimension are shown in inches and millimeters
• Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
• Thermal pad contour optional with dimensions b4, L2, E1 and D1
• Lead dimension uncontrolled in L3
• Dimension b1, b3 and c1 apply to base metal only
• Outline conforms to JEDEC® outline TO-251AA
Revision: 27-Dec-2021
Document Number: 91362
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
OPTION 2: FACILITY CODE = N
E
A
L2
b4
c2
E1
D2
θ1
CL
L4
θ1
D
D1
Ø 1.00
x 0.10 deep
C
B
B
L
L3
L1
C
b2
A1
b
b1, b3
c
c
e
c1
θ2
Third angle
projection
b, b2
Section “B-B” and “C-C”
DIM.
MIN.
NOM.
MAX.
DIM.
MIN.
NOM.
A
2.180
2.285
2.390
D2
5.380
-
MAX.
-
A1
0.890
1.015
1.140
E
6.350
6.540
6.730
4.32
-
-
b
0.640
0.765
0.890
E1
b1
0.640
0.715
0.790
e
b2
0.760
0.950
1.140
L
8.890
9.270
9.650
b3
0.760
0.900
1.040
L1
1.910
2.100
2.290
b4
4.950
5.205
5.460
L2
0.890
1.080
1.270
c
0.460
-
0.610
L3
1.140
1.330
1.520
c1
0.410
-
0.560
L4
1.300
1.400
1.500
c2
0.460
-
0.610
1
0°
7.5°
15°
D
5.970
6.095
6.220
2
4°
-
-
D1
4.300
-
-
2.29 BSC
ECN: E21-0682-Rev. C, 27-Dec-2021
DWG: 5968
Notes
• Dimensioning and tolerancing per ASME Y14.5M-1994
• All dimension are in millimeters, angles are in degrees
• Heat sink side flash is max. 0.8 mm
Revision: 27-Dec-2021
Document Number: 91362
2
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
0.243
0.087
(2.202)
0.090
(2.286)
(10.668)
0.420
(6.180)
(5.690)
0.180
0.055
(4.572)
(1.397)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Return to Index
APPLICATION NOTE
Document Number: 72594
Revision: 21-Jan-08
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