MAL213835101E3

HFBR-57E0LZ/ALZ/PZ/APZ Multimode Small Form Factor Pluggable Transceivers with LC connector for ATM, FDDI, Fast Ethernet and SONET OC-3/SDH STM-1 Data Sheet Description Features The HFBR-57E0 Small Form Factor Pluggable LC transceivers provide the system designer with a product to implement a range of solutions for multimode fiber Fast Ethernet and SONET OC-3 (SDH STM-1) physical layers for ATM and other services. x RoHS compliant x Full compliance with ATM Forum UNI SONET OC-3 multimode fiber physical layer specification x Full compliance with the optical performance requirements of the FDDI PMD Standard x Full compliance with the optical performance requirements of 100Base-FX version of IEEE802.3u x Industry standard Small Form Pluggable (SFP) package x LC duplex connector optical interface x Operates with 62.5/125 μm and 50/125 μm multimode fiber x Single +3.3 V power supply x +3.3 V TTL LOS output x Receiver outputs are squelch enabled x Manufactured in an ISO 9001 certified facility x Temperature range: 0 °C to +70° C HFBR-57E0LZ/PZ: -40 °C to +85 °C HFBR-57E0ALZ/APZ: x Bail de-latch option This transceiver operates at a nominal wavelength of 1300 nm with an LC fiber connector interface with an external connector shield (HFBR-57E0). Transmitter Section The transmitter section of the HFBR-57E0 utilizes a 1300 nm InGaAsP LED. This LED is packaged in the optical subassembly portion of the transmitter section. It is driven by a custom silicon IC which converts differential PECL logic signals, ECL referenced (shifted) to a +3.3 V supply, into an analog LED drive current. Receiver Section The receiver section of the HFBR-57E0 utilizes an InGaAs PIN photodiode coupled to a custom silicon transimpedance preamplifier IC. It is packaged in the optical subassembly portion of the receiver. This PIN/preamplifier combination is coupled to a custom quantizer IC which provides the final pulse shaping for the logic output and the Loss of Signal (LOS) function. The data output is differential. The data output is PECL compatible, ECL referenced (shifted) to a +3.3 V power supply. This circuit also includes a loss of signal (LOS) detection circuit which provides an open collector logic high output in the absence of a usable input optical signal. The LOS output is +3.3 V TTL. Applications x OC-3 SFP transceivers are designed for ATM LAN and WAN applications such as: ATM switches and routers SONET/SDH switch infrastructure x Multimode fiber ATM backbone links x Fast Ethernet Loss of Signal The Loss of Signal (LOS) output indicates that the optical input signal to the receiver does not meet the minimum detectablelevel for FDDI and OC-3 compliant signals. When LOS is high it indicates loss of signal. When LOS is low it indicates normal operation. The LOS thresholds are set to indicate a definite optical fault has occurred (e.g., disconnected or broken fiber connection to receiver, failed transmitter). Module Package The transceiver meets the Small Form Pluggable (SFP) industry standard package utilizing an integral LC duplex optical interface connector. The hot-pluggable capability of the SFP package allows the module to be installed at any time – even with the host system operating and on-line. This allows for system configuration changes or maintenance without system down time. The HFBR-57E0 uses a reliable 1300 nm LED source and requires a 3.3 V dc power supply for optimal design. Module Diagrams Figure 1 illustrates the major functional components of the HFBR-57E0. The connection diagram of the module is shown in Figure 2. Figures 5 and 7 depict the external configuration and dimensions of the module. Installation The HFBR-57E0 can be installed in or removed from any MultiSource Agreement (MSA) – compliant Small Form Pluggable port regardless of whether the host equip- 20 V EE T 1 V EE T 19 TD- 2 NC** 18 TD+ 3 Tx Disable 17 V EE T 4 MOD-DEF(2) 16 V CC T 5 MOD-DEF(1) 15 V CC R 6 MOD-DEF(0) 14 V EE R 7 NC 13 RD+ 8 LOS 12 RD- 9 V EE R 11 V EE R 10 V EE R TOP OF BOARD BOTTOM OF BOARD (AS VIEWED THROUGH TOP OF BOARD) ** Connect to Internal Ground. Figure 2. Connection diagram of module printed circuit board. ment is operating or not. The module is simply inserted, electrical interface first, under finger pressure. Controlled hot-plugging is ensured by design and by 3-stage pin sequencing at the electrical interface. The module housing makes initial contact with the host board EMI shield mitigating potential damage due to Electro-Static Discharge (ESD). The 3-stage pin contact sequencing involves (1) Ground, (2) Power, and then (3) Signal pins, making contact with the host board surface mount connector in that order. This printed circuit board card-edge connector is depicted in Figure 2. ELECTRICAL INTERFACE OPTICAL INTERFACE RECEIVER RD+ (Receive Data) Light from Fiber Photodetector Amplification & Quantizattion RD- (Receive Data) Loss of Signal TRANSMITTER TD+ (Transmit Data) Light to Fiber LED LED DRIVER TD- (Transmit Data) TX Disable EEPROM Figure 1. Transceiver functional diagram 2 MOD-DEF2 MOD-DEF1 MOD-DEF0 Serial Identification (EEPROM) Electrostatic Discharge (ESD) The HFBR-57E0 complies with the industry standard MSA that defines the serial identification protocol. This protocol uses the 2-wire serial CMOS E2PROM protocol of the ATMEL AT24C01A or equivalent. The contents of the HFBR-57E0 serial ID memory are defined in Table 3 as specified in the SFP MSA. There are two conditions in which immunity to ESD damage is important. Table 1 documents our immunity to both of these conditions. The first condition is during handling of the transceiver prior to insertion into the transceiver port. To protect the transceiver, it is important to use normal ESD handling precautions. Functional Data I/O These precautions include using grounded wrist straps, workbenches, and floor mats in ESD controlled areas. The ESD sensitivity of the HFBR-57E0 is compatible with typical industry production environments. The second condition is static discharges to the exterior of the host equipment chassis after installation. To the extent that the duplex LC optical interface is exposed to the outside of the host equipment chassis, it may be subject to systemlevel ESD requirements. The ESD performance of the HFBR-57E0 exceeds typical industry standards. The HFBR-57E0 fiberoptic transceiver is designed to accept industry standard differential signals. In order to reduce the number of passive components required on the customer’s board, Avago has included the functionality of the transmitter bias resistors and coupling capacitors within the fiberoptic module. The transceiver is compatible with an “ac-coupled” configuration and is internally terminated. Figure 5 depicts the functional diagram of the HFBR-57E0. Immunity Regulatory Compliance See Table 1 for transceiver Regulatory Compliance performance. The overall equipment design will determine the certification level. The transceiver performance is offered as a figure of merit to assist the designer. Equipment hosting the HFBR-57E0 modules will be subjected to radio-frequency electro magnetic fields in some environments. These transceivers have good immunity to such fields due to their shielded design. Table 1. Regulatory Compliance Feature Test Method Performance Electrostatic Discharge (ESD) to the Electrical Pins MIL-STD-883C Meets Class 2 (2000 to 3999 Volts).Withstand up to 2200 V applied between electrical pins. Electrostatic Discharge (ESD) to the Duplex LC Receptacle Variation of IEC 61000-4-2 Typically withstand at least 25 kV without damage when the LC connector receptacle is contacted by a Human Body Model probe. Electromagnetic Interference (EMI) FCC Class B CENELEC CEN55022 Class B (CISPR 21) VCCI Class 1 System margins are dependent on customer board and chassis design. Immunity Variation of IEC 61000-4-3 Typically shows a negligible effect from a 10 V/m field swept from 80 to 450 MHz applied to the transceiver without a chassis enclosure. Eye Safety AEL Class 1 EN60825-1 (+A11) Compliant per Avago testing under single fault conditions. TUV Certification: R 72042022 Component Recognition Underwriters Laboratories and Canadian Standard Associations Joint Component Recognition for Information Technology Equipment Including Electrical Business Equipment UL File#: E173874 RoHS Compliance 3 Reference to EU RoHS Directive 2002/95/EC Electromagnetic Interference (EMI) Ordering Information Most equipment designs utilizing these high-speed transceivers from Avago will be required to meet the requirements of FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The HFBR-57E0 1300 nm product is available for production orders through the Avago Component Field Sales Offices and Authorized Distributors worldwide. Eye Safety These transceivers provide Class 1 eye safety by design. Avago has tested the transceiver design for compliance with the requirements listed in Table 1 under normal operating conditions and under a single fault condition. Flammability The HFBR-57E0 transceiver housing is made of metal and high strength, heat resistant, chemically resistant, and UL 94V-0 flame retardant plastic. Shipping Container For technical information regarding this product, please visit the Avago website at www.avagotech.com. Use the quick search feature to search for this part number. You may also contact the Avago Products Customer Response Centre. Applications Support Materials Contact your local Avago Component Field Sales Office for information on how to obtain PCB layouts and evaluation boards for the transceivers. 200 1.0 160 2.0 tr/f – TRANSMITTER OUTPUT OPTICAL RISE/ FALL TIMES – ns 2.5 120 3.0 100 1260 1280 1300 1340 1320 1360 l C – TRANSMITTER OUTPUT OPTICAL RISE/FALL TIMES – ns HFBR-57E0 TRANSMITTER TEST RESULTS OF l C , Dl AND t r/f ARE CORRELATED AND COMPLY WITH THE ALLOWED SPECTRAL WIDTH AS A FUNCTION OF CENTER WAVELENGTH FOR VARIOUS RISE AND FALL TIMES. Transceiver Optical Power Budget versus Link Length Figure 3. Transmitter Output Optical Spectral Width (FWHM) vs. Transmitter Output Optical Center Wavelength and Rise/Fall Times 6 5 RELATIVE INPUT OPTICAL POWER (dB) Avago LED technology has produced 1300 nm LED devices with lower aging characteristics than normally associated with these technologies in the industry. The industry convention is 1.5 db aging for 1300 nm LEDs. The 1300 nm Avago LEDs are specified to experience less than 1 db of aging over normal commercial equipment mission life periods. Contact your Avago sales representative for additional details. 1.5 140 The transceiver is packaged in a shipping container designed to protect it from mechanical and ESD damage during shipment or storage. Optical Power Budget (OPB) is the available optical power for a fiberoptic link to accommodate fiber cable loses plus losses due to in-line connectors, splices, optical switches, and to provide margin for link aging and unplanned losses due to cable plant reconfiguration or repair. 3.0 180 Dl - TRANSMITTER OUTPUT OPTICAL SPECTRAL WIDTH (FWHM) - nm The metal housing and shielded design of the HFBR-57E0 minimize the EMI challenge facing the host equipment designer. These transceivers provide superior EMI performance. This greatly assists the designer in the management of the overall system EMI performance. 4 3 2 1 0 -3 -2 -1 0 1 2 3 EYE SAMPLING TIME POSITION (ns) CONDITIONS: 1. T A = +25 C 2. V CC = 3.3 V dc 3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns. 4. INPUT OPTICAL POWER IS NORMALIZED TO CENTER OF DATA SYMBOL. 5. NOTE 13 AND 14 APPLY. Figure 4. Relative Input Optical Power vs. Eye Sampling Time Position 4 1 μH 3.3 V 10 μF 0.1 μF 1 μH 0.1 μF 3.3 V Vc c T HFBR-57E0 4.7 K to 10 K Tx Dis 3.3 V SO+ 50 Ω TD+ SO– 50 Ω TD– TX GND 0.1 μF 10 μF SI+ 50 Ω RD+ SI– 50 Ω RD– Rx_LOS RX GND Rx_LOS 0.1 μF 130 Ω 0.1 μF 0.1 μF 82 Ω MOD_DEF2 MOD_DEF1 MOD_DEF0 GPIO(X) GPIO(X) GP14 4.7 K to 10 K 4.7 K to 10 K 4.7 K to 10 K 3.3 V Figure 5. Recommended application configuration 1 μH V CC T 0.1 μF 1 μH V CC R 3.3 V 0.1 μF SFP MODULE 10 μF 0.1 μF HOST BOARD Note: Inductors must have less than 1 ohm series resistance per MSA. Figure 6. MSA required power supply filter 5 10 μF 82 Ω LED DRIVER & SAFETY CIRCUITRY 130 Ω VccR 4.7 K to 10 K SerDes PROTOCOL IC 82 Ω 0.1 μF 130 Ω 3.3 V 130 Ω AMPLIFICATION & QUANTIZATION 82 Ω EEPROM Table 2. Pin Description Pin Name Function/Description MSA Notes 1 VEET Transmitter Ground 2 NC NC 3 Tx Disable Transmitter Disable- Module disables on high or open 4 MOD-DEF2 Module Definition 2 - Two Wire Serial ID Interface 2 5 MOD-DEF1 Module Definition 1 - Two Wire Serial ID Interface 2 6 MOD-DEF0 Module Definition 0 - grounded in module 2 7 NC NC 8 LOS Loss of Signal - high indicates loss of signal 9 VEER Receiver Ground 10 VEER Receiver Ground 11 VEER Receiver Ground 12 RD- Inverse Received Data Out 4 13 RD+ Received Data Out 4 14 VEER Receiver Ground 15 VCCR Receiver Power -3.3 V ± 10% 5 16 VCCT Transmitter Power -3.3 V ± 10% 5 1 3 17 VEET Transmitter Ground 18 TD+ Transmitter Data In 6 19 TD- Inverse Transmitter Data In 6 20 VEET Transmitter Ground Notes: 1. Pin 2 connected to internal ground. 2. Mod-Def 0, 1, 2. are the module definition pins. They should be pulled up with a 4.7 K - 10 K: resistor on the host board to a supply less than VCCT +0.3 V or VCCR +0.3 V. Mod-Def 0 is grounded by the module to indicate that the module is present. Mod-Def 1 is clock line of two wire serial interface for optional serial ID. Mod-Def 2 is data line of two wire serial interface for optional serial ID. 3. LOS (Loss of Signal) is an open collector/drain output which should be pulled up externally with a 4.7 - 10 K:resistor on the host board to a supply < VCCT, R +0.3 V. When high, this output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). Low indicates normal operation. In the low state, the output will be pulled to