SI1869DH-T1-GE3

Si1869DH www.vishay.com Vishay Siliconix Load Switch with Level-Shift FEATURES SC-70 (6 leads) SOT-363 ON/OFF 5 R1, C1 6 • TrenchFET® power MOSFETs: 1.8 V rated S2 4 • ESD protected: 2000 V on input switch, VON/OFF • 165 m low RDS(on) • 1.8 V to 20 V input • 1.5 V to 8 V logic level control 1 R2 Top View 2 D2 3 D2 • Adjustable slew-rate • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Marking code: VC APPLICATIONS • Level-shift for portable devices PRODUCT SUMMARY VD2S2 (V) Si1869DH 4 2, 3 S2 0.165 RDS(on) max. () at VGS = 2.5 V 0.222 RDS(on) max. () at VGS = 1.8 V 0.303 ID (A) ± 1.2 D2 Q2 -20 RDS(on) max. () at VGS = 4.5 V Configuration Available • Low profile, small footprint SC-70-6 package 6 R1, C1 5 Q1 ON/OFF Level-Shift R2 1 ORDERING INFORMATION Package SC-70 Lead (Pb)-free Si1869DH-T1-E3 Lead (Pb)-free and halogen-free Si1869DH-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage (D2-S2) VDS -20 Input voltage VIN 20 ON/OFF voltage Load current VON/OFF Continuous a, b Continuous intrinsic diode conduction a Maximum power dissipation a Operating junction and storage temperature range ESD rating, MIL-STD-883D human body model (100 pF, 1500 ) Pulsed b, c UNIT V 8 ± 1.2 IL A ±3 IS -0.4 PD 1 W TJ, Tstg -55 to +150 °C ESD 2 kV THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM Maximum junction-to-ambient (continuous current) a RthJA 100 125 Maximum junction-to-foot (Q2) RthJF 44 55 UNIT °C/W Notes a. Surface mounted on FR4 board b. VIN = 20 V, VON/OFF = 8 V, TA = 25 °C c. Pulse test: pulse width  300 μs, duty cycle  2 % S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 1 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si1869DH www.vishay.com Vishay Siliconix SPECIFICATIONS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Reverse leakage current IFL VIN = 8 V, VON/OFF = 0 V - Diode forward voltage VSD IS = -0.4 A 0.4 - 1 μA 0.6 1.1 V 1.8 - 20 -20 - - OFF Characteristics ON Characteristics Input voltage range a VIN Drain to source breakdown voltage (p-channel) VDS On-resistance (p-channel) at 1 A VGS = 0 V, ID = -250 μA VON/OFF = 1.5 V, VIN = 4.5 V, ID = 1.2 A - 0.132 0.165 VON/OFF = 1.5 V, VIN = 2.5 V, ID = 1 A - 0.177 0.222 VON/OFF = 1.5 V, VIN = 1.8 V, ID = 0.7 A - 0.242 0.303 VIN-OUT  0.2 V, VIN = 5 V, VON/OFF = 1.5 V 1 - - VIN-OUT  0.3 V, VIN = 3 V, VON/OFF = 1.5 V 1 - - RDS(on) On-state (p-channel) drain-current ID(on) V  A Note a. VIN = < 12 V, VON/OFF = 8 V, TA = 25 °C; recommended application specifications Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. APPLICATION CIRCUITS Si1869DH 40 tf 35 2, 3 4 VOUT VIN IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 30 Q2 C1 6 25 Time (µs) R1 6 20 td(off) 15 5 ON/OFF LOAD Co 10 Q1 5 tr td(on) 0 Ci 1 0 4 6 8 10 R2 (kΩ) R2 GND R2 2 Note: For R2 switching variations with other VIN/R1 combinations see Typical Characteristics Switching Variation R2 at VIN = 2.5 V, R1 = 20 k COMPONENTS R1 Pull-Up Resistor Typical 10 k to 1 M a R2 Optional Slew-Rate Control Typical 0 to 100 k a C1 Optional Slew-Rate Control Typical 1000 pF The Si1869DH is ideally suited for high side load switching in portable applications. The integrated n-channel level-shift device saves space by reducing external components. The slew rate is set externally so that rise-times can be tailored to different load types. Note a. Minimum R1 value should be at least 10 x R2 to ensure Q1 turn-on S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 2 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si1869DH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.6 0.6 0.5 0.5 0.4 0.4 VDROP (V) V DROP (V) VON/OFF = 1.5 V to 8 V TJ = 125 °C 0.3 TJ = 25 °C 0.2 VON/OFF = 1.5 V to 8 V TJ = 125 °C 0.3 0.2 TJ = 25 °C 0.1 0.1 0.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.0 3.0 0.5 1.0 1.5 2.0 IL (A) IL (A) VDROP vs. IL at VIN = 4.5 V VDROP vs. IL at VIN = 2.5 V 0.6 2.5 0.5 VON/OFF = 1.5 V to 8 V VON/OFF = 1.5 V to 8 V 0.5 0.4 V DROP (V) VDROP (V) 0.4 TJ = 125 °C 0.3 TJ = 25 °C 0.3 0.2 TJ = 125 °C 0.2 0.1 0.1 TJ = 25 °C 0.0 0.0 0.0 0.2 0.4 0.6 0.8 IL (A) 1.0 1.2 1.4 1.6 0 1 VDROP vs. IL at VIN = 1.8 V 2 3 VIN (V) 5 6 VDROP vs. VIN at IL = 0.7 A 0.10 0.5 IL = 0.7 A VON/OFF = 1.5 V to 8 V IL = 0.7 A VON/OFF = 1.5 V to 8 V R SS(on) - On-Resistance (Ω) 0.06 VIN = 1.8 V V DROP Variance (V) 4 VIN = 4.5 V 0.02 - 0.02 - 0.06 0.4 0.3 TJ = 125 °C 0.2 TJ = 25 °C 0.1 - 0.10 - 50 0.0 - 25 0 25 50 75 100 TJ - Junction Temperature (°C) 125 150 VDROP Variance vs. Junction Temperature S18-0276-Rev. D, 12-Mar-18 0 1 2 3 VIN (V) 4 5 6 On-Resistance vs. Input Voltage Document Number: 73449 3 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si1869DH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 20 IL = 0.7 A VON/OFF = 1.5 V to 8 V VIN = 4.5 V 1.4 tf VIN = 1.8 V 1.2 td(off) 16 Time ( µs) R DS(on) - On-Resistance (Normalized) 1.6 1.0 0.8 12 IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 8 4 tr 0.6 - 50 td(on) 0 - 25 0 25 50 75 100 TJ - Junction Temperature (°C) 125 150 0 2 4 6 8 10 R2 (kΩ) Switching Variation R2 at VIN = 4.5 V, R1 = 20 k Normalized On-Resistance vs. Junction Temperature 100 40 tf 35 IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 25 80 Time ( µs) Time ( µs) 30 20 td(off) 15 tf IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 60 40 10 td(off) 20 5 tr td(on) tr 0 0 0 2 4 6 8 10 0 td(on) 2 4 R2 (kΩ) 6 8 10 R2 (kΩ) Switching Variation R2 at VIN = 2.5 V, R1 = 20 k Switching Variation R2 at VIN = 1.8 V, R1 = 20 k 200 250 td(off) td(off) 200 150 Time ( µs) Time ( µs) 150 IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 100 IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF 100 tf tf 50 50 tr td(on) td(on) tr 0 0 0 20 40 60 80 100 R2 (kΩ) Switching Variation R2 at VIN = 4.5 V, R1 = 300 k S18-0276-Rev. D, 12-Mar-18 0 20 40 60 R2 (kΩ) 80 100 Switching Variation R2 at VIN = 2.5 V, R1 = 300 k Document Number: 73449 4 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si1869DH www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 200 td(off) IL = 1 A VON/OFF = 3 V Ci = 10 µF Co = 1 µF Time ( µs) 150 100 tf 50 td(on) tr 0 0 20 40 60 80 100 R2 (kΩ) Switching Variation R2 at VIN = 1.8 V, R1 = 300 k 2 Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 0.05 t1 t2 1. Duty Cycle, D = 0.02 t1 t2 2. Per Unit Base = RthJA = 100 °C/W 3. TJM - TA = PDMZthJA(t) Single Pulse 0.01 10-4 4. Surface Mounted 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73449. S18-0276-Rev. D, 12-Mar-18 Document Number: 73449 5 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SCĆ70: 6ĆLEADS MILLIMETERS 6 5 Dim A A1 A2 b c D E E1 e e1 L 4 E1 E 1 2 3 -B- e b e1 D -Ac A2 A L A1 Document Number: 71154 06-Jul-01 INCHES Min Nom Max Min Nom Max 0.90 – 1.10 0.035 – 0.043 – – 0.10 – – 0.004 0.80 – 1.00 0.031 – 0.039 0.15 – 0.30 0.006 – 0.012 0.10 – 0.25 0.004 – 0.010 1.80 2.00 2.20 0.071 0.079 0.087 1.80 2.10 2.40 0.071 0.083 0.094 1.15 1.25 1.35 0.045 0.049 0.053 0.65BSC 0.026BSC 1.20 1.30 1.40 0.047 0.051 0.055 0.10 0.20 0.30 0.004 0.008 0.012 7_Nom 7_Nom ECN: S-03946—Rev. B, 09-Jul-01 DWG: 5550 www.vishay.com 1 AN816 Vishay Siliconix Dual-Channel LITTLE FOOTR 6-Pin SC-70 MOSFET Copper Leadframe Version Recommended Pad Pattern and Thermal Performance INTRODUCTION 87 (mil) 26 (mil) The new dual 6-pin SC-70 package with a copper leadframe enables improved on-resistance values and enhanced thermal performance as compared to the existing 3-pin and 6-pin packages with Alloy 42 leadframes. These devices are intended for small to medium load applications where a miniaturized package is required. Devices in this package come in a range of on-resistance values, in n-channel and p-channel versions. This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the dual-channel version. 6 5 96 (mil) 71 (mil) 48 (mil) 23 (mil) 61 (mil) 1 PIN-OUT 4 2 3 0.0 (mil) Figure 1 shows the pin-out description and Pin 1 identification for the dual-channel SC-70 device in the 6-pin configuration. Both n-and p-channel devices are available in this package – the drawing example below illustrates the p-channel device. 26 (mil) 16 (mil) FIGURE 2. SOT-363 SC-70 (6-LEADS) S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 Top View FIGURE 1. For package dimensions see outline drawing SC-70 (6-Leads) (http://www.vishay.com/doc?71154) BASIC PAD PATTERNS See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286) for the SC-70 6-pin basic pad layout and dimensions. This pad pattern is sufficient for the low-power applications for which this package is intended. Increasing the drain pad pattern (Figure 2) yields a reduction in thermal resistance and is a preferred footprint. Document Number: 71405 12-Dec-03 8 (mil) SC-70 (6 leads) Dual EVALUATION BOARD FOR THE DUALCHANNEL SC70-6 The 6-pin SC-70 evaluation board (EVB) shown in Figure 3 measures 0.6 in. by 0.5 in. The copper pad traces are the same as described in the previous section, Basic Pad Patterns. The board allows for examination from the outer pins to the 6-pin DIP connections, permitting test sockets to be used in evaluation testing. The thermal performance of the dual 6-pin SC-70 has been measured on the EVB, comparing both the copper and Alloy 42 leadframes. This test was then repeated using the 1-inch2 PCB with dual-side copper coating. A helpful way of displaying the thermal performance of the 6-pin SC-70 dual copper leadframe is to compare it to the traditional Alloy 42 version. www.vishay.com 1 AN816 Vishay Siliconix Front of Board SC70-6 Back of Board SC70-6 S1 D1 G1 G2 D2 S2 vishay.com SC70−6 DUAL FIGURE 3. THERMAL PERFORMANCE Junction-to-Foot Thermal Resistance (the Package Performance) COOPER LEADFRAME Room Ambient 25 _C Thermal performance for the dual SC-70 6-pin package is measured as junction-to-foot thermal resistance, in which the “foot” is the drain lead of the device as it connects with the body. The junction-to-foot thermal resistance for this device is typically 80_C/W, with a maximum thermal resistance of approximately 100_C/W. This data compares favorably with another compact, dual-channel package – the dual TSOP-6 – which features a typical thermal resistance of 75_C/W and a maximum of 90_C/W. PD + Elevated Ambient 60 _C T J(max) * T A Rq JA PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 224 CńW o o P D + 150 Co* 60 C 224 CńW P D + 558 mW P D + 402 mW Although they are intended for low-power applications, devices in the 6-pin SC-70 dual-channel configuration will handle power dissipation in excess of 0.5 W. TESTING Power Dissipation The typical RθJA for the dual-channel 6-pin SC-70 with a copper leadframe is 224_C/W steady-state, compared to 413_C/W for the Alloy 42 version. All figures are based on the 1-inch2 FR4 test board. The following example shows how the thermal resistance impacts power dissipation for the dual 6-pin SC-70 package at varying ambient temperatures. To further aid the comparison of copper and Alloy 42 leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin SC-70 thermal performance on two different board sizes and pad patterns. The measured steady-state values of RθJA for the dual 6-pin SC-70 with varying leadframes are as follows: LITTLE FOOT 6-PIN SC-70 1) Minimum recommended pad pattern on the EVB board (see Figure 3). Alloy 42 Leadframe 1-inch2 2) Industry standard PCB with maximum copper both sides. ALLOY 42 LEADFRAME Room Ambient 25 _C PD + T J(max) * T A PD + T J(max) * T A Rq JA o o P D + 150 Co* 25 C 413 CńW o o P D + 150 Co* 60 C 413 CńW P D + 303 mW P D + 218 mW www.vishay.com 2 Rq JA Elevated Ambient 60 _C Alloy 42 Copper 518_C/W 344_C/W 413_C/W 224_C/W The results indicate that designers can reduce thermal resistance (θJA) by 34% simply by using the copper leadframe device as opposed to the Alloy 42 version. In this example, a 174_C/W reduction was achieved without an increase in board area. If an increase in board size is feasible, a further 120_C/W reduction can be obtained by utilizing a 1-inch2. PCB area. The Dual copper leadframe versions have the following suffix: Dual: Compl.: Si19xxEDH Si15xxEDH Document Number: 71405 12-Dec-03 AN816 500 500 400 400 Thermal Resistance (C/W) Thermal Resistance (C/W) Vishay Siliconix 300 Alloy 42 200 Copper 100 300 Alloy 42 200 100 Copper 0 0 10-5 10-4 10-3 10-2 10-1 1 10 100 1000 10-5 Dual SC70-6 Thermal Performance on EVB Document Number: 71405 12-Dec-03 10-3 10-2 10-1 1 10 100 1000 Time (Secs) Time (Secs) FIGURE 4. 10-4 FIGURE 5. Dual SC70-6 Comparison on 1-inch2 PCB www.vishay.com 3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead 0.067 0.026 (0.648) 0.045 (1.143) 0.096 (2.438) (1.702) 0.016 0.026 0.010 (0.406) (0.648) (0.241) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 18 Document Number: 72602 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Document Number: 91000