Si3440ADV
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Vishay Siliconix
N-Channel 150 V (D-S) MOSFET
FEATURES
TSOP-6 Single
D
6
D
5
S
4
• ThunderFET® power MOSFET
• 100 % Rg tested
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
1
D
Top View
2
D
3
G
APPLICATIONS
• DC/DC converters
• Boost converters
G
• LED backlighting
Marking code: BS
• PD switch
PRODUCT SUMMARY
VDS (V)
RDS(on) max. (Ω) at VGS = 10 V
RDS(on) max. (Ω) at VGS = 4.5 V
Qg typ. (nC)
ID (A) d
Configuration
D
N-Channel MOSFET
• Load switch
S
150
0.380
0.432
1.65
2.2
Single
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
TSOP-6
Si3440ADV-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
SYMBOL
VDS
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Pulsed drain current (t = 100 μs)
LIMIT
150
± 20
2.2
1.7
1.6 a, b
1.3 a, b
4
3
1.7 a, b
3
0.45
3.6
2.3
2 a, b
1.3 a, b
-55 to +150
ID
IDM
Continuous source-drain diode current
TC = 25 °C
TA = 25 °C
IS
Single pulse avalanche current
Single pulse avalanche energy
L = 0.1 mH
IAS
EAS
TC = 25 °C
TC = 70 °C
Maximum power dissipation
TA = 25 °C
TA = 70 °C
Operating junction and storage temperature range
PD
TJ, Tstg
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum junction-to-ambient a, c
Maximum junction-to-foot (drain)
t ≤ 10 s
Steady state
SYMBOL
RthJA
RthJF
TYPICAL
50
28
MAXIMUM
62.5
35
UNIT
°C/W
Notes
a. Surface mounted on 1" x 1" FR4 board
b. t = 10 s
c. Maximum under steady state conditions is 110 °C/W
d. TC = 25 °C
S17-0904-Rev. B, 12-Jun-17
Document Number: 75594
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Si3440ADV
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SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
150
-
-
V
-
135
-
-
-5.6
-
Static
Drain-source breakdown voltage
VDS temperature coefficient
ΔVDS/TJ
VGS(th) temperature coefficient
ΔVGS(th)/TJ
Gate-source threshold voltage
ID = 250 μA
mV/°C
VGS(th)
VDS = VGS, ID = 250 μA
2
-
4
V
Gate-source leakage
IGSS
VDS = 0 V, VGS = ± 20 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
On-state drain current a
ID(on)
Drain-source on-state resistance a
Forward transconductance a
RDS(on)
gfs
VDS = 150 V, VGS = 0 V
-
-
1
VDS = 150 V, VGS = 0 V, TJ = 70 °C
-
-
10
VDS ≤ 10 V, VGS = 10 V
4
-
-
VGS = 10 V, ID = 1.5 A
-
0.316
0.380
VGS = 7.5 V, ID = 1 A
-
0.345
0.432
VDS = 50 V, ID = 1.5 A
-
2.4
-
-
80
-
-
26
-
-
3
-
-
2
4
μA
A
Ω
S
Dynamic b
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Gate resistance
Rg
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDS = 75 V, VGS = 0 V, f = 1 MHz
VDS = 75 V, VGS = 10 V, ID = 0.5 A
-
1.65
3
VDS = 75 V, VGS = 4.5 V, ID = 0.5 A
-
0.5
-
-
0.7
-
f = 1 MHz
0.7
3.5
7
-
8
16
-
22
35
-
9
18
tf
-
22
35
td(on)
-
10
20
-
25
40
-
10
20
-
24
50
td(on)
tr
td(off)
tr
td(off)
VDD = 75 V, RL = 57.7 Ω, ID ≅ 1.3 A,
VGEN = 10 V, Rg = 1 Ω
VDD = 75 V, RL = 57.7 Ω, ID ≅ 1.3 A,
VGEN = 7.5 V, Rg = 1 Ω
tf
pF
nC
Ω
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulse diode forward current
ISM
Body diode voltage
VSD
TC = 25 °C
IS = 1.3 A, VGS = 0 V
-
-
1.7
-
-
4
-
0.85
1.2
A
V
Body diode reverse recovery time
trr
-
44
66
ns
Body diode reverse recovery charge
Qrr
-
53
80
nC
Reverse recovery fall time
ta
-
27
-
Reverse recovery rise time
tb
-
17
-
IF = 1.3 A, di/dt = 100 A/μs, TJ = 25 °C
ns
Notes
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %
b. Guaranteed by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S17-0904-Rev. B, 12-Jun-17
Document Number: 75594
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
Axis Title
4
10000
8
10000
2
100
VGS = 5 V
1
6
1000
1st line
2nd line
1000
2nd line
ID - Drain Current (A)
VGS = 6 V
3
1st line
2nd line
4
TC = 25 °C
TC = 125 °C
0
0
1.0
0.5
2.0
1.5
2.5
3.0
0
2
4
6
VGS - Gate-to-Source Voltage (V)
2nd line
Output Characteristics
Transfer Characteristics
Axis Title
10
8
VDS - Drain-to-Source Voltage (V)
2nd line
Axis Title
10000
0.6
10000
210
1000
0.4
VGS = 7.5 V
VGS = 10 V
100
0.3
2nd line
C - Capacitance (pF)
175
0.5
1st line
2nd line
2nd line
RDS(on) - On-Resistance (Ω)
TC = -55 °C
0
10
100
2
1000
140
1st line
2nd line
2nd line
ID - Drain Current (A)
VGS = 10 V thru 7 V
105
Ciss
70
100
35
Coss
Crss
0.2
0
10
1
2
3
4
10
0
20
40
80
ID - Drain Current (A)
2nd line
VDS - Drain-to-Source Voltage (V)
2nd line
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
Axis Title
10000
1000
1st line
2nd line
VDS = 38 V
VDS = 120 V
4
100
2
0
10
0
0.5
1.0
1.5
2.0
2.5
2nd line
RDS(on) - On-Resistance (Normalized)
8
6
10000
2.1
VDS = 75 V
ID = 0.5 A
100
Axis Title
10
2nd line
VGS - Gate-to-Source Voltage (V)
60
VGS = 10 V, ID = 1.5 A
1.8
1000
1.5
1.2
VGS = 7.5 V, ID = 1 A
0.9
100
0.6
0.3
10
-50
-25
0
25
50
75
100 125 150
Qg - Total Gate Charge (nC)
2nd line
TJ - Junction Temperature (°C)
2nd line
Gate Charge
On-Resistance vs. Junction Temperature
S17-0904-Rev. B, 12-Jun-17
1st line
2nd line
0
Document Number: 75594
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Si3440ADV
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
Axis Title
0.8
10000
10000
2nd line
RDS(on) - On-Resistance (Ω)
0.7
1000
1
1st line
2nd line
2nd line
IS - Source Current (A)
10
TJ = 150 °C
TJ = 25 °C
0.1
100
0.01
TJ = 150 °C
0.6
1000
0.5
0.4
1st line
2nd line
100
TJ = 25 °C
0.3
100
0.2
0.1
0.001
0
10
0
0.2
0.4
0.6
0.8
1.0
10
4
1.2
6
10
VSD - Source-to-Drain Voltage (V)
2nd line
VGS - Gate-to-Source Voltage (V)
2nd line
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
Axis Title
Axis Title
45
10000
3.6
ID = 250 μA
3.4
10000
36
1000
1000
2nd line
Power (W)
3.0
2.8
27
1st line
2nd line
3.2
1st line
2nd line
2nd line
VGS(th) (V)
8
18
100
100
9
2.6
2.4
10
-50
-25
0
25
50
75
0
0.001
100 125 150
10
0.01
0.1
1
10
TJ - Temperature (°C)
2nd line
Time (s)
2nd line
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
Axis Title
10
10000
IDM limited
100 μs
1
1000
1 ms
1st line
2nd line
2nd line
ID - Drain Current (A)
Limited by RDS(on) (1)
10 ms
0.1
100 ms
10 s, 1 s
0.01
100
DC
TA = 25 °C
Single pulse
BVDSS limited
0.001
0.1
(1)
1
10
100
10
1000
VDS - Drain-to-Source Voltage (V)
VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
S17-0904-Rev. B, 12-Jun-17
Document Number: 75594
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si3440ADV
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
10000
1.8
1000
1st line
2nd line
2nd line
ID - Drain Current (A)
2.4
1.2
100
0.6
0
10
0
25
50
75
100
125
150
TC - Case Temperature (°C)
2nd line
Current Derating a
Axis Title
Axis Title
4.5
10000
10000
1.0
3.6
0.8
0.6
1st line
2nd line
1.8
2nd line
Power (W)
1000
1st line
2nd line
2nd line
Power (W)
1000
2.7
0.4
100
0.9
100
0.2
0
10
0
25
50
75
100
125
150
0
10
0
25
50
75
100
125
TC - Case Temperature (°C)
2nd line
TA - Ambient Temperature (°C)
2nd line
Power, Junction-to-Case
Power, Junction-to-Ambient
150
Note
a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit
S17-0904-Rev. B, 12-Jun-17
Document Number: 75594
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si3440ADV
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
t2
1. Duty cycle, D =
0.02
t1
t2
2. Per unit base = R thJA = 110 °C/W
3. TJM - TA = PDMZthJA(t)
Single pulse
4. Surface mounted
0.01
10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single pulse
0.01
10 -4
10 -3
10 -2
10 -1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?75594.
S17-0904-Rev. B, 12-Jun-17
Document Number: 75594
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Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72610
Revision: 21-Jan-08
Legal Disclaimer Notice
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
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Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.
Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and
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© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 09-Jul-2021
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Document Number: 91000
