Si5517DU
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Vishay Siliconix
N- and P-Channel 20 V (D-S) MOSFET
FEATURES
PowerPAK® ChipFET® Dual
• TrenchFET® power MOSFETs
• Thermally enhanced PowerPAK ChipFET
package
- Small footprint area
- Low on-resistance
- Thin 0.8 mm profile
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
D1
D1
8
D2
7
D2
6
5
9
1.
m
m
1
1
2
3 G S1
1
4 S
2
G2
Bottom View
m
0m
3.
Top View
Marking code: EA
APPLICATIONS
PRODUCT SUMMARY
VDS (V)
RDS(on) () at VGS = ± 4.5 V
RDS(on) () at VGS = ± 2.5 V
RDS(on) () at VGS = ± 1.8 V
Qg typ. (nC)
ID (A) a
Configuration
N-CHANNEL
P-CHANNEL
20
-20
0.039
0.072
0.045
0.100
0.055
0.131
6
5.5
6
-6
N- and p-pair
D1
• Complementary MOSFET
for portable devices
- Ideal for
circuits
buck-boost
S2
G2
G1
S1
N-Channel
MOSFET
D2
P-Channel
MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK ChipFET
Si5517DU-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
SYMBOL
VDS
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Pulsed drain current
Source-drain current diode current
Maximum power dissipation
ID
IDM
TC = 25 °C
TA = 25 °C
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d, e
IS
PD
TJ, Tstg
N-CHANNEL
P-CHANNEL
20
-20
±8
±8
6a
-6 a
6a
-6 a
7.2 b, c
-4.6 b, c
5.8 b, c
-3.7 b, c
20
-15
6.9
-6.9
1.9 b, c
-1.9 b, c
8.3
8.3
5.3
5.3
2.3 b, c
2.3 b, c
1.5 b, c
1.5 b, c
-55 to +150
260
UNIT
V
A
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum junction-to-ambient b, f
Maximum junction-to-case (drain)
SYMBOL
t5s
Steady state
RthJA
RthJC
N-CHANNEL
TYP.
45
12
MAX.
55
15
P-CHANNEL
TYP.
45
12
MAX.
55
15
UNIT
°C/W
Notes
a. Based on TC = 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. t = 5 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 105 °C/W for both channels
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP. a
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
VGS(th) temperature coefficient
Gate-source threshold voltage
Gate-body leakage
Zero gate voltage drain current
On-state drain current b
Drain-source on-state resistance b
Forward transconductance b
VDS
VDS/TJ
VGS(th)/TJ
VGS(th)
IGSS
IDSS
ID(on)
RDS(on)
gfs
VGS = 0 V, ID = 1 mA
N-Ch
20
-
-
VGS = 0 V, ID = -1 mA
P-Ch
-20
-
-
ID = 250 μA
N-Ch
-
17
-
ID = -250 μA
P-Ch
-
-20
-
ID = 250 μA
N-Ch
-
-2.6
-
ID = -250 μA
P-Ch
-
2.4
-
VDS = VGS, ID = 250 μA
N-Ch
0.4
-
1
VDS = VGS, ID = -250 μA
P-Ch
-0.4
-
-1
VDS = 0 V, VGS = ± 8 V
N-Ch
-
-
100
P-Ch
-
-
-100
VDS = 20 V, VGS = 0 V
N-Ch
-
-
1
VDS = -20 V, VGS = 0 V
P-Ch
-
-
-1
VDS = 20 V, VGS = 0 V, TJ = 55 °C
N-Ch
-
-
10
VDS = -20 V, VGS = 0 V, TJ = 55 °C
P-Ch
-
-
-10
VDS 5 V, VGS = 4.5 V
N-Ch
20
-
-
VDS -5 V, VGS = -4.5 V
P-Ch
-15
-
-
VGS = 4.5 V, ID = 4.4 A
N-Ch
-
0.0320
0.0390
VGS = -4.5 V, ID = -3.3 A
P-Ch
-
0.0600
0.0720
VGS = 2.5 V, ID = 4.1 A
N-Ch
-
0.0370
0.0450
VGS = -2.5 V, ID = -2.8 A
P-Ch
-
0.0830
0.1000
VGS = 1.8 V, ID = 1.8 A
N-Ch
-
0.0455
0.0550
VGS = -1.8 V, ID = -0.76 A
P-Ch
-
0.1080
0.1310
VDS = 10 V, ID = 4.4 A
N-Ch
-
22
-
VDS = -10 V, ID = -3.3 A
P-Ch
-
0.9
-
V
mV/°C
V
nA
μA
A
S
Dynamic a
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
N-Ch
-
520
-
P-Ch
-
455
-
N-Ch
-
100
-
P-Ch
-
105
-
N-Ch
-
60
-
P-Ch
-
65
-
N-Ch
-
10.5
16
VDS = -10 V, VGS = -8 V, ID = -4.6 A
P-Ch
-
9.1
14
VDS = 10 V, VGS = 4.5 V ID = 4.4 A
N-Ch
-
6
9
VDS = -10 V, VGS = -4.5 V, ID = -1.8 A
P-Ch
-
5.5
8.5
N-channel
VDS = 10 V, VGS = 4.5 V ID = 4.4 A
N-Ch
-
0.91
-
P-Ch
-
0.75
-
P-channel
VDS = -10 V, VGS = -4.5 V, ID = -1.8 A
N-Ch
-
0.7
-
N-channel
VDS = 10 V, VGS = 0 V, f = 1 MHz
P-channel
VDS = -10 V, VGS = 0 V, f = 1 MHz
VDS = 10 V, VGS = 8 V, ID = 4.4 A
Total gate charge
Gate-source charge
Gate-drain charge
Gate resistance
S-81449-Rev. B, 23-Jun-08
Qg
Qgs
Qgd
Rg
f = 1 MHz
P-Ch
-
1.5
-
N-Ch
-
1.9
-
P-Ch
-
8
-
pF
nC
Document Number: 73529
2
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
Dynamic
SYMBOL
MIN.
TYP. a
N-Ch
-
20
30
P-Ch
-
8
15
N-Ch
-
65
100
P-Ch
-
35
55
N-Ch
-
40
60
P-Ch
-
40
60
N-Ch
-
10
15
TEST CONDITIONS
MAX.
UNIT
a
Turn-on delay time
td(on)
Rise time
Turn-off delay time
tr
td(off)
Fall time
Turn-on delay time
P-channel
VDD = -10 V, RL = 2.7 ,
ID -3.7 A, VGEN = -4.5 V, Rg = 1
tf
td(on)
Rise time
Turn-off delay time
N-channel
VDD = 10 V, RL = 2.8 ,
ID 3.6 A, VGEN = 4.5 V, Rg = 1
tr
td(off)
Fall Time
N-channel
VDD = 10 V, RL = 2.8 ,
ID 3.6 A, VGEN = 8 V, Rg = 1
P-channel
VDD = -10 V, RL = 2.7 ,
ID -3.7 A, VGEN = -8 V, Rg = 1
tf
P-Ch
-
55
85
N-Ch
-
5
10
P-Ch
-
5
10
N-Ch
-
12
20
P-Ch
-
15
25
N-Ch
-
26
40
P-Ch
-
30
45
N-Ch
-
8
15
P-Ch
-
45
70
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulse diode forward current a
Body diode voltage
Body diode reverse recovery time
IS
ISM
VSD
Qrr
Reverse recovery fall time
ta
tb
N-Ch
-
-
6.9
P-Ch
-
-
-6.9
N-Ch
-
-
20
-15
P-Ch
-
-
IS = 1.2 A, VGS = 0 V
N-Ch
-
0.8
1.2
IS = -1.0 A, VGS = 0 V
P-Ch
-
-0.8
-1.2
trr
Body diode reverse recovery charge
Reverse recovery rise time
TC = 25 °C
N-channel
IF = 1.2 A, di/dt = 100 A/μs,
TJ = 25 °C
P-channel
IF = -1 A, di/dt = -100 A/μs,
TJ = 25 °C
N-Ch
-
45
70
P-Ch
-
30
60
N-Ch
-
21
32
P-Ch
-
15
30
N-Ch
-
29
-
P-Ch
-
11
-
N-Ch
-
16
-
P-Ch
-
19
-
A
V
ns
nC
ns
Notes
a. Guaranteed by design, not subject to production testing
b. Pulse test; pulse width 300 μs, duty cycle 2 %
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
3
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
20
10
VGS = 2.5 V thru 5 V
8
VGS = 2.5 V
ID - Drain Current (A)
I D - Drain Current (A)
16
VGS = 2 V
12
VGS = 1.5 V
8
4
6
4
TC = 125 °C
2
25 °C
VGS = 1 V
0
0.0
0.5
1.0
1.5
2.0
2.5
- 55 °C
0
0.0
3.0
0.6
0.9
1.2
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
1.5
800
0.08
VGS = 4.5 V
0.07
0.06
C - Capacitance (pF)
R DS(on) - On-Resistance (m)
0.3
0.05
VGS = 2.5 V
0.04
0.03
VGS = 1.8 V
600
Ciss
400
200
0.02
Coss
0.01
Crss
0
0.00
0
4
8
12
16
0
20
12
16
I D - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
20
1.6
8
ID = 4.4 A
VGS = 4.5 V
ID = 4.4 A
1.4
6
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
8
4
VDS = 10 V
4
VDS = 16 V
2
1.2
1.0
0.8
0
0
3
6
9
12
0.6
- 50
- 25
0
25
50
75
100
125
150
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
4
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
RDS(on) - Drain-to-Source On-Resistance (m)
20
TJ = 150 °C
I S - Source Current (A)
10
TJ = 25 °C
1
0.0
0.08
ID = 4.4 A
0.07
0.06
125 °C
0.05
25 °C
0.04
0.03
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.9
40
0.8
Power (W)
VGS(th) (V)
30
ID = 250 µA
0.7
0.6
0.5
0.4
20
10
0.3
0.2
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
1
10
100
600
Time (s)
TJ - Temperature (°C)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
I D - Drain Current (A)
Limited by RDS(on)*
10
IDM limited
ID(on) limited
100 µs
1 ms
1
10 ms
100 ms
1s
0.1
TA = 25 °C
Single Pulse
10 s
DC
BVDSS limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum V GS at which R DS(on) is specified
Safe Operating Area, Junction-to-Ambient
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
5
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
15
10
12
8
Power Dissipation (W)
I D - Drain Current (A)
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
9
Package Limited
6
3
6
4
2
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating a
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
Note
a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
6
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 87 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
7
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
15
3V
4.5 V
4
4V
3.5 V
I D - Drain Current (A)
I D - Drain Current (A)
12
5
2.5 V
VGS = 5 V
2V
9
6
1.5 V
3
3
2
TC = 125 °C
TC = 25 °C
1
1V
0
0.0
0.5
1.0
1.5
2.0
2.5
TC = - 55 °C
0
0.0
3.0
0.5
1.0
1.5
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
2.0
800
0.30
600
C - Capacitance (pF)
R DS(on) - On-Resistance ()
VGS = 1.8 V
0.25
0.20
VGS = 2.5 V
0.15
Ciss
400
200
Coss
0.10
VGS = 4.5 V
Crss
0
0.05
0
3
6
9
12
0
15
8
4
I D - Drain Current (A)
16
20
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
8
1.5
ID = 4.6 A
VGS = 4.5 V
I D = 3.3 A
1.4
6
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
12
VDS - Drain-to-Source Voltage (V)
V DS = 10 V
4
V DS = 16 V
2
1.3
1.2
1.1
1.0
0.9
0.8
0
0
6
3
9
12
0.7
- 50
- 25
0
25
50
75
100
125
150
Qg -Total Gate Charge (nC)
TJ - Junction Temperature ( °C)
Gate Charge
On-Resistance vs. Junction Temperature
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
8
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
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Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
0.20
RDS(on) - Drain-to-Source On-Resistance ()
I S - Source Current (A)
10
TJ = 150 °C
TJ = 25 °C
0.2
0.4
0.6
1.0
0.8
1.2
0.12
TA = 125 °C
0.08
TA = 25 °C
0
1.4
1
2
3
5
4
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.8
40
I D = 250 µA
30
Power (W)
0.7
VGS(th) (V)
0.16
0.04
1
0.0
I D = 4.6 A
0.6
0.5
20
10
0.4
0.3
- 50
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
1
10
100
600
Time (s)
TJ - Temperature (°C)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
IDM limited
Limited by R DS(on)*
I D - Drain Current (A)
10
ID(on) limited
1 ms
1
10 ms
100 ms
1s
10 s
DC
0.1
TA = 25 °C
Single Pulse
BVDSS limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which R DS(on) is specified
Safe Operating Area, Junction-to-Case
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
9
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
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Vishay Siliconix
10
10
8
8
Power Dissipation (W)
ID - Drain Current (A)
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Package Limited
6
4
6
4
2
2
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating a
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
Note
a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
10
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si5517DU
www.vishay.com
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 87 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73529.
S-81449-Rev. B, 23-Jun-08
Document Number: 73529
11
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Dual
2.700
(0.106)
0.300
(0.012)
0.350
(0.014)
0.650
(0.026)
1.900
(0.075)
0.300
(0.012)
1.050
(0.041)
0.350
(0.014)
0.200
(0.008)
0.300
(0.012)
0.225
(0.009)
0.650
(0.026)
1.175
(0.046)
1.525
(0.060)
Recommended Minimum Pads
Dimensions in mm/(Inches)
APPLICATION NOTE
Note: This is Flipped Mirror Image
Pin #1 Location is Top Left Corner
Return to Index
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10
Document Number: 69949
Revision: 21-Jan-08
Legal Disclaimer Notice
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Revision: 01-Jan-2019
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Document Number: 91000