Si7403BDN
Vishay Siliconix
P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
- 20
RDS(on) (Ω)
ID (A)
0.074 at VGS = - 4.5 V
- 8c
0.110 at VGS = - 2.5 V
- 7.4
Qg (Typ.)
5.6 nC
• Halogen-free According to IEC 61249-2-21
Available
• TrenchFET® Power MOSFET: 2.5 V Rated
• PowerPAK® Package
- Low Thermal Resistance
- Low 1.07 mm Profile
APPLICATIONS
PowerPAK 1212-8
• Load Switching
• PA Switching
S
3.30 mm
3.30 mm
1
S
S
2
S
3
G
4
G
D
8
D
7
D
6
D
5
Bottom View
D
Ordering Information: Si7403BDN-T1-E3 (Lead (Pb)-free)
Si7403BDN-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
- 20
Gate-Source Voltage
VGS
±8
TC = 70 °C
TA = 25 °C
ID
IDM
TC = 25 °C
Continuous Source-Drain Diode Currenta, b
TA = 25 °C
IS
TC = 25 °C
TC = 70 °C
Maximum Power Dissipationa, b
TA = 25 °C
Soldering Recommendations (Peak Temperature)
c, d
- 5.1a, b
A
- 20
-8
- 2.6a, b
9.6
PD
6.1
3.1a, b
W
2a, b
TA = 70 °C
Operating Junction and Storage Temperature Range
- 7.2
- 4.1a, b
TA = 70 °C
Pulsed Drain Current
V
- 8c
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)a, b
Unit
TJ, Tstg
- 55 to 150
260
°C
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. t = 5 s.
c. Package limited.
d. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
www.vishay.com
1
Si7403BDN
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
a, b
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
Symbol
Typical
Maximum
t ≤ 10 s
RthJA
32
40
Steady State
RthJC
11
13
Unit
°C/W
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 81 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 20
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
VGS(th)
Gate-Source Leakage
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
ID = - 250 µA
VDS = VGS, ID = - 250 µA
V
14
mV/°C
-2
- 0.45
VDS = VGS, ID = - 5 mA
- 1.0
- 0.77
VDS = 0 V, VGS = - 8 V
- 100
VDS = - 20 V, VGS = 0 V
-1
VDS = - 20 V, VGS = 0 V, TJ = 55 °C
- 10
VDS ≤ - 5 V, VGS = - 4.5 V
- 20
V
nA
µA
A
VGS = - 4.5 V, ID = - 5.1 A
0.059
0.074
VGS = - 2.5 V, ID = - 4.2 A
0.080
0.110
VDS = - 10 V, ID = - 5.1 A
10
Ω
S
b
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
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2
430
VDS = - 10 V, VGS = 0 V, f = 1 MHz
55
VDS = - 10 V, VGS = - 8 V, ID = - 5.1 A
9.7
15
5.6
8.5
VDS = - 10 V, VGS = - 4.5 V, ID = - 5.1 A
0.95
tr
f = 1 MHz
VDD = - 10 V, RL = 2.4 Ω
ID ≅ - 4.1 A, VGEN = - 4.5 V, Rg = 1 Ω
Ω
10
5
10
51
75
33
50
tf
60
90
td(on)
4
8
tr
td(off)
tf
nC
1.4
td(on)
td(off)
pF
85
VDD = - 10 V, RL = 2.4 Ω
ID ≅ - 4.1 A, VGEN = - 8 V, Rg = 1 Ω
40
60
30
45
40
60
ns
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
Si7403BDN
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
TC = 25 °C
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
-8
- 20
IS = - 2.6 A, VGS = 0 V
IF = - 4.1 A, dI/dt = 100 A/µs, TJ = 25 °C
A
- 0.7
- 1.2
V
20
40
ns
8
16
nC
12
8
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
www.vishay.com
3
Si7403BDN
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
20
10
VGS = 5 thru 3 V
TC = - 55 °C
8
2.5 V
I D - Drain Current (A)
I D - Drain Current (A)
16
12
2V
8
4
2
1.5 V
4
125 °C
6
25 °C
1V
0
0.0
0.5
1.0
1.5
2.0
2.5
0
0.0
3.0
0.5
2.0
2.5
Transfer Characteristics
0.18
800
0.16
700
0.14
600
C - Capacitance (pF)
RDS(on) - On-Resistance (mΩ)
Output Characteristics
0.12
VGS = 2.5 V
0.08
1.5
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
0.10
1.0
VGS = 4.5 V
500
Ciss
400
300
0.06
200
0.04
100
0.02
0
Coss
Crss
0
4
8
12
16
20
0
4
ID - Drain Current (A)
8
16
20
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
1.6
8
ID = 5.1 A
ID = 5.1 A
7
VGS = 2.5 V
1.4
6
5
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
12
VDS = 10 V
4
VDS = 14 V
3
2
VGS = 4.5 V
1.2
1.0
0.8
1
0
0
2
4
6
Qg - Total Gate Charge (nC)
Gate Charge
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4
8
10
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
Si7403BDN
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
RDS(on) - Drain-to-Source On-Resistance (mΩ)
20
I S - Source Current (A)
TJ = 150 °C
10
TJ = 25 °C
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.30
ID = 5.1 A
0.25
0.20
0.15
TA = 125 °C
0.10
TA = 25 °C
0.05
0.00
0
1.4
1
VSD - Source-to-Drain Voltage (V)
2
3
4
5
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.8
30
25
0.7
Power (W)
VGS(th) (V)
ID = 250 µA
0.6
0.5
0.4
0.3
- 50
20
15
5
- 25
0
25
50
75
100
125
150
0
0.001
0.01
TJ - Temperature (°C)
0.1
1
10
100
1000
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
Limited by RDS(on)*
I D - Drain Current (A)
10
100 µs
1 ms
1
0.1
0.01
0.1
TA = 25 °C
Single Pulse
10 ms
100 ms
1s
10 s
DC
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum V GS at which R DS( on) is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
www.vishay.com
5
Si7403BDN
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
12
10
8
Power Dissipation (W)
ID - Drain Current (A)
10
8
Package Limited
6
4
6
4
2
2
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating*
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
* The power dissipation PD is based on TJ(max) = 175 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
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6
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
Si7403BDN
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
0.02
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 65 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10- 4
10- 3
10- 2
10- 1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10- 4
10- 3
10- 2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73333.
Document Number: 73333
S-83051-Rev. B, 29-Dec-08
www.vishay.com
7
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Revision: 01-Jan-2022
1
Document Number: 91000
