SI9120DJ-E3

End of Life. Last Available Purchase Date is 31-Dec-2014 Si9120 Vishay Siliconix Universal Input Switchmode Controller FEATURES 10- to 450-V Input Range Current-Mode Control 125-mA Output Drive Internal Start-Up Circuit Internal Oscillator (1 MHz) SHUTDOWN and RESET DESCRIPTION to supply 30 W of output power at 100 kHz. These devices, when combined with an output MOSFET and transformer, can be used to implement single-ended power converter topologies (i.e., flyback and forward). The Si9120 is a BiC/DMOS integrated circuit designed for use in low-power, high-efficiency off-line power supplies. High-voltage DMOS inputs allow the controller to work over a wide range of input voltages (10- to 450-VDC). Current-mode PWM control circuitry is implemented in CMOS to reduce quiescent current to less than 1.5 mA. The Si9120 is available in both standard and lead (Pb)-free 16-pin plastic DIP and SOIC packages which are specified to operate over the industrial temperature range of −40 C to 85 C. A CMOS output driver provides high-speed switching for MOSFET devices with gate charge, Qg, up to 25 nC, enough FUNCTIONAL BLOCK DIAGRAM FB COMP 15 DISCHARGE 14 10 OSC IN 9 Error Amplifier VREF − + 11 OSC OUT 8 OSC 2V − 4 V (1%) Current-Mode Comparator + Ref Gen To VCC Clock (1/2 fOSC) R Q 5 S 6 + − C/L Comparator OUTPUT −VIN 1.2 V BIAS VCC +VIN 16 Current Sources 7 To Internal Circuits 1 4 VCC − 8.1 V + Undervoltage Comparator S Q R 12 13 SENSE SHUTDOWN RESET − + 8.6 V Pre-Regulator/Start-Up Applications information, see AN707 and AN708. Document Number: 70006 S-42042—Rev. H, 15-Nov-04 www.vishay.com 1 Si9120 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to −VIN (Note: VCC < +VIN + 0.3 V) Power Dissipation (Package)b VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V 16-Pin Plastic DIP (J Suffix)c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 V 16-Pin SOIC (Y Suffix)d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW Logic Inputs (RESET SHUTDOWN, OSC IN, OSC OUT) . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Thermal Impedance (QJA) Linear Input (FEEDBACK, SENSE, BIAS, VREF) . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . 5 mAa Continuous Output Current (Source or Sink) . . . . . . . . . . . . . . . . . . . 125 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C 16-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W Notes a. Continuous current may be limited by the applications maximum input voltage and the package power dissipation. b. Device mounted with all leads soldered or welded to PC board. c. Derate 6 mW/_C above 25_C. d. Derate 7.2 mW/_C above 25_C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Voltages Referenced to −VIN VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 V to 13.5 V ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 1 MW +VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 450 V Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC − 3 V fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC SPECIFICATIONSa Specific Test Conditions Parameter Symbol LIMITS D Suffix −40 to 85_C DISCHARGE = −VIN = 0 V, VCC = 10 V +VIN = 300 V RBIAS = 390 kW, ROSC = 330 kW TEMPB MINC TYPD MAXC Unit OSC IN = − VIN (OSC Disabled) RL = 10 MW Room Full 3.88 3.82 4.0 4.12 4.14 V Room 15 30 45 kW Room 70 100 130 mA 0.5 1.0 mV/_C Reference Output Voltage VR Output Impedancee ZOUT Short Circuit Current ISREF Temperature Stabilitye TREF VREF = −VIN Full Oscillator Maximum Frequencye Initial Accuracy Voltage Stability Temperature Coefficiente fMAX fOSC Df/f ROSC = 0 Room 1 3 CSTRAY Pin 9
5 pF ROSC = 330 kW Room 80 100 120 CSTRAY Pin 9
5 pF ROSC = 150 kW Room 160 200 240 Df/f = f(13.5 V) − f(9.5 V) / f(9.5 V) Room 10 15 % Full 200 500 ppm/_C 4.08 V TOSC MHz kHz Error Amplifier VFB FB Tied to COMP OSC IN = − VIN (OSC Disabled) Room Input BIAS Current IFB OSC IN = − VIN, VFB = 4 V Room 25 500 nA Input OFFSET Voltage VOS OSC IN = − VIN Room 15 40 mV Open Loop Voltage Gaine AVOL OSC IN = − VIN Room 60 80 dB BW OSC IN = − VIN Room 1.0 1.5 MHz Feedback Input Voltage Unity Gain Bandwidthe www.vishay.com 2 3.92 Document Number: 70006 S-42042—Rev. H, 15-Nov-04 Si9120 Vishay Siliconix SPECIFICATIONSa Specific Test Conditions Parameter LIMITS D Suffix −40 to 85_C Symbol DISCHARGE = −VIN = 0 V, VCC = 10 V +VIN = 300 V RBIAS = 390 kW, ROSC = 330 kW TEMPB ZOUT Error Amp configured for 60 dB gain Source VFB = 3.4 V Sink VFB = 4.5 V Room 0.12 0.15 PSRR 9.5 V
VCC
13.5 V Room 50 70 VSOURCE VFB = 0 V Room 1.0 1.2 1.4 V td VSENSE = 1.5 V, See Figure 1 Room 100 150 ns 10 mA TYPD MAXC Unit Room 1000 2000 W Room −2.0 −1.4 MINC Error Amplifier (Cont’d) Dynamic Output Impedancee Output Current Power Supply Rejection IOUT mA dB Current Limit Threshold Voltage Delay to Outpute Pre-Regulator/Start-Up Input Voltage +VIN IIN = 10 mA Room Input Leakage Current +IIN VCC  9.4 V Room 450 V VCC Pre-Regulator Turn-Off Threshold Voltage VREG IPRE-REGULATOR = 10 mA Room 7.8 8.6 9.4 Undervoltage Lockout VUVLO Room 7.0 8.1 8.9 V VREG −VUVLO VDELTA Room 0.3 0.6 0.85 1.5 mA 15 20 mA 50 100 Supply Supply Current Bias Current ICC CL = 500 pF at Pin 5 IBIAS Room Room 10 Logic SHUTDOWN Delaye tSD CL = 500 pF, VSENSE = −VIN See Figure 2 Room SHUTDOWN Pulse Widthe tSW Room 50 RESET Pulse Widthe tRW Room 50 Latching Pulse Width SHUTDOWN and RESET Lowe tLW Room 25 Input Low Voltage VIL Room Input High Voltage VIH Room Input Current Input Voltage High IIH VIN = 10 V Room Input Current Input Voltage Low IIL VIN = 0 V Room −35 Output High Voltage VOH IOUT = −10 mA Room Full 9.7 9.5 Output Low Voltage VOL IOUT = 10 mA Room Full Output Resistance ROUT IOUT = 10 mA, Source or Sink Room Full See Figure 3 ns 2.0 8.0 1 5 −25 V mA Output Rise Timee tr Fall Timee tf CL = 500 pF 0.3 0.5 Room Room 40 20 25 30 50 40 75 75 V W ns Notes a. Refer to PROCESS OPTION FLOWCHART for additional information. b. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. a. 250 V
+VIN 380 V place a 10-kW, 1/4-W resistor in series with a +VIN (Pin1). 380 V
+VIN 450 V place a 15-kW, 1/4-W resistor in series with a +VIN (Pin1). Connect a 0.01-mfd capacitor between +VIN (Pin 1) and −VIN (Pin 6). Document Number: 70006 S-42042—Rev. H, 15-Nov-04 www.vishay.com 3 Si9120 Vishay Siliconix TIMING WAVEFORMS 1.5 V − 50% SENSE 0 VCC SHUTDOWN 0 tr
10 ns tSD VCC 90% OUTPUT 0 − td VCC OUTPUT 0 − 90% − FIGURE 1. FIGURE 2. tSW VCC SHUTDOWN 0 tf
10 ns 50% 50% 50% − tr, tf
10 ns tLW VCC RESET 0 50% 50% 50% − tRW FIGURE 3. TYPICAL CHARACTERISTICS Output Switching Frequency vs. Oscillator Resistance f OUT (Hz) 1M 100 k 10 k 10 k 100 k 1M rOSC − Oscillator Resistance (W) www.vishay.com 4 Document Number: 70006 S-42042—Rev. H, 15-Nov-04 Si9120 Vishay Siliconix PIN CONFIGURATIONS AND ORDERING INFORMATION Dual-In-Line SOIC +VIN 1 16 NC* 2 15 BIAS +VIN 16 BIAS FB 15 FB 14 COMP RESET NC* 3 14 COMP SENSE 4 13 RESET 12 SHUTDOWN 11 VREF −VIN 10 DISCHARGE VCC 9 OSC IN OUTPUT −VIN VCC OSC OUT 5 6 7 8 1 SENSE 4 13 OUTPUT 5 12 SHUTDOWN 6 11 VREF 7 10 DISCHARGE 9 OSC IN OSC OUT 8 Top View Note: Pins 2 and 3 are removed Top View ORDERING INFORMATION Part Number Temperature Range Package Si9120DY Si9120DY-T1 Si9120DY-T1—E3 SOIC-16 −40 to 85_C Si9120DJ PDIP 16 PDIP-16 Si9120DJ—E3 DETAILED DESCRIPTION Pre-Regulator/Start-Up Section Due to the low quiescent current requirement of the Si9120 control circuitry, bias power can be supplied from the unregulated input power source, from an external regulated low-voltage supply, or from an auxiliary “bootstrap” winding on the output inductor or transformer. When power is first applied during start-up, +VIN (pin 1) will draw a constant current. The magnitude of this current is determined by a high-voltage depletion MOSFET which is connected between +VIN and VCC (pin 7). This start-up circuitry provides initial power to the IC by charging an external bypass capacitance connected to the VCC pin. The constant current is disabled when VCC exceeds 8.6 V. If VCC is not forced to exceed the 8.6-V threshold, then VCC will be regulated to a nominal value of 8.6 V by the pre-regulator circuit. As the supply voltage rises toward the normal operating conditions, an internal undervoltage (UV) lockout circuit keeps the output driver disabled until VCC exceeds the undervoltage lockout threshold (typically 8.1 V). This guarantees that the Document Number: 70006 S-42042—Rev. H, 15-Nov-04 control logic will be functioning properly and that sufficient gate drive voltage is available before the MOSFET turns on. The design of the IC is such that the undervoltage lockout threshold will be at least 300 mV less than the pre-regulator turn-off voltage. Power dissipation can be minimized by providing an external power source to VCC such that the constant current source is always disabled. Note: When driving large MOSFETs at high frequency without a bootstrap VCC supply, power dissipation in the pre-regulator may exceed the power rating of the IC package. For operation of +VIN > 250 V, a 10-kW, 1/4-W resistor should be placed in series with +VIN (Pin 1). For +VIN > 380 V, a 15-kW, 1/4-W resistor is recommended. BIAS To properly set the bias for the Si9120, a 390-kW resistor should be tied from BIAS (pin 16) to −VIN (pin 6). This determines the magnitude of bias current in all of the analog sections and the pull-up current for the SHUTDOWN and RESET pins. The current flowing in the bias resistor is nominally 15 mA. www.vishay.com 5 Si9120 Vishay Siliconix DETAILED DESCRIPTION (CONT’D) Reference Section SHUTDOWN and RESET The reference section of the Si9120 consists of a temperature compensated buried zener and trimmable divider network. The output of the reference section is connected internally to the non-inverting input of the error amplifier. Nominal reference output voltage is 4 V. The trimming procedure that is used on the Si9120 brings the output of the error amplifier (which is configured for unity gain during trimming) to within 2% of 4 V. This compensates for input offset voltage in the error amplifier. SHUTDOWN (pin 12) and RESET (pin 13) are intended for overriding the output MOSFET switch via external control logic. The two inputs are fed through a latch preceding the output switch. Depending on the logic state of RESET. SHUTDOWN can be either a latched or unlatched input. The output is off whenever SHUTDOWN is low. By simultaneously having SHUTDOWN and RESET low, the latch is set and SHUTDOWN has no effect until RESET goes high. See Table TABLE 1. The output impedance of the reference section has been purposely made high so that a low impedance external voltage source can be used to override the internal voltage source, if desired, without otherwise altering the performance of the device. Error Amplifier Closed-loop regulation is provided by the error amplifier, which is intended for use with “around-the-amplifier” compensation. A MOS differential input stage provides for high input impedance. The noninverting input to the error amplifier (VREF) is internally connected to the output of the reference supply and should be bypassed with a small capacitor to ground. Both pins have internal current source pull-ups and should be left disconnected when not in use. An added feature of the current sources is the ability to connect a capacitor and an open-collector driver to the SHUTDOWN or RESET pins to provide variable shutdown time. TABLE 1. TRUTH TABLE FOR SHUTDOWN AND RESET PINS SHUTDOWN RESET H H H OUTPUT Normal Operation Normal Operation (No Change) L H Off (Not Latched) L L Off (Latched) L Off (Latched—No Change) Oscillator Section The oscillator consists of a ring of CMOS inverters, capacitors, and a capacitor discharge switch. Frequency is set by an external resistor between the OSC IN and OSC OUT pins. (See Typical Characteristics for details of resistor value vs. frequency.) The DISCHARGE pin should be tied to −VIN for normal internal oscillator operation. A frequency divider in the logic section limits switch duty cycle to

50% by locking the switching frequency to one half of the oscillator frequency. Output Driver The push-pull driver output has a typical on-resistance of 20-W maximum switching times are specified at 75 ns for a 500-pF load. This is sufficient to directly drive MOSFETs such as the IRF820, BUZ78 or BUZ80. Larger devices can be driven, but switching times will be longer, resulting in higher switching losses. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70006. www.vishay.com 6 Document Number: 70006 S-42042—Rev. H, 15-Nov-04 Package Information Vishay Siliconix SOIC (NARROW): 16-LEAD (POWER IC ONLY) JEDEC Part Number: MS-012 MILLIMETERS 16 15 14 13 12 11 10 Dim A A1 B C D E e H L Ĭ 9 E 1 2 3 4 5 6 7 8 INCHES Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.20 0.004 0.008 0.38 0.51 0.015 0.020 0.18 0.23 0.007 0.009 9.80 10.00 0.385 0.393 3.80 4.00 0.149 0.157 1.27 BSC 0.050 BSC 5.80 6.20 0.228 0.244 0.50 0.93 0.020 0.037 0_ 8_ 0_ 8_ ECN: S-40080—Rev. A, 02-Feb-04 DWG: 5912 H D C All Leads e Document Number: 72807 28-Jan-04 B A1 L Ĭ 0.101 mm 0.004 IN www.vishay.com 1 Package Information Vishay Siliconix PDIP: 16-LEAD (POWER IC ONLY) 16 15 14 13 12 11 10 9 E E1 1 2 3 4 5 6 7 8 D S Q1 A A1 B1 e1 Dim A A1 B B1 C D E E1 e1 eA L Q1 S L 15° MAX C B eA MILLIMETERS Min Max INCHES Min Max 3.81 5.08 0.150 0.200 0.38 1.27 0.015 0.050 0.38 0.51 0.015 0.020 0.89 1.65 0.035 0.065 0.20 0.30 0.008 0.012 18.93 21.33 0.745 0.840 7.62 8.26 0.300 0.325 5.59 7.11 0.220 0.280 2.29 2.79 0.090 0.110 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 1.27 2.03 0.050 0.080 0.38 1.52 .015 0.060 ECN: S-40081—Rev. A, 02-Feb-04 DWG: 5920 Document Number: 72815 28-Jan-04 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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