End of Life. Last Available Purchase Date is 31-Dec-2014
Si9121
Vishay Siliconix
High-Voltage, Non-Isolated Buck-Boost Converter
for ISDN Digital Phones
FEATURES
Fixed +5-V or +3.3-V Output
Integrated Floating Feedback Amplifier
On-Chip 70-V, 1.5- N-Channel
MOSFET Switch
Integrated High Voltage Start-Up Circuit,
with VCC Regulator
−10-V to −60-V Input Voltage Range
95-kHz PWM Operation
Integrated Soft-Start and Oscillator
High Efficiency Over Full Load Range
Under Voltage Lockout
Current Mode Control
Hiccup Mode Short Circuit
Protection
Thermal Shutdown
SOIC-8 Narrow-Body Package
DESCRIPTION
The Si9121 simplifies the −48-V to +5-V or +3.3-V converter
design for ISDN application by integrating the floating
feedback error amplifier providing direct output voltage
regulation. This approach eliminates the need for an external
shunt regulator. The Si9121 also integrates a high voltage
depletion mode MOSFET which allows the converter to be
powered directly from the high input bus voltage without
requiring an external start-up circuit. Combined with simple
magnetic design due to its non-isolated topology, the Si9121
provides a one-chip solution for complete ISDN power supply.
In order to reduce external component count, the Si9121 has
a fully integrated 95-kHz oscillator and soft-start circuit.
The Si9121 is available in both standard and lead (Pb)-free
SOIC-8 pin packages, and is offered in either +5-V or +3.3-V
fixed output options (Si9121DY-5 or Si9121DY-3,
respectively). In order to satisfy the stringent ambient
temperature requirements in many applications, the Si9121 is
rated to the industrial temperature range of −40 C to 85 C.
FUNCTIONAL BLOCK DIAGRAM
GND
VCC Regulator
VCC
Reference Generator
VOUT
BYPASS
LX
Control
COMP
VNEG
VOUT
+5 V/400 mA
or
+3.3 V/400 mA
CS
VNEG
−48 V
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
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1
Si9121
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V)
VNEG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −63 V
VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VNEG −0.3 V to VCC + 0.3 V
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VNEG + 13.2 V
ILX (peak current ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Bypass, CS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VNEG −0.3 V to VCC +0.3 V
(VLX − VCS ) internal power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
8-Pin SOIC (Y Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.25 W
Thermal Impedance (QJA)a
8-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 _C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 10 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V)
VNEG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to −60 V
VCC (externally supplied) . . . . . . . . . . . . . . . . VNEG + 9.5 V to VNEG + 12.0 V
VCC (internally regulated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VNEG + 8.5 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VCC
RECOMMENDED EXTERNAL COMPONENTS ( SEE TYPICAL APPLICATIONS CIRCUIT )
L = 68 mH, COUT = 220 mF // 0.1 mF, CIN = 33 mF, CBYPASS = 0.1 mF, CVCC = 1 mF, RSENSE = 0.25 W, 0.5 W
SPECIFICATIONSa (All Voltages Are With Respect To VNEG Unless Otherwise Specified)
Limits
Test Conditions (Internally Regulated)
Unless Otherwise Specified
p
Parameter
Symbol
VNEG = −10 to −60 V
−40 to 85_C
Tempb
Minc
Typd
Maxc
Full
4.80
5.00
5.20
Full
3.17
3.30
3.43
Unit
Output Voltage (with respect to GND = 0 V)
+5-V Converter
+3.3-V Converter
VOUT
10 mA −20 V
Full
1.5
2.0
IOUT
VOUT to VNEG
Full
0.2
0.3
ISTART
VCC = 0 V
Full
5
30
Unit
Supply
Supply Current
(Internally Regulater)
Start-Up Current
mA
Thermal Shutdown
Thermal Shutdown Temperature
TOTP
170
Thermal Hysteresis
THYS
25
_C
Efficiency
Efficiency
400 mA Output
400-mA
Output, VNEG = −48
48 V
+5 V
Room
77
+3.3 V
Room
73
%
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
DETAILED BLOCK DIAGRAM
VOUT
4
5
10 mA
R1*
GND
6
R2*
+
−
VCC
−
GM
+
3.5 V
+
−
H
VREF
1.25 V
1.5 V
−
+
L
VNEG
Soft Start
Hiccup Discharge Mode
OSC
VCC
COMP
2 mA
OTP
7
8
0.6 V
−
+
−
Low Side
Error Amp
LX
50% Max.
PWM Duty Cycle
+
R
Q
−VIN
S
BYPASS
3
OCL
Bias/
Reference
Circuit
+
0.67 V
−
1
−
+
−
+
2
VNEG
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
8.5 V
+
−
CS
0.6-V Hysteresis
*R1 and R2 are internal voltage setting resistors used to set
output voltage to fixed 3.3 V or 5 V.
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Si9121
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
5-V VOUT vs. Temperature
5.10
3.40
5.05
3.35
5.00
3.30
4.95
3.25
4.90
3.20
4.85
−40
−20
0
20
40
60
3.3-V VOUT vs. Temperature
3.45
V OUT (V)
V OUT (V)
5.15
80
3.15
−40
100
−20
0
Temperature (_C)
rDS(on) vs. Temperature
60
80
100
80
100
Frequency vs. Temperature
2.0
100
1.5
1.0
0.5
−40
40
105
Frequency (kHz)
r DS(on) − On-Resistance ( W )
2.5
20
Temperature (_C)
95
90
−20
0
20
40
60
80
85
−40
100
−20
0
Temperature (_C)
40
60
Supply Current vs. VNEG
1.4
Supply Current (I GND )
20
Temperature (_C)
1.3
25_C
1.2
85_C
−40_C
1.1
1.0
−60
−50
−40
−30
−20
−10
VNEG − (V)
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Document Number: 71112
S-40708—Rev. C, 19-Apr-04
Si9121
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Output Load vs. Efficiency (Si9121DY-3)
No VCC Winding
90
90
80
VIN = 10 V
70
70
60
60
Efficiency (%)
Efficiency (%)
80
VIN = 48 V
50
Output Load vs. Efficiency (Si9121DY-5)
No VCC Winding
VIN = 60 V
40
10 VIN
48 VIN
50
40
30
30
20
20
10
10
0
0
10
100
10
1000
100
IOUT (mA)
Output Load vs. Efficiency (Si9121DY-5)
With VCC Winding
90
VNEG = −10 V
80
1000
IOUT (mA)
Output Load vs. Efficiency (Si9121DY-3)
With VCC Winding
90
48 VIN
80
10 VIN
70
60
Efficiency (%)
70
Efficiency (%)
60 VIN
VNEG = −48 V
50
40
VNEG = −60 V
60 VIN
60
50
40
30
30
20
20
10
10
0
0
10
100
IOUT (mA)
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
1000
10
100
1000
IOUT (mA)
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Si9121
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
ORDERING INFORMATION
SOIC-8
CS
1
VNEG
2
BYPASS
COMP
Part Number
8
LX
7
VCC
3
6
GND
4
5
VOUT
Si9121
Temperature Range
Package
Si9121DY-5-T1
Si9121DY-5-T1—E3
Tape and Reel
Si9121DY-3-T1
−40
40 to 85_C
Si9121DY-3-T1—E3
Si9121DY-5
Top View
Bulk
Si9121DY-3
Eval Kit
Temperature Range
Board Type
−10
10 to 70_C
Surface Mount and
Thru-Hole
Si9121DB-5
Si9121DB-3
PIN DESCRIPTION
Pin Number
Name
Function
1
CS
2
VNEG
Current sense pin to detect the inductor current for current mode control and over current protection
3
BYPASS
4
COMP
Compensation node to stabilize the converter
5
VOUT
Output voltage feedback connected to the PWM summing comparator
6
GND
Low impedance system ground
7
VCC
Internally generated supply voltage for the internal circuit and MOSFET drive circuit. Decouple with an external
bypass capacitor.
8
LX
Negative supply voltage (−10 V to −60 V)
+1.5-V bandgap reference. Decouple with 0.1 mF capacitor.
Inductor connection node
DETAILED DESCRIPTION
Start-Up
The UVLO circuit prevents the internal circuits from turning on
if VCC is less than 7.6 V (typical) above the negative supply
voltage at VNEG pin. With a typical hysteresis of 0.6 V, the
controller is continuously powered on until the VCC voltage
drops below 7.0 V. This hysteresis prevents the converter
from oscillating during the start-up phase and unintentionally
locking up the system. Once (VCC − VNEG) exceeds the UVLO
threshold the internal reference, oscillator, and soft-start
circuits are enabled.
Soft-Start
The Si9121 has an on-chip soft-start circuit which utilizes the
error amplifier external compensation network to ramp the
output NMOS transistor current limit which, in turn, allows the
output voltage to rise gradually without excessive overshoot.
The soft-start circuit is enable once the VCC voltage exceeds
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6
the UVLO threshold. For the recommended frequency
compensation components (see Typical Application Circuit)
the soft-start time is approximately 10 ms.
Oscillator
The oscillator is designed to operate at a nominal frequency
of 95 kHz with no external components. The 95-kHz operating
frequency allows the converter to operate in PWM mode
during the full load condition even though the duty cycle is very
low. The 95kHz switching frequency also allows the converter
to operate at optimal efficiency without a large output inductor
and capacitor.
PWM Mode and Current Limit
The Si9121 is a current-mode converter designed to operate
in PWM mode. It features pulse-by-pulse peak current limiting
such that when the peak current sensed voltage on the CS pin
is greater than 0.67 V the switch is turned off for the remainder
of the clock cycle.
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
Si9121
Vishay Siliconix
DETAILED DESCRIPTION
Bypass
The bypass voltage of the Si9121 is set at a particular positive
reference relative to the VNEG pin. The bypass voltage is used
to set an accurate voltage and bias current for the on-chip
oscillator and soft-start circuits. The 0.1-mF ceramic
decoupling capacitor is recommended between the bypass
and VNEG. No other components should be connected to this
pin.
dissipation the regulator’s thermal circuit will continue to pulse
the regulator on and off. This is called thermal cycling.
Hiccup Mode Short Circuit Protection
In addition to the thermal shutdown and the cycle-by-cycle
current limiting features already described, the Si9121 has a
built-in hiccup mode timer to handle a continuous output
short-circuit and to automatically restart the device when the
short-circuit is removed.
Error Amplifier
With a −48-V bus voltage, the converter is referenced to the
−48-V (VNEG) node as its system ground. However, the +5-V
or +3.3-V output is referenced to the GND pin, which is
normally connected to 0 V. To regulate this output voltage, the
Si9121 has an on-chip error amplifier which continuously
monitors the output voltage and compares it to a reference
voltage. This difference signal is level-shifted to the low side
circuit to control the power switch duty-cycle and hence the
regulation of the output voltage. Frequency compensation for
the error amplifier is achieved by connecting an external
network between the COMP pin and the VNEG pin.
VCC Regulator
VCC is an internally generated bias supply voltage which
should be externally bypassed with a 0.1-mF capacitor
connected to the negative supply voltage, VNEG. No load
current should be drawn from the VCC pin. VCC may be
supplied from an external source of 9.5-V to 12-V referenced
to VNEG. In this configuration, the internal VCC regulator is
disabled when the VCC receives 9.5-V, or greater, above VNEG.
Thermal Shutdown
The Si9121 also includes thermal shutdown which shuts down
the device when junction temperature exceeds 170_C due to
over heating. In thermal shutdown once the die temperature
cools to below 145_C the regulator is enabled. If the die
temperature is excessive due to high package power
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
If an output short-circuit occurs, the device immediately enters
a cycle-by-cycle current limiting mode. As long as the thermal
shutdown is not activated then the Si9121 automatically
determines whether the internal hiccup timer should be started
by monitoring the COMP pin. If VCOMP exceeds an upper
threshold voltage (approximately 3.5 V) the timer is started
and the external network at the COMP pin is discharged by an
internal 2-mA current sink until VCOMP reaches approximately
1.5 V. (Note: all voltages are with respect to VNEG). At this
point, the circuit reverts to the normal soft-start mode, whereby
the COMP network is charged by its internal soft-start 10-mA
current source and the circuit will attempt to start up in the
normal manner. However, if the output short circuit is still
present, the converter will again enter the cycle-by-cycle
current limiting mode until the COMP pin voltage reaches
3.5 V, whereupon this cycle repeats until the short circuit is
removed.
The duty cycle imposed by the hiccup timer allows the Si9121
to handle continuous short-circuit without damage as long as
the recommended component values shown in the Typical
Application Circuit are used.
MOSFET Switch
The low-side n-channel MOSFET switch is integrated to
provide optimum performance and to minimize the overall
converter size. The typical 1.5-W rDS(on) of the MOSFET
allows the converter to deliver up to 2 W of output power.
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Si9121
Vishay Siliconix
TYPICAL APPLICATION CIRCUIT
GND
L1
68 mH
+
6
3
7
2
+
33 mF
80 V
C4
0.1 mF
C5*
0.1 mF
C1
1 mF
C6
GND
BYPASS
VCC
LX
VOUT
COMP
CS
VNEG
220 mF
C2
0.1 mF*
C3
VOUT
+5 V/400 mA
or
+3.3 V/400 mA
8
5
10MQ100N
4
1
R1
0.25 W
1/ W
2
Si9121DY-5
or
Si9121DY-3
R2
75 kW
(27 kW for Si9121DY-3)
180 pF
C7
+
0.1 mF
C8
VNEG
−10 to −60 V
*Optional
FIGURE 1. Typical Applications Circuit
Silk Screen
T1
GND
C1
33 mF
80 V
68 mH
Np
+
C2*
0.1 mF
2
3
4
C3
0.1 mF
Ns
D2
BAS21
1
R1
0.25
1/ W
2
GND
C4
180 pF
C5
0.1 mF
CS
VNEG
COIL
VCC
BYPASS
GND
COMP
VOUT
Si9121DY-5
8
7
C7
220 mF
10 V +
C8*
0.1 mF
D1
10MQ100N
+VOUT
+5 V
@ 400 mA
6
5
C6
1 mF
R2
75 kW
(27 kW for Si9121DY-3)
*Optional
−VIN
−10 to −60 V
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FIGURE 2. Si9121 Application with External Vcc Through Winding
Document Number: 71112
S-40708—Rev. C, 19-Apr-04
Package Information
Vishay Siliconix
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
5
E
1
3
2
H
4
S
h x 45
D
C
0.25 mm (Gage Plane)
A
e
B
All Leads
q
A1
L
0.004"
MILLIMETERS
INCHES
DIM
Min
Max
Min
Max
A
1.35
1.75
0.053
0.069
A1
0.10
0.20
0.004
0.008
B
0.35
0.51
0.014
0.020
C
0.19
0.25
0.0075
0.010
D
4.80
5.00
0.189
0.196
E
3.80
4.00
0.150
e
0.101 mm
1.27 BSC
0.157
0.050 BSC
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.50
0.93
0.020
0.037
q
0°
8°
0°
8°
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
Document Number: 71192
11-Sep-06
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1
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Revision: 01-Jan-2022
1
Document Number: 91000