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SI9140DQ-T1-E3

SI9140DQ-T1-E3

  • 厂商:

    TFUNK(威世)

  • 封装:

    TSSOP16

  • 描述:

    IC REG CTRLR BUCK 16TSSOP

  • 数据手册
  • 价格&库存
SI9140DQ-T1-E3 数据手册
End of Life. Last Available Purchase Date is 31-Dec-2014 Si9140 Vishay Siliconix MP Controller For High Performance Process Power Supplies FEATURES Runs on 3.3- or 5-V Supplies Adjustable, High Precision Output Voltage High Frequency Operation (>1 MHz) High Efficiency Synchronous Switching Full Set of Protection Circuitry 2000-V ESD Rating (Si9140CQ/DQ) DESCRIPTION Siliconix’ Si9140 Buck converter IC is a high-performance, surface-mount switchmode controller made to power the new generation of low-voltage, high-performance microprocessors. The Si9140 has an input voltage range of 3 to 6.5 V to simplify power supply designs in desktop PCs. Its high-frequency switching capability and wide bandwidth feedback loop provide tight, absolute static and transient load regulation. Circuits using the Si9140 can be implemented with low-profile, inexpensive inductors, and will dramatically minimize power supply output and processor decoupling capacitance. The Si9140 is designed to meet the stringent regulation requirements of new and future high-frequency microprocessors, while improving the overall efficiency in new “green” systems. Today’s state-of-the-art microprocessors run at frequencies over 100 MHz. Processor clock speeds are going up and so are current requirements, but operating voltages are going down. These simultaneous changes have made dedicated, high-frequency, point-of-use buck converters an essential part of any system design. These point-of-use converters must operate at higher frequencies and provide wider feedback bandwidths than existing converters, which typically operate at less than 250 kHz and have feedback bandwidths of less than 50 kHz. The Si9140’s 100-kHz feedback loop bandwidth ensures a minimum improvement of one-half the required output/decoupling capacitance, resulting in a tremendous reduction in board size and cost of implementation. With the microprocessing power of any PC representing an investment of hundreds of dollars, designers need to ensure that the reliable operation of the processor will not be affected by the power supply. The Si9140 provides this assurance. A demo board, the Si9140DB, is available. Si9140CQ-T1 and Si9140DQ-T1 are available in lead free. APPLICATION CIRCUIT VIN VCCP R3 + VOUT C3 R2 R1 C1 L1 2 x Si4435DY 2 x Si4410DY + D1 Power-Good R4 C2 U1 Si9140 C4 1 2 C5 3 R5 4 5 6 R6 C6 7 C7 8 VDD VS MON DR VGOOD COMP FB NI VREF GND 16 15 14 DS 13 PGND 12 UVLOSET 11 COSC 10 ROSC 9 ENABLE R13 C8 R7 R10 0.1% C9 R9 R12 0.1% R8 C10 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 R11 www.vishay.com 1 Si9140 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to GND. VDD, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "0.3 V VDD to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V Thermal Impedance (QJA) 16-Pin SOIC (Y Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W 16-Pin TSSOP (Q Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135_C/W Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD +0.3 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD +0.3 V Peak Output Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C Power Dissipation (Package)a 16-Pin SOIC (Y Suffix)\b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW 16-Pin TSSOP (Q Suffix)c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 925 mW Operating Temperature C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0_ to 70_C D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40_ to 85_C Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 7.2 mW/_C above 25_C. c. Derate 7.4 mW/_C above 25_C. * . Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time RECOMMENDED OPERATING RANGE Voltages Referenced to GND. VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V to 6.5 V COSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 pF to 200 pF VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V to 6.5 V Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 kHz to 2 MHz Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kW to 250 kW VREF Load Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >150 kW SPECIFICATIONS Limits Test Conditions Unless Otherwise Specifieda Parameter Symbol C Suffix 0 to 70_C D Suffix −40 to 85_C 3 V v VDD v 6.5 V, VDD = VS GND = PGND Minb IREF = −10 mA 1.455 Typ Maxb Unit Reference Output Voltage VREF TA = 25_C 1.477 1.545 1.50 1.523 1.0 1.15 V Oscillator Maximum Frequencyc Accuracy ROSC Voltage Voltage Stabilityc Temperature Stabilityc fMAX VDD = 5 V, COSC = 47 pF, ROSC = 5.0 kW 2.0 fOSC VDD = 5 V COSC = 100 pF, ROSC = 7.50 kW, TA = 25_C 0.85 4 V v VDD v 6 V, Ref to 5 V, TA = 25_C −8 VROSC Df/f 1.0 Referenced to 25_C MHz V 8 "5 % Error Amplifier (COSC = GND, OSC DISABLED) Input Bias Current IFB Open Loop Voltage Gain AVOL Offset Voltage VOS Unity Gain Bandwidthc BW Output Current Power Supply Rejectionc IEA VNI = VREF , VFB = 1.0 V VNI = VREF −1.0 47 55 −15 0 1.0 mA 15 mV dB 10 Source (VFB = 1 V, NI = VREF) Sink (VFB = 2 V, NI = VREF) −2.0 0.4 MHz −1.0 0.8 PSRR 3 V < VDD < 6.5 V 60 VUVLOHL UVLOSET High to Low VUVLOLH UVLOSET Low to High 1.2 VHYS VUVLOLH − VUVLOHL 175 mA dB UVLOSET Voltage Monitor Under Voltage Lockout Hysteresis www.vishay.com 2 0.85 1.0 1.15 V mV Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix SPECIFICATIONS Limits Test Conditions Unless Otherwise Specifieda C Suffix 0 to 70_C D Suffix −40 to 85_C Symbol 3 V v VDD v 6.5 V, VDD = VS GND = PGND Minb IUVLO(SET) VUVLO = 0 to VDD −100 Output High Voltage VOH VS = VDD = 5 V, IOUT = −10 mA 4.7 Output Low Voltage VOL VS = VDD = 5 V, IOUT = 10 mA Peak Output Current ISOURCE VS = VDD = 5 V, VOUT = 0 V Peak Output Current ISINK VS = VDD = 5 V, VOUT = 5 V Break-Before-Make tBBM VDD = 6.5 V 40 ENABLE Turn-On Delay tdEN ENABLE Delay to Output, ENLH, VDD = 5 V 1.5 ENABLE Logic Low VENL ENABLE Logic High VENH Parameter Typ Maxb Unit 100 nA UVLOSET Voltage Monitor UVLO Input Current Output Drive (DR and DS) 4.8 200 0.2 0.3 −380 −260 V mA 300 nS Logic ENABLE Input Current ms 0.2 VDD V 0.8 VDD IEN ENABLE = 0 to VDD −1.0 1.0 mA VGOOD Comparator (Voltage-Good Comparator) Input Offset Voltage VOS −45 VIN Common Mode Voltage = VREF, VDD = 5 V 0 Input Hysteresis VINHYS Input Bias Current IBMON VIN = VREF, VDD = 5 V −1 0 Output Sink I ISINK VOUT = 5 V, VDD = 5 V 6 9 Output Low Voltage VOL IOUT = 2 mA, VDD = 5 V 45 mV 10 1 mA mA 350 500 mV Supply Supply Current—Normal Mode IDD Supply Current—Standby Mode fOSC = 1 MHz, ROSC = 7.50 kW 1.6 2.3 mA ENABLE < 0.4 V 250 330 mA Notes a. 100 pF includes CSTRAY on COSC. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. c. Guaranteed by design, not subject to production testing. TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED) VREF vs. Supply Voltage 1.515 VREF vs. Temperature 1.510 1.510 1.505 1.505 1.500 V REF (V) V REF (V) VREF with 10 mA Load 1.500 VDD = 3 V 1.495 1.490 1.490 1.485 1.485 3.0 3.5 4.0 4.5 5.0 5.5 VDD − Supply Voltage (V) Document Number: 70026 S-40699—Rev. H, 19-Apr-04 6.0 6.5 VDD = 6 V 1.495 1.480 −50 −25 0 25 50 75 100 125 t − Temperature (_C) www.vishay.com 3 Si9140 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED) VREF vs. Load Current 1.515 80 Error Amplifier Gain and Phase 0 60 1.510 Gain Gain (dB) 3.0, 3.6 V 1.500 6.5 V 1.495 5.0 V Phase 20 −60 0 −90 −120 −20 1.490 1.485 −150 −40 0 5 10 15 20 25 30 0.0001 0.001 VREF − Sourcing Current (mA) 260 CL = 10 pF f = 1 MHz 100 70_C TA = 85_C 250 1.6 70_C Standby Current ( m A) Normal Current (mA) 10 0.01 0.1 1 f − Frequency (MHz) Standby Current vs. Supply Voltage and Temperature Supply Current vs. Supply Voltage and Temperature 1.8 Phase (deg) V REF (V) −30 40 1.505 TA = 85_C 1.4 25_C 1.2 0_C 25_C 240 0_C 230 −40_C 220 −40_C 1.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 210 3.0 6.5 3.5 600 DR Sourcing Current vs. Supply Voltage 600 400 300 200 4 5.0 5.5 6.0 6.5 DR Sinking Current vs. Supply Voltage 400 300 200 3.5 4.0 4.5 5.0 5.5 VDD − Supply Voltage (V) www.vishay.com 4.5 500 DR Sinking Current (mA) DR Sourcing Current (mA) 500 100 3.0 4.0 VDD − Supply Voltage (V) VDD − Supply Voltage (V) 6.0 6.5 100 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VDD − Supply Voltage (V) Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED) 600 DS Sourcing vs. Supply Voltage 500 DS Sinking Current (mA) DS Sourcing Current (mA) 500 400 300 200 100 3.0 DS Sinking Current vs. Supply Voltage 600 400 300 200 3.5 4.0 4.5 5.0 5.5 6.0 100 3.0 6.5 3.5 VDD − Supply Voltage (V) 1.2 4.0 4.5 5.0 5.5 6.0 6.5 VDD − Supply Voltage (V) Switching Frequency vs. Supply Voltage Frequency vs. ROSC/COSC 10.00 1.1 Switching Frequency (MHz) Switching Frequency (MHz) ROSC = 7.50 kW COSC = 100 pF 1.0 0.9 1.00 4.99 kW 12.1 kW 24.9 kW 0.10 49.9 kW 100 kW 249 kW 0.8 3.0 0.01 3.5 4.0 4.5 5.0 5.5 6.0 6.5 40 200 VDD − Supply Voltage (V) UVLO Hysteresis vs. Supply Voltage 215 60 195 UVLO Hysteresis (mV) Output Delay (nS) Enable Turn-OFF Delay to Output 70 50 40 30 20 3.0 300 COSC − Capacitance (pF) 175 155 135 3.5 4.0 4.5 5.0 5.5 VDD − Supply Voltage (V) Document Number: 70026 S-40699—Rev. H, 19-Apr-04 6.0 6.5 115 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VDD − Supply Voltage (V) www.vishay.com 5 Si9140 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS OTHERWISE NOTED) Power Good Sinking Current (mA) 20 VGOOD Sinking Current vs. Supply Voltage 16 12 8 4 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VDD − Supply Voltage (V) PIN CONFIGURATIONS AND ORDERING INFORMATION SOIC-16 TSSOP-16 VDD 1 16 VS MON 2 15 DR VGOOD 3 14 DS COMP 4 13 PGND VS VDD 1 16 MON 2 15 DR VGOOD 3 14 DS COMP 4 13 PGND FB 5 12 UVLOSET NI 6 11 COSC FB 5 12 UVLOSET NI 6 11 COSC VREF 7 10 VREF 7 10 ROSC GND 8 9 GND 8 9 ENABLE ROSC ENABLE Top View Top View ORDERING INFORMATION−SOIC-16 Part Number Temperature Range Si9140CY Si9140CY-T1 ORDERING INFORMATIONTSSOP-16 Part Number Si9140CQ 0_ to 70_C Si9140CQ-T1 Si9140CY-T1—E3 Si9140CQ-T1—E3 Si9140DY Si9140DQ Si9140DY-T1 Si9140DY-T1—E3 www.vishay.com 6 Temperature Range −40_ to 85_C Si9140DQ-T1 0_ to 70_C −40_ to 85_C Si9140DQ-T1—E3 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix PIN DESCRIPTION Pin 1: VDD The positive power supply for all functional blocks except output driver. A bypass capacitor of 0.1 mF (minimum) is recommended. Pin 2: MON Non-inverting input of a comparator. Inverting input is tied internally to reference voltage. This comparator is typically used to monitor the output voltage and to flag the processor when the output voltage falls out of regulation. Pin 3: VGOOD This is an open drain output. It will be held at ground when the voltage at MON (Pin 2) is less than the internal reference. An external pull-up resistor will pull this pin high if the MON pin (Pin 2) is higher than the VREF. (Refer to Pin 2 description.) operation is disabled, supply current is reduced, the oscillator stops and DS goes high while DR goes low. Pin 10: ROSC A resistor connected from this pin to ground sets the oscillator’s capacitor COSC, charge and discharge current. See the oscillator section of the description of operation. Pin 11: COSC An external capacitor is connected to this pin to set the oscillator frequency. fOSC ] R 0.75 COSC OSC (at VDD = 5.0 V) Pin 4: COMP Pin 12: UVLOSET This pin is the output of the error amplifier. A compensation network is connected from this pin to the FB pin to stabilize the system. This pin drives one input of the internal pulse width modulation comparator. This pin will place the chip in the standby mode if the UVLOSET voltage drops below 1.2 V. Once the UVLOSET voltage exceeds 1.2 V, the chip operates normally. There is a built-in hysteresis of 165 mV. Pin 5: FB The inverting input of the error amplifier. An external resistor divider is connected to this pin to set the regulated output voltage. The compensation network is also connected to this pin. Pin 6: NI The non-inverting input of the error amplifier. In normal operation it is externally connected to VREF or an external reference. Pin 13: PGND The negative return for the VS supply. Pin 14: DS This CMOS push-pull output pin drives the external p-channel MOSFET. This pin will be high in the standby mode. A break-before-make function between DS and DR is built-in. Pin 7: VREF Pin 15: DR This pin supplies a 1.5-V reference. This CMOS push-pull output pin drives the external n-channel MOSFET. This pin will be low in the standby mode. A break-before-make function between the DS and DR is built-in. Pin 8: GND (Ground) Pin 9: ENABLE Pin 16: VS A logic high on this pin allows normal operation. A logic low places the chip in the standby mode. In standby mode normal The positive terminal of the power supply which powers the CMOS output drivers. A bypass capacitor is required. Document Number: 70026 S-40699—Rev. H, 19-Apr-04 www.vishay.com 7 Si9140 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM 1.5-V Reference Generator VDD UVLO UVLOSET VREF VREF VUVLO GND VUVLO ENABLE VS COMP VS Error Amp NI + FB − + Driver − Logic and BBM Control COSC PGND PGND VS Driver Oscillator ROSC DS DR PGND VGOOD MON VREF + − TIMING WAVEFORMS 5V ENABLE 0V 1.5 V VCOMP VCOSC 1V tBBM DS DR www.vishay.com 8 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix DESCRIPTION OF OPERATION Schematics of the Si9140 dc-to-dc conversion solutions for high-performance PC microprocessors are shown in Figure 1 and 2 respectively. These solutions are geared to meet the extremely demanding transient regulation and power requirements of these new microprocessors at minimal cost 5V (VIN) VCCP R3 100 + R1 20 k C1 2 x 220 mF 10 V OS-CON C4, 5.6 pF 3 R5 240 k 4 5 6 C6 0.1 mF R6 7 4.99 k 8 C7 0.1 mF VDD VS MON DR VGOOD COMP FB NI VREF GND Coiltronics CTX07-12877 + 2.9 V (VOUT) C2 3 x 330 mF 6.3V OS-CON U1 Si9140 2 D1 D1FS4 2 x Si4410DY Power-Good 1 L1 1.5 mH 2 x Si4435DY C3 0.1 mF R2 10 k R4 24.9 k C5, 180 pF and with a minimal parts count. The two solutions are nearly identical, except for slight variations in output voltage, load transient amplitude, and specified power. Figure 3 is a schematic diagram for a 3.3-V logic converter. 16 15 14 DS 13 PGND 12 UVLOSET 11 COSC 10 ROSC 9 ENABLE R7 100 k R13 C8 10 k 1 mF R12 13.3 k, 0.1% C9 220 pF R8 40.2 k R9 11 k C10, 180 pF R10 14.2 k 0.1% R11, 4.7 k FIGURE 1. 2.9 V @ 10 A 5V (VIN) VCCP R3 100 + R1 20 k C1 2 x 220 mF 10 V OS-CON R4 40.2 k C4, 5.6 pF C5, 180 pF 3 R6 C6 0.1 mF 4.99 k C7 0.1 mF VDD VS MON DR 16 15 14 DS 4 13 PGND COMP 5 12 UVLOSET FB 6 11 C NI OSC 7 10 ROSC VREF 9 8 ENABLE GND VGOOD + C2 3 x 330 mF 6.3V OS-CON U1 Si9140 2 Coiltronics CTX07-12877 2.5 V (VOUT) D1 D1FS4 Si4410DY Power-Good 1 R5 240 k C3 0.1 mF R2 10 k L1 1.5 mH 2 x Si4435DY R13 C8 10 k 1 mF C9 220 pF R9 11 k R7 100 k R12 13.3 k, 0.1% R8 40.2 k C10, 180 pF R10 20 k 0.1% R11, 4.7 k FIGURE 2. 2.5 V @ 8.5 A Document Number: 70026 S-40699—Rev. H, 19-Apr-04 www.vishay.com 9 Si9140 Vishay Siliconix 5V (VIN) R3 100 + C3 0.1 mF C1 2 x 220 mF TPS Tantalum D1 D1FS4 Si4410DY 1 2 3 C5, 1000 pF R5 16.2 k 4 5 6 C6 0.1 mF R6 7 4.99 k 8 C7 0.1 mF VDD VS MON DR VGOOD COMP FB NI VREF GND 16 15 14 DS 13 PGND 12 UVLOSET 11 COSC 10 ROSC 9 ENABLE 3.3 V (VOUT) + C2 3 x 330 mF TPS Tantalum U1 Si9140 C4, 330 pF Coiltronics CTX07-12891 L1 10 mH Si4435DY R13 C8 10 k 1 mF C9 220 pF R9 20 k R7 100 k R12, 13.3 k R8 40.2 k C10 1000 pF R11 4.7 k R10 11 k FIGURE 3. 3.3 V@ 5 A 5V (VIN) R3 100 + Si4435DY C3 0.1 mF C1 2 x 220 mF TPS Tantalum Si4410DY 1 2 C5, 1000 pF 3 R5 16.2 k 4 5 6 R6 4.99 k C6 0.1 mF 7 C7 0.1 mF 8 VDD VS MON DR VGOOD COMP FB NI VREF GND 16 15 14 DS 13 PGND 12 UVLOSET 11 COSC 10 ROSC 9 ENABLE Coiltronics CTX07-12891 D1 D1FS4 + 1.5 V (VOUT) C2 3 x 330 mF TPS Tantalum U1 Si9140 C4, 330 pF L1 10 mH R13 C8 10 k 1 mF C9 220 pF R9 20 k R7 100 k R12, 13.3 k R8 40.2 k C10 1000 pF R11 4.7 k FIGURE 4. 1.5-V Converter for GTL+ Bus @ 5 A Figure 4 is a schematic diagram of a converter which produces 1.5 V for a GTL bus. D Switch and Synchronous Rectification MOSFETs—delivers the power to the load Each of these dc-to-dc converters has four major sections: D Inductor—filters and stores the energy D PWM Controller—regulates the output voltage D Input/Output Capacitor—filters the ripple www.vishay.com 10 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix There are generally two types of controllers, voltage mode or current mode. In voltage mode control, an error voltage is generated by comparing the output voltage to the reference voltage. The error voltage is then compared to an artificial ramp, and the result is the duty cycle necessary to regulate the output voltage. In current mode, an actual inductor current is used, in place of the artificial ramp, to sense the voltage across the current sense resistor. The logic and timing sequence for voltage mode control is shown in Figure 5. The Si9140 offers voltage mode control, which is better suited for applications requiring both fast transient response and high output current. Current mode control requires a current sense resistor to monitor the inductor current. A 10-mW sense resistor in a 10-A design will dissipate 1 W, decreasing efficiency by 3.5%. Such a design would require a 2-W resistor to satisfy derating criteria, besides requiring additional board space. Voltage mode control is a second-order LC system and has a faster natural transient response compared to current mode control (first-order RC system). Current mode has the advantage of providing an inherently good line regulation. But the situations where line voltage is fixed, as in the point-of-use conversion for microprocessors, this feature is wasted. Current mode control also provides automatic pulse-to-pulse current limiting. This feature requires a current sense resistor as stated above. These characteristics make voltage mode control ideal for high-end microprocessor power supplies. The Si9140 achieves the 5-mS transient response by generating a 100-kHz closed-loop bandwidth. This is possible only by switching above 400 kHz and utilizing an error amplifier with at least a 10-MHz bandwidth. The Si9140 controller has a 25-MHz unity gain bandwidth error amplifier. The switching frequency must be at least four times greater than the desired closed-loop bandwidth to prevent oscillation. To respond to the stimuli, the error amplifier bandwidth needs to be at least 10 times larger than the desired bandwidth. Phase Phase (deg) PWM Controller The error amplifier of the PWM controller plays a major role in determining the output voltage, stability, and the transient response of the power supply. In the Si9140, the non-inverting input of the error amplifier is available for use with an external precision reference for tighter tolerance regulation. With a two-pair lead-lag compensation network, it is easy to create a stable 100-kHz closed loop converter with the Si9140 error amplifier. Gain (dB) The functions of each circuit are explained in detail below. Design equations are provided to optimize each application circuit. Gain Frequency (Hz) FIGURE 6. 100-kHz BW Synchronous Buck Converter OSC COMP DS DR FIGURE 5. Voltage Mode Logic and Timing Diagram Document Number: 70026 S-40699—Rev. H, 19-Apr-04 The Si9140 solution requires only three 330-mF OS-CON capacitors on the output of power supply to meet the 10-A transient requirement. Other converter solutions on the market with 20- to 50-kHz closed loop bandwidths typically require two to five times the output capacitance specified above to match the Si9140’s performance. The theoretical issues and analytical steps involved in compensating a feedback network are beyond the scope of this application note. However, to ease the converter design for today’s high-performance microprocessors, typical component values for the feedback network are provided in Table 1 for various combinations of output capacitance. Figure 6 shows the Bode plot (frequency domain) of the 2.9-V converter shown schematically in Figure 1. www.vishay.com 11 Si9140 Vishay Siliconix reference and 3.5% transient load regulation safely complies with the "5% regulation requirement. If additional margin is desired, an external precision reference can be used in place of the internal 1.5-V reference. TABLE 1. FEEDBACK NETWORK COMPONENT VALUES Total Output and Decoupling Capacitance C4 C5 R5 3 x 330 . . . . . . . . . Os-con 6 x 100 mFb . . . . . . . . . Tantalum 25 x 1 mFb . . . . . . . . . . Ceramic 5.6 pF 180 pF 240 k 2 x 330 mFa . . . . . . . . . Os-con 4 x 100 mFb . . . . . . . . . Tantalum 25 x 1 mFb . . . . . . . . . . Ceramic 10 pF 220 pF 200 k 3 x 330 mFa . . . . . . . . . Tantalum 4 x 100 mFb . . . . . . . . . Tantalum 25 x 1 mFb . . . . . . . . . . Ceramic 10 pF 100 pF 100 k mFa a. b. Switching and Synchronous Rectification MOSFETs Power supply output capacitance. mprocessor decoupling capacitance. Figure 7 is the measured transient response (time domain) for the 10-A step response. The measured transient response shows the processor voltage regulating to 70 mV, well within the 0.145-V regulation. The Si9140’s switching frequency is determined by the external ROSC and COSC values, allowing designers to set the switching frequency of their choice. For applications where space is the main constraint, the switching frequency can be set as high as 2 MHz to minimize inductor and output capacitor size. In applications where efficiency is the main concern, the switching frequency can be set low to maximize battery life. The switching frequency for high-performance processors applications circuits are set for 400 kHz. The equation for switching frequency is: fOSC [ 0.75 ROSC COSC (at VDD = 5.0 V) The precision reference is set at 1.5 V"1.5%. The reference is capable of sourcing up to 1 mA. The combination of 1.5% The synchronous gate drive outputs of Si9140 PWM controller drive the high-side p-channel switch MOSFET and the low-side n-channel synchronous rectifier MOSFET. The physical difference between the non-synchronous to synchronous rectification requires an additional MOSFET across the free-wheeling diode (D1). The inductor current will reach 0 A if the peak-to-peak inductor current equals twice the output current. In synchronous rectification mode, current is allowed to flow backwards from the inductor (L1) through the synchronous MOSFET (Q3) and to the output capacitor (C2) once the current reaches 0 A. Refer to schematic on Figure 1. In non-synchronous rectification, the diode (D1) prevents the current from flowing in the reverse direction. This minor difference has a drastic affect on the performance of a power supply. By allowing the current to flow in the reverse direction, it preserves the continuous inductor current mode, maintaining the wide converter bandwidth and improving efficiency. Also, maintaining the continuous current mode during light load to full load guarantees consistent transient response throughout a wide range of load conditions. The transition from stop clock and auto halt to active mode is a perfect example. The microprocessor current can vary from 0.5 A to 10 A or greater during these transitions. If the converter were to operate in discontinuous current mode during the stop clock and auto halt modes, the transfer function of the converter would be different compared to operation in the active mode. In discontinuous current mode, the converter bandwidth can be 10 to 15 times lower than the continuous current mode (Figure 8). Therefore, the response time will also be 10 to 15 times slower, violating the microprocessor’s regulator requirements. This could result in unreliable operation of the microprocessor. mP Voltage 2.9 V mP Current 10 A 5A 0A a) Transient Response from 0- to 10-A Step Load b) Transient Response from 10- to 0-A Step Load FIGURE 7. www.vishay.com 12 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix For these reasons, synchronous rectification is a must in today’s microprocessors power supply design. Pulseskipping modes are undesirable in high-performance microprocessor power supplies, especially when the minimum load current is as high as 500 mA. This pulse-skipping mode disables the synchronous rectification during light load and generates a random noise spectrum which may produce EMI problems. Worst case current of 10 A can be handled with two paralleled Si4435DY and two paralleled Si4410DY MOSFETs, which results in the efficiency levels shown in Figure 9. 100 VIN = 5 V VOUT = 2.9 V 95 Efficiency (%) Siliconix’ TrenchFETt technology has resulted in 20-mW n-channel (Si4410DY) and 35-mW p-channel (Si4435DY) MOSFETs in the SO-8 surface-mount package. These LITTLE FOOTr products totally eliminate the need for an external heatsink. 90 85 80 Phase 0 2 4 6 8 10 Gain Frequency (Hz) FIGURE 8. Non-Synchronous Converter BW FIGURE 9. Efficiency Phase (deg) Gain (dB) IOUT (A) Good electrical designs must provide an adequate margin for the specification, but they should not be grossly overdesigned to lower costs. LITTLE FOOT power MOSFETs allow designers to balance cost and performance considerations without sacrificing either. If the design requires only an 8.5-A continuous current, for example, one Si4410DY can be eliminated. Table 2 shows the number of MOSFETs required to handle the various output current levels of today’s highperformance microprocessors. For other output power levels, the equations below should be used to calculate the power handling capability of the MOSFET. TABLE 2. CONVERTER REQUIREMENTS (FIGURES 1, 2, AND 3) IO (A) Maximum Quantity High-Side P-Channel Si4435DY Quantity Low-Side N-Channel Si4410DY Quantity Input (C1-C3) Capacitor Os-con 220 mF 5A 1 1 1 8.5 A 2 1 2 10 A 2 2 2 14.5 A 3 2 3 Document Number: 70026 S-40699—Rev. H, 19-Apr-04 www.vishay.com 13 Si9140 Vishay Siliconix PDissipation in switch + IRMS SW 2 IRMS SW + RSW ) Ǹǒ IPEAK 2 ) IPP 2 ) I PEAK Q SW IPPǓ V IN 2 3 RMS RECT + Ǹǒ I PEAK 2 ) I PP 2 ) I PEAK I PP Ǔ ) I PP RRECT ) Q RECT V O2 f OSC L IPEAK + PIN + VO h tC V IN 2 IRMSSW RSW IRMSRECT RRECT QSW QRECT VIN VO IO fOSC h tC V IN PIN – (0.5 VO VO 2 fOSC f OSC (V IN – V ) O 3 V IN IPP = IPEAK + DI DI + VO VO V IN PDissipation in synchronous rectification + IRMS RECT2 I f OSC DI) IO = = = = = = = = = = = = Switch rms current Switch on resistance Synchronous rectifier rms current Synchronous rectifier on resistance Total gate charge of switch Total gate charge of synchronous rectifier Input voltage Output voltage Output current Switching frequency efficiency Crossover time Current IO IPEAK IPP 0A time Inductor The size and value of the inductor are critical in meeting overall circuit dimensional requirements and in assuring proper transient voltage regulation. The size of the core is determined by the output power, the material of the core, and the operating frequency. To handle higher output power, the core must be larger. Luckily, a higher switching frequency will lower the inductance value, decreasing the core size. However, a higher switching frequency can also mean greater core loss. In applications where the dc flux density is high and the ac flux density swing is only 100 to 200 gauss, the core loss will be www.vishay.com 14 negligible compared to the wire loss. Kool Mu is the best material to use at 500 kHz to deliver 30 W in the minimum volume. Ferrite has a lower core cost and loss at this frequency, but the core size is fairly large. If the power supply is designed on the motherboard and space is not a critical issue, ferrite is a better choice. The higher switching frequency reduces the core size by decreasing the amount of energy that must be stored between switching periods. It also accelerates the transient response to the load by decreasing the inductance value. The inductance is calculated with following equation: Document Number: 70026 S-40699—Rev. H, 19-Apr-04 Si9140 Vishay Siliconix L+ V IN V O2 DI f OSC DI = desired output current ripple. Typically DI = 25% of maximum output current. Finally, the time required to ramp up the current in the inductor can be reduced with smaller inductance. A quick response from the power supply relaxes the decoupling capacitance required at the microprocessor, reducing the overall solution cost and size. Input Capacitor The input capacitor’s function is to filter the raw power and serve as the local power source to eliminate power-up and transient surge failures. The type and characteristics of input capacitors are determined by the input power and inductance of the step-down converter. The ripple current handling requirement usually dominates the selection criteria. The capacitance required to maintain regulation will automatically be achieved once it meets the ripple current requirement. The following equation calculates the ripple current of the input capacitor: IRIPPLE + ǸIRMSSW 2 – I IN2 An aluminum-electrolytic capacitor from Sanyo (OS-CON), AVX (TPS Tantalum), or Nichicon (PL series) should be used in high-power (30-W) applications to handle the ripple current. The Sanyo capacitor is smaller and handles higher ripple current than Nichicon, but at higher cost than the Nichicon product. The AVX Tantalum capacitor has the best capacitance and current handling capability per volume ratio, but it takes extra surface area compared to OS-CON or PL series. The TPS capacitors, lead time and cost have increased drastically in the recent past due to high demand, causing designers to shy away from the TPS Tantalum capacitors. Nichicon capacitors can be used to provide an economical solution if space is available or a large bulk capacitance is already present on the input line. The number Document Number: 70026 S-40699—Rev. H, 19-Apr-04 of Sanyo (OS-CON) input capacitors required to handle various output currents are specified in Table 2. Output Capacitor To regulate the microprocessor’s input voltage within 145 mV during 10-A load transients, a large output capacitance with low ESR is required. The output capacitor of the power supply and decoupling capacitors at the microprocessor must hold up the processor voltage until the power supply responds to the change. Even with fastest known switching solution, it still takes three 330-mF OS-CON capacitors to handle the load transient. If it weren’t for the 10-A load transient, the output capacitor would not need a low ESR value. The fundamental output ripple current in a continuous step-down converter is much lower than the input ripple current. Maintaining voltage regulation during transients requires an ESR in the range of 30 mW. For microprocessors with lower transient requirements, the number of output and decoupling capacitors can be reduced. The lower transient requirements also allows greater consideration for Tantalum or Nichicon PL series capacitors. Conclusion The Si9140 synchronous Buck controller’s ability to switch up to 1 MHz combined with a 25-MHz error amplifier provides the best solution in powering high- performance microprocessors. The high switching frequency reduces inductor size without compromising output ripple voltage. The wide converter bandwidth generated with the help of a 25-MHz error amplifier reduces the amount of decoupling capacitors required to handle the extreme transient requirement. The Si9140’s synchronous fixed-frequency operation eliminates the pulse skipping mode that generates random unpredictable EMI/EMC problems in desktop and notebook computers. The synchronous rectification also allows the converter to operate in continuous current mode, independent of output load current. This preserves the wide closed-loop converter bandwidth required to meet the transient demand of the microprocessor as it transitions from stop clock and auto halt to active mode. The synchronous rectification improves the efficiency of the converter by substituting the much smaller I2R MOSFET loss for the VI diode loss. The need for heatsinking is eliminated by using low rDS(on) TrenchFETs (Si4410DY and Si4435DY). www.vishay.com 15 Package Information Vishay Siliconix SOIC (NARROW): 16-LEAD (POWER IC ONLY) JEDEC Part Number: MS-012 MILLIMETERS 16 15 14 13 12 11 10 Dim A A1 B C D E e H L Ĭ 9 E 1 2 3 4 5 6 7 8 INCHES Min Max Min Max 1.35 1.75 0.053 0.069 0.10 0.20 0.004 0.008 0.38 0.51 0.015 0.020 0.18 0.23 0.007 0.009 9.80 10.00 0.385 0.393 3.80 4.00 0.149 0.157 1.27 BSC 0.050 BSC 5.80 6.20 0.228 0.244 0.50 0.93 0.020 0.037 0_ 8_ 0_ 8_ ECN: S-40080—Rev. A, 02-Feb-04 DWG: 5912 H D C All Leads e Document Number: 72807 28-Jan-04 B A1 L Ĭ 0.101 mm 0.004 IN www.vishay.com 1 Package Information Vishay Siliconix TSSOP: 16-LEAD DIMENSIONS IN MILLIMETERS Symbols Min Nom Max A - 1.10 1.20 A1 0.05 0.10 0.15 A2 - 1.00 1.05 0.38 B 0.22 0.28 C - 0.127 - D 4.90 5.00 5.10 E 6.10 6.40 6.70 E1 4.30 4.40 4.50 e - 0.65 - L 0.50 0.60 0.70 L1 0.90 1.00 1.10 y - - 0.10 θ1 0° 3° 6° ECN: S-61920-Rev. D, 23-Oct-06 DWG: 5624 Document Number: 74417 23-Oct-06 www.vishay.com 1 PAD Pattern www.vishay.com Vishay Siliconix RECOMMENDED MINIMUM PAD FOR TSSOP-16 0.193 (4.90) 0.171 0.014 0.026 0.012 (0.35) (0.65) (0.30) (4.35) (7.15) 0.281 0.055 (1.40) Recommended Minimum Pads Dimensions in inches (mm) Revision: 02-Sep-11 1 Document Number: 63550 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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