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SI9185DMP-AD-T1-E3

SI9185DMP-AD-T1-E3

  • 厂商:

    TFUNK(威世)

  • 封装:

    PowerPAK®MLP33-8

  • 描述:

    Linear Voltage Regulator IC Positive Adjustable 1 Output Adjustable 500mA PowerPAK® MLP33-8

  • 数据手册
  • 价格&库存
SI9185DMP-AD-T1-E3 数据手册
Si9185 Vishay Siliconix Micropower 500 mA CMOS LDO Regulator with Error Flag/Power-On-Reset DESCRIPTION FEATURES The Si9185 is a 500 mA CMOS LDO (low dropout) voltage regulator. The device features ultra low ground current and dropout voltage to prolong battery life in portable electronics. The Si9185 offers line/load transient response and ripple rejection superior to that of bipolar or BiCMOS LDO regulators, and is designed to drive lower cost ceramic, as well as tantalum, output capacitors. An external noise bypass capacitor connected to the device’s CNOISE pin will lower the LDO’s output noise for low noise applications. The Si9185 also includes an out-of-regulation error flag. If a capacitor is connected to the device’s delay pin, the error flag output pin will generate a delayed power-on-reset signal. The device is guaranteed stable from maximum load current down to 0 mA load. The Si9185 is available in both standard and lead (Pb)-free MLP33 PowerPAK packages and is specified to operate over the industrial temperature range of - 40 °C to 85 °C. MLP33 PowerPAK packaging allows enhanced heat transfer to the PC board. • • • • • • • • • • • • • • Input voltage 2 V to 6 V Low 150 mV dropout at 500 mA load Guaranteed 500 mA output current Uses low ESR ceramic output capacitor Fast load and line transient response Only 100 µVRMS noise with noise bypass capacitor 1 µA maximum shutdown current Built-in short circuit and thermal protection Out-of-regulation error flag (power good or POR) Fixed 1.215 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 5.0 V, or adjustable output voltage options Other output voltages available by special order 1.1 W power dissipation Thin, thermally enhanced MLP33 PowerPAK® package Compliant to RoHS directive 2002/95/EC APPLICATIONS • • • • Laptop and palm computers Desktop computers Cellular phones PDA, digital still cameras TYPICAL APPLICATIONS CIRCUITS VIN 1 CNOISE SD 8 1 CNOISE SD 8 2 DELAY ERROR 7 2 DELAY ERROR 7 3 GND SENSE/ADJ 6 3 GND SENSE/ADJ 6 4 VIN VOUT 5 4 VIN VOUT 5 2.2 µF GND VOUT VIN 2.2 µF GND 2.2 µF Si9185 Figure 2. Adjustable Output 0.1 F 0.1 µF 2.2 µF GND 2.2 µF Si9185 Figure 1. Fixed Output VIN VOUT 1 CNOISE SD 8 2 DELAY ERROR 7 3 GND 4 VIN SENSE/ADJ 6 VOUT 5 Si9185 ON/OFF POR 1 MΩ VOUT 2.2 µF Figure 3. Low Noise, Full Features Application * Pb containing terminations are not RoHS compliant, exemptions may apply. Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 www.vishay.com 1 Si9185 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Limit Input Voltage, VIN Unit 6.5 SD Input Voltage, VSD V - 0.3 to VIN Output Current, IOUT 500 mA Continuous, Short Circuit Protected mA Output Voltage, VOUT - 0.3 to VO(nom) + 0.3 V Maximum Junction Temperature, TJ(max) 150 Storage Temperature, TSTG °C - 55 to 150 ESD (Human Body Model) Power Dissipationa Thermal Resistance (ΘJA)a 2 kV 2.5 W RΘJA 50 RΘJC 4 °C/W Notes: a. Device Mounted with all leads soldered or welded to PC board. (PC board - 2" x 2", 4-layer, FR4, 0.25 square inch spreading copper). b. Derate 20 mW/°C above TA = 25 °C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Parameter Limit Input Voltage, VIN Unit 2 to 6 Output Voltage, VOUT (Adjustable Version) V 1.215 to 5 R2 25 to 150 Operating Ambient Temperature, TA - 40 to 85 kΩ Operating Junction Temperature, TJ - 40 to 125 °C Notes: CIN = 2.2 µF, COUT = 2.2 µF (ceramic, X5R or X7R type), CNOISE = 0.1 µF (ceramic) COUTRange = 1 µF to 10 µF (± 10 %, x5R or x7R type) CIN ≥ COUT SPECIFICATIONS Parameter Symbol Output Voltage Range Output Voltage Accuracy (Fixed Versions) Feedback Voltage (ADJ Version) Line Regulation (VADJ ≤ VOUT ≤ 4 V) Line Regulation (4 V VOUT ≤ 5 V) VOUT ΔVOUT x 100 VIN x VOUT VIN - VOUT www.vishay.com 2 Limits - 40 °C to 85 °C Temp.a Min.b Adjustable Version Full 1 mA ≤ IOUT ≤ 500 mA Room Full Typ.c Max.b Unit 1.215 5 V - 1.5 1.5 - 2.5 2.5 Room 1.191 Full 1.179 1.251 From VIN = VOUT + 1 V to VOUT + 2 V Full - 0.18 0.18 From VIN = 5.5 V to 6 V Full - 0.18 0.18 IOUT = 10 mA Room 5 20 IOUT = 200 mA Room 145 215 Room 320 VADJ Dropout Voltaged (at VOUT(nom) ≥ 2 V) Dropout Voltaged (at VOUT(nom) ≥ 2.5 V) Test Conditions Unless Otherwise Specified VIN = VOUT(nom) + 1 V, IOUT = 1 mA, CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V IOUT = 500 mA IOUT = 200 mA IOUT = 500 mA 1.215 1.239 % VO(nom) V %/V Full Room 115 Room 250 Full 480 600 mV 175 400 480 Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Si9185 Vishay Siliconix SPECIFICATIONS Parameter Dropout Voltaged (at VOUT(nom) ≥ 3.3 V) Symbol VIN - VOUT Temp.a IOUT = 200 mA IOUT = 500 mA VIN - VOUT Dropout Voltaged (at VOUT(nom) < 2 V, VIN ≥ 2 V) VIN - VOUT IGND IOUT = 500 mA ADJ Pin Current Peak Output current Output Noise Voltage Ripple Rejection Min.b Typ.c Max.b Room 90 135 Room 200 300 Room 60 100 Room 150 210 Room 170 250 IOUT = 500 mA Room Full 415 625 825 IOUT = 0 mA Room 150 Room 1000 Full 1500 Room µA 2500 Full 4000 IIN(off) VSD = 0 V Room 0.1 1 µA IADJ ADJ = 1.2 V Room 5 100 nA IO(peak) VOUT ≥ 0.95 x VOUT(nom), tpw = 2 ms Room 600 mA eN BW = 50 Hz to 100 kHz IOUT = 150 mA w/o CNOISE Room 200 CNOISE = 0.1 µF Room 100 f = 1 kHz Room 60 ΔVOUT/ΔVIN IOUT = 150 mA f = 10 kHz Room 60 f = 100 kHz Room 40 Dynamic Line Regulation ΔVO(line) VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V tR/tF = 5 µs, IOUT = 500 mA Room 10 Dynamic Load Regulation ΔVO(load) IOUT : 1 mA to 150 mA, tR/tF = 2 µs Room 30 VOUT Turn-On Time mV 300 IOUT = 200 mA IOUT = 200 mA Unit 400 Full IOUT = 500 mA Shutdown Supply Current Limits - 40 °C to 85 °C Full IOUT = 200 mA Dropout Voltaged (at VOUT(nom) ≥ 5 V) Ground Pin Current Test Conditions Unless Otherwise Specified VIN = VOUT(nom) + 1 V, IOUT = 1 mA, CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V tON VIN = 4.3 V VOUT = 3.3 V µV(rms) dB mV w/o CNOISE Cap Room 5 µs CNOISE = 0.1 µF Room 2 mS Thermal Shutdown Thermal Shutdown Junction Temperature tJ(s/d) Room 165 Thermal Hysteresis tHYST Room 20 Short Circuit Current ISC VOUT = 0 V Room 800 VIH High = Regulator On (Rising) Full VIL Low = Regulator Off (Falling) Full IIH VSD = 0 V, Regulator OFF Room 0.01 IIL VSD = 6 V, Regulator ON Room 1.0 Full 100 °C mA Shutdown Input SD Input Voltage SD Input Currente Shutdown Hysteresis Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 VHYST VIN 1.5 0.4 V µA mV www.vishay.com 3 Si9185 Vishay Siliconix SPECIFICATIONS Parameter Symbol Test Conditions Unless Otherwise Specified VIN = VOUT(nom) + 1 V, IOUT = 1 mA, CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V Temp.a IOFF ERROR = VOUT(nom) Full VOL ISINK = 2 mA Full Limits - 40 °C to 85 °C Min.b Typ.c Max.b Unit 0.01 2 µA 0.95 x VOUT 0.97 x VOUT V 3.0 µA Error Output Output High Leakage g Output Low Voltage Out-of-Regulation Error Flag Threshold Voltage (Rising)g VTH Full Hysteresisg VHYST Room Delay Pin Current Source IDELAY Room 0.4 0.93 x VOUT 2%x VOUT 1.2 2.2 Notes: a. Room = 25 °C, Full = - 40 °C to 85 °C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT ≥ 2 V are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V. d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured with a 1 V differential, provided that VIN does not drop below 2.0 V. When VOUT(nom) is less than 2.0 V, the output will be in regulation when 2.0 V - VOUT(nom) is greater than the dropout voltage specified. e. The device’s shutdown pin includes a typical 6 MΩ internal pull-down resistor connected to ground. f. VOUT is defined as the output voltage of the DUT at 1 mA. g. The Error Output (Low) function is guaranteed for VIN ≥ 2.0 V. TIMING WAVEFORMS VIN tON VNOM 0.95 VNOM VOUT ERROR tDELAY Figure 4. Timing Diagram for Power-Up www.vishay.com 4 Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Si9185 Vishay Siliconix PIN CONFIGURATION MLP33 PowerPAK MLP33 PowerPAK CNOISE 1 8 SD DELAY 2 7 ERROR GND 3 6 SENSE or ADJ VIN 4 5 VOUT SD 8 1 CNOISE ERROR 7 2 DELAY SENSE or ADJ 6 3 GND VOUT 5 4 VIN Exposed Pad Bottom View Top View PIN DESCRIPTION Pin Number Name Function 1 CNOISE Noise bypass pin. For low noise applications, a 0.01 µF or larger ceramic capacitor should be connected from this pin to ground. 2 DELAY Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output. Refer to Figure 4. 3 GND 4 VIN 5 VOUT 6 SENSE or ADJ For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output voltage version, this voltage feedback pin sets the output voltage via an external resistor divider. 7 ERROR This open drain output is an error flag output which goes low when VOUT drops 5 % below its nominal voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin. 8 SD Exposed Pad Ground pin. Local ground for CNOISE and COUT. Input supply pin. Bypass this pin with a 2.2 µF ceramic or tantalum capacitor to ground. Output voltage. Connect COUT between this pin and ground. By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused. The die substrate is attached to the exposed pad and must be electrically connected to GND. ORDERING INFORMATION Standard Part Number Lead (Pb)-free Part Number Marking Voltage Si9185DMP-12-T1 Si9185DMP-12-T1-E3 8512 1.215 V Si9185DMP-18-T1 Si9185DMP-18-T1-E3 8518 1.80 V Si9185DMP-25-T1 Si9185DMP-25-T1-E3 8525 2.50 V Si9185DMP-28-T1 Si9185DMP-28-T1-E3 8528 2.80 V Si9185DMP-30-T1 Si9185DMP-30-T1-E3 8530 3.00 V Si9185DMP-33-T1 Si9185DMP-33-T1-E3 8533 3.30 V Si9185DMP-50-T1 Si9185DMP-50-T1-E3 8550 5.00 V Si9185DMP-AD-T1 Si9185DMP-AD-T1-E3 85AD Adjustable Temperature Package - 40 °C to 85 °C MLP33 PowerPak Additional voltage options are available. Eval Kit Temperature Range Board Type Si9185DB - 40 to 85 °C Surface Mount Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 www.vishay.com 5 Si9185 Vishay Siliconix TYPICAL CHARACTERISTICS Internally Regulated, 25 °C, unless otherwise noted 3.5 300 VOUT = 3.0 V 250 3.0 RLOAD = 16.5 Ω 2.5 VOUT (V) VDROP (mV) 200 150 2.0 1.5 100 1.0 50 0.5 0.0 0 0 100 200 300 400 500 0 600 1 2 3 4 5 ILOAD (mA) VIN (V) Dropout Voltage vs. Load Current Dropout Characteristic 6 400 300 IOUT = 500 mA 350 250 VDROP (mV) 150 IOUT = 200 mA 100 Dropout Voltage (mV) 300 VOUT = 3.0 V 200 250 IOUT = 500 mA 200 IOUT = 200 mA 150 100 50 50 IOUT = 10 mA 0 - 50 - 25 0 25 50 75 100 IOUT = 10 mA 0 1.0 IOUT = 0 mA 125 150 1.5 2.0 2.5 3.0 3.5 4.0 Junction Temperature (°C) VOUT Dropout Voltage vs. Temperature Dropout Voltage vs. VOUT 4.5 5.0 0.2 0.30 IOUT = 1 mA 0.0 0.00 - 0.2 VOUT (%) Output Voltage (%) 0.15 - 0.15 - 0.30 IOUT = 200 mA - 0.4 IOUT = 500 mA - 0.6 - 0.45 - 0.8 - 0.60 - 0.75 0 50 100 150 200 250 300 350 400 450 500 - 1.0 - 40 - 20 0 20 40 60 80 100 120 Load Current (mA) Junction Temperature (°C) Normalized Output Voltage vs. Load Current Normalized VOUT vs. Temperature www.vishay.com 6 140 Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Si9185 Vishay Siliconix TYPICAL CHARACTERISTICS Internally Regulated, 25 °C, unless otherwise noted 300 0.0 VOUT = 5 V 250 - 0.5 I GND (µA) IGND (mA) 200 - 1.0 25 °C - 1.5 85 °C 150 25 °C 100 - 40 °C - 2.0 50 0 - 2.5 0 50 0 100 150 200 250 300 350 400 450 500 1 2 3 4 5 6 Load Current (mA) Input Voltage (V) GND Current vs. Load Current No Load GND Pin Current vs. Input Voltage 0 7 2500 VOUT = 5 V IOUT = 500 mA CIN = 10 µF COUT = 2.2 µF ILOAD = 150 mA 2000 I GND (µA) Gain (dB) - 20 - 40 1500 IOUT = 200 mA 1000 - 60 500 IOUT = 0 mA - 80 10 102 103 104 Frequency (Hz) Power Supply Rejection Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 105 106 0 - 40 - 20 0 20 40 60 80 100 120 140 JunctionTemperature (°C) GND Pin Current vs. Temperature and Load www.vishay.com 7 Si9185 Vishay Siliconix TYPICAL WAVEFORMS VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div 5.00 µs/div VIN = 4.3 V, CIN = 2.2 µF VOUT = 3.3 V, COUT = 2.2 µF ILOAD = 1 mA to 150 mA trise = 2 µs 5.00 µs/div Load Transient Response-1 VIN = 4.3 V, CIN = 2.2 µF VOUT = 3.3 V, COUT = 2.2 µF ILOAD = 1 mA to 150 mA trise = 2 µs Load Transient Response-2 VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div 5.00 µs/div VIN = 4.3 V, CIN = 2.2 µF VOUT = 3.3 V, COUT = 1.0 µF ILOAD = 1 mA to 150 mA trise = 2 µs 5.00 µs/div Load Transient Response-4 Load Transient Response-3 VOUT 20 mV/div VOUT 20 mV/div ILOAD 200 mA/div ILOAD 200 mA/div 10 µs/div VIN = 4.3 V, CIN = 10 µF VOUT = 3.3 V, COUT = 10 µF ILOAD = 1 mA to 500 mA trise = 2 µs Load Transient Response-5 www.vishay.com 8 VIN = 4.3 V, CIN = 2.2 µF VOUT = 3.3 V, COUT = 1.0 µF ILOAD = 1 mA to 150 mA trise = 2 µs 10 µs/div VIN = 4.3 V, CIN = 10 µF VOUT = 3.3 V, COUT = 10 µF ILOAD = 1 mA to 500 mA trise = 2 µs Load Transient Response-6 Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Si9185 Vishay Siliconix TYPICAL WAVEFORMS VOUT 1 V/div VIN 2 V/div VOUT 10 mV/div 5.00 µs/div 5.00 µs/div VINSTEP = 4.3 V to 5.3 V VOUT = 3.3 V COUT = 2.2 µF CIN = 10 µF ILOAD = 500 mA trise = 5 µs VINSTEP = 5.3 V to 4.3 V VOUT = 3.3 V COUT = 2.2 µF CIN = 10 µF ILOAD = 500 mA tfall = 5 µs Line Transient Response-2 Line Transient Response-1 VIN CH-3 2 V/div VIN 2 V/div VOUT CH-1 2 V/div VOUT 2 V/div Cdelay CH-4 2 V/div Cdelay 2 V/div ERROR 2 V/div ERROR CH-2 2 V/div 10.00 ms/div 5.00 µ s/div VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 µF CNOISE = 0.1 µF ILOAD = 350 mA Turn-On Sequence VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 µF CNOISE = 0.1 µF ILOAD = 350 mA Turn-Off Sequence 10.0 µV Hz 500 µV/div 0.01 1 ms/div 100 Hz VIN = 4.2 V VOUT = 3.3 V IOUT = 150 mA CNOISE = 0.1 µF BW = 10 Hz to 1 MHz Output Noise Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 VIN = 4.1 V VOUT = 3.3 V/10 mA CNOISE = 0.1 µF 1 MHz Noise Spectrum www.vishay.com 9 Si9185 Vishay Siliconix BLOCK DIAGRAM VIN SENSE CNOISE 6 1 4 8 SD + - RFB2 To VIN 60 mV 6 MΩ RFB1 5 VOUT 2 µA + 2 + - DELAY 7 ERROR + 3 1.215 V VREF + - GND Figure 5. DETAILED DESCRIPTION The Si9185 is a low drop out, low quiescent current, and very linear regulator family with very fast transient response. It is primarily designed for battery powered applications where battery run time is at a premium. The low quiescent current allows extended standby time while low drop out voltage enables the system to fully utilize battery power before recharge. The Si9185 is a very fast regulator with bandwidth exceeding 50 kHz while maintaining low quiescent current at light load conditions. With this bandwidth, the Si9185 is the fastest LDO available today. The Si9185 is stable with any output capacitor type from 1 µF to 10.0 µF. However, X5R or X7R ceramic capacitors are recommended for best output noise and transient performance. VIN VIN is the input supply pin. The bypass capacitor for this pin is not critical as long as the input supply has low enough source impedance. For practical circuits, a 1.0 µF or larger ceramic capacitor is recommended. When the source impedance is not low enough and/or the source is several inches from the Si9185, then a larger input bypass capacitor is needed. It is required that the equivalent impedance (source impedance, wire, and trace impedance in parallel with input bypass capacitor impedance) must be smaller than the input impedance of the Si9185 for stable operation. When the source impedance, wire, and trace impedance are www.vishay.com 10 unknown, it is recommended that an input bypass capacitor be used of a value that is equal to or greater than the output capacitor. VOUT VOUT is the output voltage of the regulator. Connect a bypass capacitor from VOUT to ground. The output capacitor can be any value from 1.0 µF to 10.0 µF. A ceramic capacitor with X5R or X7R dielectric type is recommended for best output noise, line transient, and load transient performance. GND Ground is the common ground connection for VIN and VOUT. It is also the local ground connection for CNOISE, DELAY, SENSE or ADJ, and SD. Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Si9185 Vishay Siliconix SENSE or ADJ Safe Operating Area SENSE is used to sense the output voltage. Connect SENSE to VOUT for the fixed voltage version. For the adjustable output version, use a resistor divider R1 and R2, connect R1 from VOUT to ADJ and R2 from ADJ to ground. R2 should be in the 25 kΩ to 150 kΩ range for low power consumption, while maintaining adequate noise immunity. The ability of the Si9185 to supply current is ultimately dependent on the junction temperature of the pass device. Junction temperature is in turn dependent on power dissipation in the pass device, the thermal resistance of the package and the circuit board, and the ambient temperature. The power dissipation is defined as The formula below calculates the value of R1, given the desired output voltage and the R2 value, PD = (VIN - VOUT) * IOUT . Junction temperature is defined as R1 V OUT - VADJ R2 (1) VADJ TJ = TA + ((PD * (RθJC + RθCA)). VADJ is nominally 1.215 V. To calculate the limits of performance, these equations must be rewritten. SHUTDOWN (SD) Allowable power dissipation is calculated using the equation SD controls the turning on and off of the Si9185. VOUT is guaranteed to be on when the SD pin voltage equals or is greater than 1.5 V. VOUT is guaranteed to be off when the SD pin voltage equals or is less than 0.4 V. During shutdown mode, the Si9185 will draw less than 2 µA current from the source. To automatically turn on VOUT whenever the input is applied, tie the SD pin to VIN. ERROR ERROR is an open drain output that goes low when VOUT is less than 5 % of its normal value. As with any open drain output, an external pull up resistor is needed. When a capacitor is connected from DELAY to GROUND, the error signal transition from low to high is delayed (see Delay section). This delayed error signal can be used as the poweron reset signal for the application system. (Refer to Figure 4.) The ERROR pin is disconnected if not used. PD = (TJ - TA )/ (RθJC + RθCA) While allowable output current is calculated using the equation IOUT = (TJ - TA )/ (RθJC + RθCA) * (VIN - VOUT). Ratings of the Si9185 that must be observed are TJmax = 125 °C, TAmax = 85 °C, (VIN - VOUT)max = 5.3 V, RθJC = 4 °C/W. The value of RθCA is dependent on the PC board used. The value of RθCA for the board used in device characterization is approximately 46 °C/W. Figure 6 shows the performance limits graphically for the Si9185 mounted on the circuit board used for thermal characterization. 0.6 DELAY A capacitor from DELAY to GROUND sets the time delay for ERROR going from low to high state. The time delay can be calculated using the following formula: Idelay (2) TA = 0 °C 0.4 I OUT (A) Tdelay VADJ Cdelay 0.5 TA = 25 °C 0.3 TA = 50 °C 0.2 TA = 70 °C TA = 85 °C The DELAY pin should be an open circuit if not used. 0.1 CNOISE For low noise application, connect a high frequency ceramic capacitor from CNOISE to ground. A 0.01 µF or a 0.1 µF X5R or X7R is recommended. (VIN - VOUT)MAX = 5.3 V 0.0 0 1 2 3 4 5 6 VIN - VOUT (V) Figure 6. Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 www.vishay.com 11 Si9185 Vishay Siliconix PCB Footprint and Layout Considerations The Si9185 comes in the MLP33 PowerPAK package with an exposed pad on the bottom to provide a low thermal impedance path into the PC board. When the PC board layout is designed, a copper plane, referred to as spreading copper, is recommended to be placed under the package to which the exposed pad is soldered. This spreading copper is the path for the heat to move away from the package into the PC board. With the Si9185 mounted on a four layer board measuring 2" x 2", a spreading copper area of 0.25 square inches will yield an Rθja of 50 °C/W. This allows for power dissipation in excess of 1 watt in an 80 °C ambient environment. 1.425 0.056 0.906 0.036 0.650 0.026 0.325 0.013 2.245 0.088 0.396 0.016 1.426 0.056 mm inches 2.852 0.112 Figure 7. MLP33 PowerPAK Pad Pattern Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71765. www.vishay.com 12 Document Number: 71765 S09-2454-Rev. G, 23-Nov-09 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1
SI9185DMP-AD-T1-E3 价格&库存

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