SIHA18N60E-GE3

SiHA18N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES D Thin-Lead TO-220 FULLPAK • Low figure-of-merit (FOM) Ron x Qg • • • • • G GD S S APPLICATIONS N-Channel MOSFET • • • • Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) typ. () at 25 °C Low input capacitance (Ciss) Reduced switching and conduction losses Ultra low gate charge (Qg) Available Avalanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 650 VGS = 10 V 0.176 Qg max. (nC) 92 Qgs (nC) 10 Qgd (nC) 18 Configuration Single ORDERING INFORMATION Package Thin-Lead TO-220 FULLPAK Lead (Pb)-free SiHA18N60E-E3 Lead (Pb)-free and halogen-free SiHA18N60E-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS 600 Gate-source voltage VGS ± 30 Continuous drain current (TJ = 150 °C) e VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM Linear derating factor UNIT V 18 11 A 45 0.27 W/°C Single pulse avalanche energy b EAS 204 mJ Maximum power dissipation PD 34 W TJ, Tstg -55 to +150 °C Operating junction and storage temperature range Drain-source voltage slope Reverse diode TJ = 125 °C dV/dt d Soldering recommendations (peak temperature) c Mounting torque dV/dt 70 30 V/ns for 10 s 300 °C M3 screw 0.6 Nm Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 3.8 A c. 1.6 mm from case d. ISD  ID, dI/dt = 100 A/μs, starting TJ = 25 °C e. Limited by maximum junction temperature S17-1307-Rev. C, 21-Aug-17 Document Number: 91649 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA18N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 65 Maximum junction-to-case (drain) RthJC - 3.7 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.72 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 Gate-source leakage IGSS Zero gate voltage drain current IDSS μA - 0.176 0.202  gfs VDS = 30 V, ID = 9 A - 6.7 - S Input capacitance Ciss 1640 - Coss - 85 - Reverse transfer capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output capacitance - 6 - Effective output capacitance, energy related a Co(er) - 72 - Effective output capacitance, time  related b Co(tr) - 254 - - 46 92 - 10 - Drain-source on-state resistance Forward transconductance RDS(on) VGS = 10 V ID = 9 A Dynamic pF VDS = 0 V to 400 V, VGS = 0 V Total gate charge Qg Gate-source charge Qgs VGS = 10 V ID = 9 A, VDS = 480 V Gate-drain charge Qgd - 18 - Turn-on delay time td(on) - 17 34 Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg nC VDD = 480 V, ID = 9 A, VGS = 10 V, Rg = 9.1  - 24 48 - 51 77 - 24 48 f = 1 MHz, open drain - 0.74 - - - 18 - - 45 - - 1.2 V - 300 - ns - 4 - μC - 26 - A ns  Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the  integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 12 A, VGS = 0 V TJ = 25 °C, IF = IS = 9 A, dI/dt = 100 A/μs, VR = 25 V Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS S17-1307-Rev. C, 21-Aug-17 Document Number: 91649 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA18N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 30 3.0 TJ = 25 °C ID = 9 A RDS(on), Drain-to-Source On-Resistance (Normalized) ID, Drain-to-Source Current (A) 45 15 0 2.0 1.5 1.0 VGS = 10 V 0.5 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 30 -60 -40 -20 30 10 000 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V TJ = 150 °C Ciss 1000 C, Capacitance (pF) 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics ID, Drain-to-Source Current (A) 2.5 10 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100 Coss Crss 10 1 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 0 30 100 200 300 400 500 VDS, Drain-to-Source Voltage (V) 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 10 000 12 45 1000 30 8 TJ = 150 °C Coss Eoss 6 100 Eoss (μJ) TJ = 25 °C Coss (pF) ID, Drain-to-Source Current (A) 10 4 15 2 VDS = 29 V 10 0 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S17-1307-Rev. C, 21-Aug-17 25 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91649 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA18N60E www.vishay.com 20 VDS = 480 V VDS = 300 V VDS = 120 V 20 15 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 Vishay Siliconix 16 12 8 5 4 0 0 0 20 40 60 Qg, Total Gate Charge (nC) 80 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 75 100 125 TC, Case Temperature (°C) 150 750 VDS, Drain-to-Source Breakdown Voltage (V) ISD, Reverse Drain Current (A) 50 Fig. 10 - Maximum Drain Current vs. Case Temperature 100 TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 0.2 0.4 0.6 0.8 1.0 VSD, Source-Drain Voltage (V) 1.2 1.4 Fig. 8 - Typical Source-Drain Diode Forward Voltage Operation in this Area Limited by RDS(on) 100 725 700 675 650 625 600 ID = 250 μA 575 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM Limited 0.1 μs 1 μs 10 μs 100 μs 10 ID, Drain Current (A) 10 Limited by RDS(on)* 1 1 ms 0.1 10 ms TC = 25 °C TJ = 150 °C Single Pulse BVDSS Limited 0.01 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S17-1307-Rev. C, 21-Aug-17 Document Number: 91649 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA18N60E www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 10 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS QGD VG 10 % VGS td(on) td(off) tf tr Charge Fig. 17 - Basic Gate Charge Waveform Fig. 14 - Switching Time Waveforms Current regulator Same type as D.U.T. L VDS Vary tp to obtain required IAS 50 kΩ D.U.T. RG 12 V + - 0.2 µF 0.3 µF VDD + IAS D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S17-1307-Rev. C, 21-Aug-17 Document Number: 91649 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA18N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel           Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91649. S17-1307-Rev. C, 21-Aug-17 Document Number: 91649 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220 FULLPAK Thin Lead E ØP A A1 d2 d3 d1 D L1 b2 x 3 L bx3 c A2 e DIMENSIONS SYMBOL MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 4.30 4.70 0.169 0.185 A1 2.50 2.90 0.098 0.114 A2 2.40 2.80 0.094 0.110 b 0.60 0.80 0.024 0.031 b2 0.60 0.90 0.024 0.035 c - 0.60 - 0.024 D 8.30 8.70 0.327 0.342 d1 14.70 15.30 0.579 0.602 d2 2.90 3.10 0.114 0.122 d3 3.30 3.70 0.130 0.146 E 9.70 10.30 0.382 0.406 e 2.50 2.70 0.098 0.106 L 13.40 13.80 0.528 0.543 L1 1.00 2.80 0.039 0.110 ØP 3.00 3.40 0.118 0.134 ECN: E20-0684-Rev. D, 28-Dec-2020 DWG: 6021 Revision: 28-Dec-2020 Document Number: 62649 1 For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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