SIHA21N60EF-E3

SiHA21N60EF www.vishay.com Vishay Siliconix EF Series Power MOSFET with Fast Body Diode FEATURES D Thin-Lead TO-220 FULLPAK • Fast body diode MOSFET using E series technology • Reduced trr, Qrr, and IRRM • Low figure-of-merit (FOM): Ron x Qg • Low input capacitance (Ciss) Available • Increased robustness due to low Qrr • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 G GD S S N-Channel MOSFET APPLICATIONS PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) max. (Ω) at 25 °C • Telecommunications - Server and telecom power supplies • Lighting - High intensity discharge (HID) - Light emitting diodes (LEDs) • Consumer and computing - ATX power supplies • Industrial - Welding - Battery chargers • Renewable energy - Solar (PV inverters) • Switch mode power suppliers (SMPS) • Applications using the following topologies - LLC - Phase shifted bridge (ZVS) - 3-level inverter - AC/DC bridge 650 VGS = 10 V Qg max. (nC) 0.176 84 Qgs (nC) 14 Qgd (nC) 24 Configuration Single ORDERING INFORMATION Package Thin-Lead TO-220 FULLPAK Lead (Pb)-free SiHA21N60EF-E3 Lead (Pb)-free and halogen-free SiHA21N60EF-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS 600 Gate-source voltage VGS ± 30 Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM Linear derating factor Single pulse avalanche energy b EAS Maximum power dissipation Operating junction and storage temperature range Drain-source voltage slope TJ = 125 °C Reverse diode dV/dt d Soldering recommendations (peak temperature) c for 10 s Mounting torque M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 5.1 A c. 1.6 mm from case d. ISD ≤ ID, dI/dt = 900 A/μs, starting TJ = 25 °C S21-0257-Rev. F, 22-Mar-2021 UNIT V 9 5 A 53 0.28 W/°C 367 mJ PD 35 W TJ, Tstg -55 to +150 °C dV/dt 70 50 300 0.6 V/ns °C Nm Document Number: 91597 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA21N60EF www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 65 Maximum junction-to-case (drain) RthJC - 3.6 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) Gate-source leakage Zero gate voltage drain current Drain-source on-state resistance Forward transconductance VDS VGS = 0 V, ID = 250 μA 600 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V VGS = ± 20 V - - ± 100 nA μA IGSS IDSS RDS(on) gfs VGS = ± 30 V - - ±1 VDS = 480 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 500 - 0.153 0.176 Ω - 7 - S VGS = 10 V ID = 11 A VDS = 30 V, ID = 11 A μA Dynamic Input capacitance Ciss VGS = 0 V, - 2030 - Output capacitance Coss VDS = 100 V, - 105 - Reverse transfer capacitance Crss f = 1 MHz - 5 - Effective output capacitance, energy related a Co(er) - 86 - Effective output capacitance, time related b Co(tr) - 299 - Qg - 56 84 Total gate charge pF VGS = 0 V, VDS = 0 V to 480 V Gate-source charge Qgs Gate-drain charge Qgd Turn-on delay time td(on) Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg VGS = 10 V ID = 11 A, VDS = 480 V - 14 - - 24 - - 21 42 VDD = 480 V, ID = 11 A Rg = 9.1 Ω, VGS = 10 V - 31 62 - 59 89 - 27 54 f = 1 MHz, open drain 0.2 0.56 1.2 - - 21 - - 53 nC ns Ω Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 11 A, VGS = 0 V TJ = 25 °C, IF = IS = 11 A, dI/dt = 100 A/μs, VR = 400 V - 0.9 1.2 V - 135 270 ns - 0.76 1.52 μC - 11 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDS b. Coss(tr) is a fixed capacitance that gives the charging time as Coss while VDS is rising from 0 % to 80 % VDS S21-0257-Rev. F, 22-Mar-2021 Document Number: 91597 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA21N60EF www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3.0 60 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 45 TJ = 25 °C ID = 11 A RDS(on), Drain-to-Source On-Resistance (Normalized) 30 15 0 2.0 1.5 1.0 VGS = 10 V 0.5 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) -60 -40 -20 30 Fig. 1 - Typical Output Characteristics, TJ = 25 °C 10 000 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V TJ = 150 °C Ciss 1000 C, Capacitance (pF) 30 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 40 ID, Drain-to-Source Current (A) 2.5 20 10 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100 Coss 10 Crss 0 1 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 30 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TJ = 150 °C Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 60 14 12 45 10 TJ = 150 °C Coss (pF) ID, Drain-to-Source Current (A) 5000 TJ = 25 °C 30 8 Coss 500 Eoss 6 Eoss (μJ) ID, Drain-to-Source Current (A) TOP 4 15 VDS = 29.2 V 2 0 50 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S21-0257-Rev. F, 22-Mar-2021 25 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91597 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA21N60EF www.vishay.com Vishay Siliconix Axis Title VDS = 480 V VDS = 300 V VDS = 120 V 20 8 12 8 4 100 2 4 10 0 0 30 60 90 Qg, Total Gate Charge (nC) 25 120 50 75 100 125 150 TC - Case Temperature (°C) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature 100 750 VDS, Drain-to-Source Breakdown Voltage (V) ISD, Reverse Drain Current (A) 1000 6 1st line 2nd line 16 0 TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VSD, Source-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage Operation in this Area Limited by RDS(on) 100 ID, Drain Current (A) 10000 10 2nd line ID - Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 725 700 675 650 625 600 575 ID = 250 μA 550 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature IDM Limited 10 100 μs Limited by RDS(on)* 1 1 ms 0.1 10 ms TC = 25 °C TJ = 150 °C Single Pulse BVDSS Limited 0.01 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S21-0257-Rev. F, 22-Mar-2021 Document Number: 91597 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA21N60EF www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.0001 Single Pulse 0.001 0.01 Pulse Time (s) 0.1 1 Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS 10 % VGS QGD VG td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ 12 V D.U.T RG - IAS 10 V tp + 0.01 Ω 0.2 µF 0.3 µF V DD + D.U.T. - VDS VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S21-0257-Rev. F, 22-Mar-2021 Document Number: 91597 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA21N60EF www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91597. S21-0257-Rev. F, 22-Mar-2021 Document Number: 91597 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220 FULLPAK Thin Lead E ØP A A1 d2 d3 d1 D L1 b2 x 3 L bx3 c A2 e DIMENSIONS SYMBOL MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 4.30 4.70 0.169 0.185 A1 2.50 2.90 0.098 0.114 A2 2.40 2.80 0.094 0.110 b 0.60 0.80 0.024 0.031 b2 0.60 0.90 0.024 0.035 c - 0.60 - 0.024 D 8.30 8.70 0.327 0.342 d1 14.70 15.30 0.579 0.602 d2 2.90 3.10 0.114 0.122 d3 3.30 3.70 0.130 0.146 E 9.70 10.30 0.382 0.406 e 2.50 2.70 0.098 0.106 L 13.40 13.80 0.528 0.543 L1 1.00 2.80 0.039 0.110 ØP 3.00 3.40 0.118 0.134 ECN: E20-0684-Rev. D, 28-Dec-2020 DWG: 6021 Revision: 28-Dec-2020 Document Number: 62649 1 For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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