SiHA690N60E
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Vishay Siliconix
E Series Power MOSFET
FEATURES
D
Thin-Lead TO-220 FULLPAK
• 4th generation E series technology
• Low figure-of-merit (FOM) Ron x Qg
• Low effective capacitance (Co(er))
• Reduced switching and conduction losses
G
• Avalanche energy rated (UIS)
GD
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
S
S
N-Channel MOSFET
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Solar (PV inverters)
PRODUCT SUMMARY
VDS (V) at TJ max.
RDS(on) typ. () at 25 °C
650
VGS = 10 V
Qg max. (nC)
0.60
12
Qgs (nC)
3
Qgd (nC)
3
Configuration
Single
ORDERING INFORMATION
Package
Thin-Lead TO-220 FULLPAK
Lead (Pb)-free and halogen-free
SiHA690N60E-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
600
Gate-source voltage
VGS
± 30
Continuous drain current (TJ = 150 °C) e
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
Linear derating factor
UNIT
V
4.3
2.7
A
11
0.23
W/°C
Single pulse avalanche energy b
EAS
9
mJ
Maximum power dissipation
PD
29
W
TJ, Tstg
-55 to +150
°C
Operating junction and storage temperature range
Drain-source voltage slope
TJ = 125 °C
Reverse diode dv/dt d
Soldering recommendations (peak temperature) c
For 10 s
Mounting torque, M3 screw
dv/dt
70
17
V/ns
260
°C
0.6
Nm
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 0.8 A
c. 1.6 mm from case
d. ISD ID, di/dt = 100 A/μs, starting TJ = 25 °C
e. Limited by maximum junction temperature
S19-0493-Rev. A, 17-Jun-2019
Document Number: 92275
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHA690N60E
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
65
Maximum junction-to-case (drain)
RthJC
-
4.3
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage (N)
Gate-source leakage
Zero gate voltage drain current
VDS
VGS = 0 V, ID = 250 μA
600
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.73
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
3.0
-
5.0
V
VGS = ± 20 V
-
-
± 100
nA
VGS = ± 30 V
-
-
±1
μA
VDS = 600 V, VGS = 0 V
-
-
1
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
10
IGSS
IDSS
μA
-
0.60
0.70
gfs
VDS = 20 V, ID = 2.0 A
-
1.2
-
S
Input capacitance
Ciss
-
347
-
Output capacitance
Coss
-
24
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 100 V,
f = 1 MHz
-
4
-
Effective output capacitance, energy
related a
Co(er)
-
17
-
Effective output capacitance, time
related b
Co(tr)
-
86
-
-
8
12
-
3
-
-
3
-
Drain-source on-state resistance
Forward transconductance a
RDS(on)
VGS = 10 V
ID = 2.0 A
Dynamic
pF
VDS = 0 V to 480 V, VGS = 0 V
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Rise time
Turn-off delay time
tr
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
ID = 2.0 A, VDS = 480 V
-
12
24
VDD = 480 V, ID = 2.0 A,
VGS = 10 V, Rg = 9.1
-
9
18
-
19
38
-
22
44
f = 1 MHz, open drain
1.1
2.3
4.6
-
-
6.4
nC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current
ISM
Diode forward voltage
VSD
Reverse recovery time
trr
Reverse recovery charge
Qrr
Reverse recovery current
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 2.0 A, VGS = 0 V
TJ = 25 °C, IF = IS = 2.0 A,
di/dt = 100 A/μs, VR = 25 V
S
-
-
11
-
-
1.2
-
146
292
ns
-
1.0
2.0
μC
-
13
-
A
V
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
S19-0493-Rev. A, 17-Jun-2019
Document Number: 92275
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHA690N60E
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
Axis Title
1000
9V
6
100
8V
3
7V
6V
5V
0
0
5
10
15
ID = 2 A
2.5
1000
2.0
1.5
VGS = 10 V
100
1.0
0.5
10
0
10
20
-60 -40 -20 0
20 40 60 80 100 120 140 160
VDS - Drain-to-Source Voltage (V)
TJ - Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Axis Title
10000
TJ = 150 °C
1000
1st line
2nd line
8V
4
7V
100
2
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds shorted
Crss = Cgd
Coss = Cds + Cgd
1000
1000
Ciss
1st line
2nd line
6
Axis Title
10 000
10000
15 V
14 V
13 V
12 V
11 V
10 V
2nd line
C - Capacitance (pF)
8
2nd line
ID - Drain-to-Source Current (A)
1st line
2nd line
9
RDS(on) - Drain-to-Source On-Resistance
(Normalized)
TJ = 25 °C
15 V
14 V
13 V
12 V
11 V
10 V
10000
3.0
10000
1st line
2nd line
2nd line
ID - Drain-to-Source Current (A)
12
100
100
Coss
10
6V
Crss
5V
10
0
5
10
15
10
1
20
0
100
200
300
400
500
600
VDS - Drain-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Axis Title
Axis Title
12
4
10 000
10000
1000
TJ = 150 °C
6
100
3
2nd line
Coss - Output Capacitance (pF)
9
1st line
2nd line
2nd line
ID - Drain-to-Source Current (A)
TJ = 25 °C
3
1000
Coss
Eoss
2
100
1
VDS = 23.7 V
10
0
0
5
10
15
20
10
0
0
100
200
300
400
500
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Coss and Eoss vs. VDS
S19-0493-Rev. A, 17-Jun-2019
Eoss - Output Capacitance Stored Energy (µJ)
2nd line
0
600
Document Number: 92275
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHA690N60E
www.vishay.com
Vishay Siliconix
Axis Title
Axis Title
VDS = 480 V
VDS = 300 V
VDS = 120 V
4
6
100
3
1000
3
1st line
2nd line
1000
2nd line
ID - Drain Current (A)
9
10000
5
10000
1st line
2nd line
2nd line
VGS - Gate-to-Source Voltage (V)
12
2
100
1
0
2
4
6
10
0
10
0
8
25
50
75
100
125
150
Qg - Total Gate Charge (nC)
TC - Case Temperature (°C)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 - Maximum Drain Current vs. Case Temperature
Axis Title
1000
1
TJ = 25 °C
100
0.1
VGS = 0 V
10
0.01
0.2
0.4
0.6
0.8
1.0
1.2
1.4
10000
775
750
725
1000
1st line
2nd line
TJ = 150 °C
1st line
2nd line
2nd line
ISD - Reverse Drain Current (A)
10
2nd line
VDS - Drain-to-Source Breakdown Voltage (V)
Axis Title
10000
700
675
100
650
625
ID = 250 µA
10
600
-60 -40 -20 0
20 40 60 80 100 120 140 160
VSD - Source-Drain Voltage (V)
TJ - Junction Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 11 - Temperature vs. Drain-to-Source Voltage
Axis Title
100
10000
IDM limited
10
1000
1
100 µs
Limited by RDS(on) a
1st line
2nd line
2nd line
ID - Drain Current (A)
Operation in this area
limited by RDS(on)
100
0.1
1 ms
TC = 25 °C,
TJ = 150 °C,
single pulse
10 ms
BVDSS limited
0.01
1
10
100
10
1000
VDS - Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
Note
a. VGS > minimum VGS at which RDS(on) is specified
S19-0493-Rev. A, 17-Jun-2019
Document Number: 92275
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHA690N60E
www.vishay.com
Vishay Siliconix
Axis Title
10000
Duty cycle = 0.5
1000
1st line
2nd line
Normalized Effective Transient
Thermal Impedance
1
0.2
100
0.1
0.02
0.05
Single pulse
0.1
0.0001
10
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
VDS
Qg
10 V
90 %
Qgs
10 %
VGS
Qgd
VG
td(on)
td(off)
tr
tf
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
L
VDS
Vary tp to obtain
required IAS
50 kΩ
D.U.T.
Rg
+
- VDD
12 V
0.2 μF
0.3 μF
+
IAS
D.U.T.
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S19-0493-Rev. A, 17-Jun-2019
Document Number: 92275
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHA690N60E
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
Rg
•
•
•
•
1 Driver gate drive
Period
P.W.
+
V
- DD
dv/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D=
P.W.
Period
V GS = 10 V a
2
D.U.T. ISD waveform
Reverse
recovery
current
3 D.U.T. VDS
Body diode forward
current
di/dt
waveform
Diode recovery
dv/dt
Re-applied
voltage
V DD
Body diode forward drop
4 Inductor current
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92275.
S19-0493-Rev. A, 17-Jun-2019
Document Number: 92275
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-220 FULLPAK Thin Lead
E
ØP
A
A1
d2
d3
d1
D
L1
b2 x 3
L
bx3
c
A2
e
DIMENSIONS
SYMBOL
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.30
4.70
0.169
0.185
A1
2.50
2.90
0.098
0.114
A2
2.40
2.80
0.094
0.110
b
0.60
0.80
0.024
0.031
b2
0.60
0.90
0.024
0.035
c
-
0.60
-
0.024
D
8.30
8.70
0.327
0.342
d1
14.70
15.30
0.579
0.602
d2
2.90
3.10
0.114
0.122
d3
3.30
3.70
0.130
0.146
E
9.70
10.30
0.382
0.406
e
2.50
2.70
0.098
0.106
L
13.40
13.80
0.528
0.543
L1
1.00
2.80
0.039
0.110
ØP
3.00
3.40
0.118
0.134
ECN: E20-0684-Rev. D, 28-Dec-2020
DWG: 6021
Revision: 28-Dec-2020
Document Number: 62649
1
For technical questions, contact:
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Disclaimer
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Revision: 01-Jan-2023
1
Document Number: 91000