SiHG105N60EF
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Vishay Siliconix
EF Series Power MOSFET With Fast Body Diode
FEATURES
D
TO-247AC
• 4th generation E series technology
• Low figure-of-merit (FOM) Ron x Qg
• Low effective capacitance (Co(er))
• Reduced switching and conduction losses
G
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
S
S
D
G
N-Channel MOSFET
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Solar (PV inverters)
PRODUCT SUMMARY
VDS (V) at TJ max.
RDS(on) typ. () at 25 °C
650
VGS = 10 V
Qg max. (nC)
0.088
53
Qgs (nC)
12
Qgd (nC)
11
Configuration
Single
ORDERING INFORMATION
Package
TO-247AC
Lead (Pb)-free and halogen-free
SiHG105N60EF-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
600
Gate-source voltage
VGS
± 30
Continuous drain current (TJ = 150 °C)
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
Linear derating factor
UNIT
V
29
19
A
73
1.67
W/°C
Single pulse avalanche energy b
EAS
226
mJ
Maximum power dissipation
PD
208
W
TJ, Tstg
-55 to +150
°C
Operating junction and storage temperature range
Drain-source voltage slope
TJ = 125 °C
Reverse diode dv/dt d
Soldering recommendations (peak temperature) c
For 10 s
dv/dt
70
50
260
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 4 A
c. 1.6 mm from case
d. ISD ID, di/dt = 400 A/μs, starting TJ = 25 °C
S19-1042-Rev. A, 09-Dec-2019
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Maximum junction-to-case (drain)
RthJC
-
0.6
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage (N)
VDS
VGS = 0 V, ID = 250 μA
600
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.63
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
3
-
5
V
VGS = ± 20 V
-
-
± 100
nA
VGS = ± 30 V
-
-
±1
μA
Gate-source leakage
IGSS
Zero gate voltage drain current
IDSS
VDS = 480 V, VGS = 0 V
-
-
1
μA
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
2
mA
-
0.088
0.102
gfs
VDS = 20 V, ID = 13 A
-
8
-
S
Input capacitance
Ciss
1804
-
Coss
-
82
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 100 V,
f = 1 MHz
-
Output capacitance
-
6
-
Effective output capacitance, energy
related a
Co(er)
-
63
-
Effective output capacitance, time
related b
Co(tr)
-
407
-
Drain-source on-state resistance
Forward transconductance a
RDS(on)
VGS = 10 V
ID = 13 A
Dynamic
pF
VDS = 0 V to 480 V, VGS = 0 V
Total gate charge
Qg
Gate-source charge
Qgs
VGS = 10 V
ID = 11 A, VDS = 480 V
-
35
53
-
12
-
Gate-drain charge
Qgd
-
11
-
Turn-on delay time
td(on)
-
20
40
VDD = 480 V, ID = 13 A,
VGS = 10 V, Rg = 9.1
-
28
56
-
39
78
-
19
38
f = 1 MHz, open drain
0.3
0.7
1.4
-
-
29
-
-
73
Rise time
Turn-off delay time
tr
td(off)
Fall time
tf
Gate input resistance
Rg
nC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current
ISM
Diode forward voltage
VSD
Reverse recovery time
trr
Reverse recovery charge
Qrr
Reverse recovery current
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 13 A, VGS = 0 V
TJ = 25 °C, IF = IS = 13 A,
di/dt = 100 A/μs, VR = 400 V
S
-
-
1.2
V
-
125
250
ns
-
0.8
1.6
μC
-
12
-
A
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
S19-1042-Rev. A, 09-Dec-2019
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
1000
7V
30
100
15
6V
5V
0
5
10
15
10
1000
2.0
1.5
VGS = 10 V
100
1.0
0.5
10
0
20
-60 -40 -20 0
20 40 60 80 100 120 140 160
VDS - Drain-to-Source Voltage (V)
TJ - Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Axis Title
Axis Title
10000
15 V
14 V
13 V
12 V
11 V
10 V
9V
30
TJ = 150 °C
10 000
7V
1000
6V
20
100
2nd line
C - Capacitance (pF)
40
10000
100 000
1st line
2nd line
2nd line
ID - Drain-to-Source Current (A)
50
10
Ciss
1000
1000
100
Coss
100
10
Crss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds shorted
Crss = Cgd
Coss = Cds + Cgd
1
5V
10
0
0
5
10
15
10
0.1
0
20
100
200
300
400
500
600
VDS - Drain-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Axis Title
Axis Title
TJ = 25 °C
60
45
1st line
2nd line
1000
TJ = 150 °C
30
100
15
2nd line
Coss - Output Capacitance (pF)
100 000
10000
75
2nd line
ID - Drain-to-Source Current (A)
1st line
2nd line
0
2.5
1st line
2nd line
8V
ID = 13 A
20
10 000
15
Coss
1000
Eoss
10
100
5
VDS = 27 V
10
0
0
5
10
15
20
10
0
0
100
200
300
400
500
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Coss and Eoss vs. VDS
S19-1042-Rev. A, 09-Dec-2019
Eoss - Output Capacitance Stored Energy (µJ)
2nd line
45
10000
3.0
RDS(on) - Drain-to-Source On-Resistance
(Normalized)
TJ = 25 °C
15 V
14 V
13 V
12 V
11 V
10 V
9V
60
Axis Title
10000
1st line
2nd line
2nd line
ID - Drain-to-Source Current (A)
75
600
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Axis Title
Axis Title
10000
10000
30
VDS = 480 V
VDS = 300 V
VDS = 120 V
6
100
3
1000
18
1st line
2nd line
1000
2nd line
ID - Drain Current (A)
24
9
1st line
2nd line
2nd line
VGS - Gate-to-Source Voltage (V)
12
12
100
6
0
10
20
30
10
0
10
0
40
25
50
75
100
125
150
Qg - Total Gate Charge (nC)
TC - Case Temperature (°C)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 - Maximum Drain Current vs. Case Temperature
Axis Title
TJ = 25 °C
100
1
VGS = 0 V
10
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
10000
900
875
850
1000
825
1st line
2nd line
1000
1st line
2nd line
2nd line
ISD - Reverse Drain Current (A)
TJ = 150 °C
10
2nd line
VDS - Drain-to-Source Breakdown Voltage (V)
Axis Title
10000
100
800
775
100
750
725
ID = 1 mA
10
700
-60 -40 -20 0
20 40 60 80 100 120 140 160
VSD - Source-Drain Voltage (V)
TJ - Junction Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 11 - Temperature vs. Drain-to-Source Voltage
Axis Title
10000
1000
Operation in this area
limited by RDS(on)
IDM limited
1000
Limited by RDS(on) a
10
100 µs
1
1st line
2nd line
2nd line
ID - Drain Current (A)
100
100
1 ms
0.1
TC = 25 °C,
TJ = 150 °C,
single pulse
10 ms
BVDSS limited
0.01
1
10
100
10
1000
VDS - Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
Note
a. VGS > minimum VGS at which RDS(on) is specified
S19-1042-Rev. A, 09-Dec-2019
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Axis Title
1
10000
0.2
1000
1st line
2nd line
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.1
0.1
0.05
100
0.02
Single pulse
10
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS
Fig. 16 - Unclamped Inductive Waveforms
Fig. 13 - Switching Time Test Circuit
VDS
Qg
10 V
90 %
Qgs
10 %
VGS
Qgd
VG
td(on)
td(off)
tr
tf
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
L
VDS
Vary tp to obtain
required IAS
50 kΩ
D.U.T.
Rg
12 V
0.2 μF
+
- VDD
0.3 μF
+
IAS
D.U.T.
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S19-1042-Rev. A, 09-Dec-2019
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Peak Diode Recovery dv/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
Rg
•
•
•
•
1 Driver gate drive
Period
P.W.
+
V
- DD
dv/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D=
P.W.
Period
V GS = 10 V a
2
D.U.T. ISD waveform
Reverse
recovery
current
3 D.U.T. VDS
Body diode forward
current
di/dt
waveform
Diode recovery
dv/dt
Re-applied
voltage
V DD
Body diode forward drop
4 Inductor current
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92300.
S19-1042-Rev. A, 09-Dec-2019
Document Number: 92300
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Package Information
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Vishay Siliconix
TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9
MILLIMETERS
DIM.
MIN.
MAX.
A
4.83
A1
2.29
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
NOTES
5.21
D1
16.25
16.85
5
2.55
D2
0.56
0.76
A2
1.50
2.49
E
15.50
15.87
b
1.12
1.33
E1
13.46
14.16
5
b1
1.12
1.28
E2
4.52
5.49
3
b2
1.91
2.39
b3
1.91
2.34
b4
2.87
3.22
b5
2.87
3.18
c
0.55
0.69
c1
0.55
0.65
D
20.40
20.70
4
6
e
L
14.90
15.40
6, 8
L1
3.96
4.16
6
ØP
3.56
3.65
7
6
4
5.44 BSC
Ø P1
7.19 ref.
Q
5.31
5.69
S
5.54
5.74
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition
Revision: 19-Oct-2020
Document Number: 91360
1
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VERSION 2: FACILITY CODE = Y
A
A
4
E
B
3 R/2
E/2
7 ØP
Ø k M DBM
A2
S
(Datum B)
ØP1
A
D2
Q
4
4
2xR
(2)
D1
D
1
2
4
D
3
Thermal pad
5 L1
C
L
See view B
2 x b2
3xb
0.10 M C A M
4
E1
A
0.01 M D B M
View A - A
C
2x e
A1
b4
(b1, b3, b5)
Planting
Lead Assignments
1. Gate
2. Drain
3. Source
4. Drain
D DE
Base metal
E
C
(c)
C
c1
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS
DIM.
MIN.
MAX.
A
4.58
5.31
MILLIMETERS
NOTES
DIM.
MIN.
MAX.
D2
0.51
1.30
15.87
A1
2.21
2.59
E
15.29
A2
1.17
2.49
E1
13.72
b
0.99
1.40
e
5.46 BSC
b1
0.99
1.35
Øk
b2
1.53
2.39
L
14.20
16.25
b3
1.65
2.37
L1
3.71
4.29
b4
2.42
3.43
ØP
3.51
3.66
b5
2.59
3.38
Ø P1
-
7.39
c
0.38
0.86
Q
5.31
5.69
4.52
c1
0.38
0.76
R
D
19.71
20.82
S
D1
13.08
-
NOTES
0.254
5.49
5.51 BSC
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c
Revision: 19-Oct-2020
Document Number: 91360
2
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VERSION 3: FACILITY CODE = N
A
E
R/2
D2
B
A
P
A2
D1
L1
D
D
K M D BM
R
S
Q
N
P1
b2
L
C
e
b
b4
C
E1
A1
0.01 M D B M
0.10 M C A M
b1, b3, b5
c
c1
Base metal
Plating
b, b2, b4
MILLIMETERS
MILLIMETERS
DIM.
MIN.
MAX.
DIM.
MIN.
A
4.65
5.31
D2
0.51
MAX.
1.35
A1
2.21
2.59
E
15.29
15.87
13.46
A2
1.17
1.37
E1
b
0.99
1.40
e
-
b1
0.99
1.35
k
b2
1.65
2.39
L
14.20
b3
1.65
2.34
L1
3.71
b4
2.59
3.43
N
b5
2.59
3.38
P
3.56
c
0.38
0.89
P1
-
7.39
c1
0.38
0.84
Q
5.31
5.69
D
19.71
20.70
R
4.52
D1
13.08
-
S
5.46 BSC
0.254
16.10
4.29
7.62 BSC
3.66
5.49
5.51 BSC
ECN: E20-0545-Rev. F, 19-Oct-2020
DWG: 5971
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
Revision: 19-Oct-2020
Document Number: 91360
3
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Revision: 09-Jul-2021
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Document Number: 91000