SiHG73N60AEL
www.vishay.com
Vishay Siliconix
EL Series Power MOSFET
FEATURES
D
• Low figure-of-merit (FOM) Ron x Qg
TO-247AC
• Low input capacitance (Ciss)
• Reduced switching and conduction losses
• Ultra low gate charge (Qg)
G
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
S
D
S
G
N-Channel MOSFET
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Renewable energy
- Solar (PV inverters)
PRODUCT SUMMARY
VDS (V) at TJ max.
RDS(on) typ. (:) at 25 °C
650
VGS = 10 V
Qg max. (nC)
0.035
342
Qgs (nC)
34
Qgd (nC)
57
Configuration
Single
ORDERING INFORMATION
Package
TO-247AC
Lead (Pb)-free and halogen-free
SiHG73N60AEL-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
SYMBOL
VDS
VGS
Continuous drain current (TJ = 150 °C)
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
Linear derating factor
Single pulse avalanche energy b
Maximum power dissipation
Operating junction and storage temperature range
Reverse diode dv/dt d
Soldering recommendations (peak temperature) c
ID
IDM
EAS
PD
TJ, Tstg
dv/dt
For 10 s
LIMIT
600
± 30
69
44
206
4.2
1706
520
-55 to +150
3.2
UNIT
W/°C
mJ
W
°C
V/ns
260
°C
V
A
Notes
• Initial samples marked as SiHG73N60BE
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 120 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 :, IAS = 11 A
c. 1.6 mm from case
d. ISD d ID, di/dt = 60 A/μs, starting TJ = 25 °C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
40
Maximum junction-to-case (drain)
RthJC
-
0.24
S18-0173-Rev. A, 12-Feb-18
UNIT
°C/W
Document Number: 92068
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG73N60AEL
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold voltage (N)
Gate-source leakage
VGS = 0 V, ID = 250 μA
600
-
-
V
Reference to 25 °C, ID = 1 mA
-
0.46
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
VGS = ± 20 V
-
-
± 100
nA
μA
IGSS
Zero gate voltage drain current
Drain-source on-state resistance
Forward transconductance
VDS
'VDS/TJ
a
IDSS
RDS(on)
VGS = ± 30 V
-
-
±1
VDS = 600 V, VGS = 0 V
-
-
1
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
100
-
0.035
0.042
:
S
VGS = 10 V
ID = 36.5 A
gfs
VDS = 40 V, ID = 36.5 A
-
28
-
Input capacitance
Ciss
6709
-
Coss
-
282
-
Reverse transfer capacitance
Crss
VGS = 0 V,
VDS = 100 V,
f = 1 MHz
-
Output capacitance
-
7
-
Effective output capacitance, energy
related a
Co(er)
-
181
-
Effective output capacitance, time
related b
Co(tr)
-
888
-
-
171
342
-
34
-
μA
Dynamic
pF
VDS = 0 V to 480 V, VGS = 0 V
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
-
57
-
Turn-on delay time
td(on)
-
51
102
tr
VDD = 480 V, ID = 36.5 A,
VGS = 10 V, Rg = 10 :
-
80
160
-
244
488
-
104
208
f = 1 MHz, open drain
0.3
0.7
1.5
-
-
68
S
-
-
206
TJ = 25 °C, IS = 36.5 A, VGS = 0 V
-
-
1.2
V
-
479
958
ns
-
11
22
μC
-
42
-
A
Rise time
Turn-off delay time
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
ID = 36.5 A, VDS = 480 V
nC
ns
:
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current
ISM
Diode forward voltage
VSD
Reverse recovery time
trr
Reverse recovery charge
Qrr
Reverse recovery current
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IF = IS = 36.5 A,
di/dt = 100 A/μs, VR = 400 V
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
S18-0173-Rev. A, 12-Feb-18
Document Number: 92068
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG73N60AEL
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3.0
250
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
200
150
ID = 36.5 A
TJ = 25 °C
RDS(on), Drain-to-Source On-Resistance
(Normalized)
100
50
2.0
1.5
1.0
VGS = 10 V
0.5
0
0
0
5
10
15
VDS, Drain-to-Source Voltage (V)
-60 -40 -20
20
Fig. 1 - Typical Output Characteristics
0 20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
100 000
150
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
120
90
TJ = 150 °C
Ciss
10 000
C, Capacitance (pF)
ID, Drain-to-Source Current (A)
2.5
60
30
1000
Coss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds shorted
Crss = Cgd
Coss = Cds + Cgd
100
Crss
10
1
0
0.1
0
5
10
15
VDS, Drain-to-Source Voltage (V)
20
0
Fig. 2 - Typical Output Characteristics
100
200
300
400
500
VDS, Drain-to-Source Voltage (V)
600
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
40
250
150
TJ = 150 °C
100
35
5000
Coss, Output Capacitance (pF)
ID, Drain-to-Source Current (A)
TJ = 25 °C
200
50
30
25
Coss
Eoss
20
500
15
10
5
VDS = 18 V
50
0
0
5
10
15
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
S18-0173-Rev. A, 12-Feb-18
20
0
0
100
200
300
400
500
Eoss, Output Capacitance Stored Energy (μJ)
ID, Drain-to-Source Current (A)
TOP
600
VDS, Drain-to-Source Voltage (V)
Fig. 6 - Coss and Eoss vs. VDS
Document Number: 92068
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG73N60AEL
www.vishay.com
Vishay Siliconix
80
VDS = 480 V
VDS = 300 V
VDS = 120 V
60
9
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
12
6
3
40
20
0
0
0
50
100
150
Qg, Total Gate Charge (nC)
200
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
25
50
75
100
125
TC, Case Temperature (°C)
150
Fig. 10 - Maximum Drain Current vs. Case Temperature
TJ = 150 °C
100
ISD, Reverse Drain Current (A)
VDS, Drain-to-Source Breakdown Voltage (V)
800
10
TJ = 25 °C
1
VGS = 0 V
0.1
0.2
0.4
0.6
0.8
1.0
VSD, Source-Drain Voltage (V)
1.2
1.4
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Operation in this area
Limited by RDS(on)
775
750
725
700
675
650
625
ID = 10 mA
600
-60 -40 -20
0 20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 11 - Temperature vs. Drain-to-Source Voltage
IDM limited
ID, Drain Current (A)
100
10
Limited by RDS(on)*
100 μs
1 ms
1
10 ms
TC = 25 °C
TJ = 150 °C
single pulse
0.1
BVDSS limited
0.01
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Fig. 9 - Maximum Safe Operating Area
S18-0173-Rev. A, 12-Feb-18
Document Number: 92068
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG73N60AEL
www.vishay.com
Vishay Siliconix
1
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single pulse
0.01
0.0001
0.001
0.01
Pulse Time (s)
0.1
1
Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
VDS
Qg
10 V
90 %
Qgs
10 %
VGS
Qgd
VG
td(on)
td(off)
tr
tf
Charge
Fig. 17 - Basic Gate Charge Waveform
Fig. 14 - Switching Time Waveforms
Current regulator
Same type as D.U.T.
L
VDS
Vary tp to obtain
required IAS
50 kΩ
12 V
D.U.T.
Rg
0.2 μF
0.3 μF
+
- VDD
+
D.U.T.
IAS
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S18-0173-Rev. A, 12-Feb-18
Document Number: 92068
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG73N60AEL
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
Rg
•
•
•
•
1 Driver gate drive
Period
P.W.
+
V
- DD
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D=
P.W.
Period
V GS = 10 V a
2
D.U.T. ISD waveform
Reverse
recovery
current
3 D.U.T. VDS
Body diode forward
current
dI/dt
waveform
Diode recovery
dV/dt
Re-applied
voltage
V DD
Body diode forward drop
4 Inductor current
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92068.
S18-0173-Rev. A, 12-Feb-18
Document Number: 92068
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 08-Feb-17
1
Document Number: 91000
