SIHP12N65E-GE3

SiHP12N65E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • Low figure-of-merit (FOM) Ron x Qg 700 RDS(on) max. at 25 °C (Ω) VGS = 10 V Qg max. (nC) • • • • • 0.38 70 Qgs (nC) 9 Qgd (nC) 16 Configuration Single Low input capacitance (Ciss) Reduced switching and conduction losses Ultra low gate charge (Qg) Avalanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS TO-220AB D • • • • Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) G G D S S N-Channel MOSFET ORDERING INFORMATION Package TO-220AB Lead (Pb)-free and Halogen-free SiHP12N65E-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 650 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID UNIT V 12 8 A IDM 28 1.4 W/°C Single Pulse Avalanche Energy b EAS 226 mJ Maximum Power Dissipation PD 156 W TJ, Tstg -55 to +150 °C Linear Derating Factor Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak Temperature) c for 10 s dV/dt 37 28 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 4 A. c. 1.6 mm from case. d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C. S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP12N65E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 0.8 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) VDS VGS = 0 V, ID = 250 μA 650 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.78 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V Gate-Source Leakage IGSS Zero Gate Voltage Drain Current IDSS Drain-Source On-State Resistance Forward Transconductance RDS(on) VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 650 V, VGS = 0 V - - 1 VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 10 - 0.33 0.38 Ω - S VGS = 10 V ID = 6 A gfs VDS = 30 V, ID = 6 A - 3.5 Input Capacitance Ciss 1224 - Coss - 65 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance - 4 - Effective Output Capacitance, Energy Related a Co(er) - 50 - Effective Output Capacitance, Time Related b Co(tr) - 160 - - 35 70 - 9 - - 16 - μA Dynamic pF VDS = 0 V to 520 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) - 16 32 tr VDD = 520 V, ID = 6 A, VGS = 10 V, Rg = 9.1 Ω - 19 38 - 35 70 - 18 36 f = 1 MHz, open drain - 0.81 - - - 12 Rise Time Turn-Off Delay Time td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 6 A, VDS = 520 V nC ns Ω Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 6 A, VGS = 0 V TJ = 25 °C, IF = IS = 6 A, dI/dt = 100 A/μs, VR = 25 V S - - 28 - 1.0 1.2 V - 309 618 ns - 3.8 7.6 μC - 21 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP12N65E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 24 18 3 TJ = 25 °C ID = 6 A RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 30 12 6 2.5 2 1.5 1 0.5 0 - 60 - 40 - 20 0 0 0 5 20 25 30 TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 10 000 TJ = 150 °C Ciss 10 1000 ġ ġ ġ VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Coss 100 ġ ġ 5 Crss 10 ġ ġ 1 0 0 5 10 15 20 25 30 0 VDS, Drain-to-Source Voltage (V) 200 100 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 30 24 TJ = 25 °C 20 TJ = 150 °C 10 VDS = 30.8 V VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A) 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) TOP 15 15 Capacitance (pF) ID, Drain-to-Source Current (A) 20 10 VGS = 10 V VDS = 520 V VDS = 325 V VDS = 130 V 20 16 12 8 4 0 0 0 5 10 15 20 25 0 20 40 60 80 VGS, Gate-to-Source Voltage (V) Qg, Total Gate Charge (nC) Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP12N65E www.vishay.com Vishay Siliconix 15 TJ = 150 °C ID, Drain Current (A) ISD, Reverse Drain Current (A) 100 TJ = 25 °C 10 1 12 9 6 3 VGS = 0 V 0 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 25 1.6 VSD, Source-Drain Voltage (V) ID, Drain Current (A) Limited Sby RD (on)* 1 ms 10 ms 0.1 TC = 25 °C TJ = 150 °C Single Pulse 750 725 700 675 650 625 BVDSS Limited 600 - 60 - 40 - 20 0 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified ID = 250μA 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 8 - Maximum Safe Operating Area Normalized Effective Transient Thermal Impedance 150 775 100 μs 0.01 1 125 800 IDM = Limited 10 1 100 Fig. 9 - Maximum Drain Current vs. Case Temperature VDS, Drain-to-Source Breakdown Voltage (V) Operation in this Area Limited by RDS(on) 75 TC, Case Temperature (°C) Fig. 7 - Typical Source-Drain Diode Forward Voltage 100 50 Fig. 10 - Temperature vs. Drain-to-Source Voltage 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP12N65E www.vishay.com Vishay Siliconix RD VDS QG 10 V VGS D.U.T. RG QGS + - VDD QGD VG 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Charge Fig. 12 - Switching Time Test Circuit Fig. 16 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. VDS 90 % 50 kΩ 12 V 0.2 µF 0.3 µF + 10 % VGS D.U.T. td(on) td(off) tf tr - VDS VGS 3 mA Fig. 13 - Switching Time Waveforms IG ID Current sampling resistors L Vary tp to obtain required IAS Fig. 17 - Gate Charge Test Circuit VDS D.U.T RG + - IAS V DD 10 V 0.01 Ω tp Fig. 14 - Unclamped Inductive Test Circuit VDS tp VDD VDS IAS Fig. 15 - Unclamped Inductive Waveforms S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP12N65E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 18 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91554. S15-0399-Rev. D, 16-Mar-15 Document Number: 91554 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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