SIHP23N60E-BE3

SiHP23N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES D • Low figure-of-merit (FOM) Ron x Qg TO-220AB • Low input capacitance (Ciss) • Reduced switching and conduction losses G • Ultra low gate charge (Qg) Available • Avalanche energy rated (UIS) G D S • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 S N-Channel MOSFET APPLICATIONS • • • • Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) PRODUCT SUMMARY VDS (V) at TJ max. 650 RDS(on) max. at 25 °C () VGS = 10 V Qg max. (nC) 0.158 95 Qgs (nC) 16 Qgd (nC) 25 Configuration Single ORDERING INFORMATION Package TO-220AB SiHP23N60E-BE3 a Lead (Pb)-free and halogen-free SiHP23N60E-GE3 Note a. “-BE3” denotes alternate manufacturing location ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS 600 Gate-source voltage VGS ± 30 Continuous drain current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed drain current a ID IDM Linear derating factor Single pulse avalanche energy b Maximum power dissipation Operating junction and storage temperature range Drain-source voltage slope TJ = 125 °C Reverse diode dV/dt d Soldering recommendations (peak temperature) c For 10 s UNIT V 23 15 A 63 1.8 W/°C EAS 353 mJ PD 227 W TJ, Tstg -55 to +150 °C dV/dt 37 34 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 5 A c. 1.6 mm from case d. ISD  ID, dI/dt = 100 A/μs, starting TJ = 25 °C S22-0948-Rev. E, 21-Nov-2022 Document Number: 91551 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP23N60E www.vishay.com Vishay Siliconix THERMAL RESISTACNE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 62 Maximum junction-to-case (drain) RthJC - 0.55 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold Voltage (N) VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.72 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 Gate-source leakage IGSS Zero gate voltage drain current IDSS μA - 0.132 0.158  gfs VDS = 30 V, ID = 12 A - 6.4 - S Input capacitance Ciss 2418 - Coss - 119 - Reverse transfer capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output capacitance - 4 - Effective output capacitance, energy related a Co(er) - 107 - Effective output capacitance, time  related b Co(tr) - 320 - - 63 95 - 16 - Drain-source on-state resistance Forward transconductance RDS(on) VGS = 10 V ID = 12 A Dynamic pF VDS = 0 V to 480 V, VGS = 0 V Total gate charge Qg Gate-source charge Qgs VGS = 10 V ID = 12 A, VDS = 480 V Gate-drain charge Qgd - 25 - Turn-on delay time td(on) - 22 44 Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg VDD = 480 V, ID = 12 A, VGS = 10 V, Rg = 9.1  - 38 76 - 66 99 - 34 68 f = 1 MHz, open drain - 0.73 - - - 23 - - 63 nC ns  Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the  integral reverse p - n junction diode D A G TJ = 25 °C, IS = 12 A, VGS = 0 V TJ = 25 °C, IF = IS = 12 A, dI/dt = 100 A/μs, VR = 25 V S - 0.9 1.2 V - 384 768 ns - 6.4 12.8 μC - 30 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS S22-0948-Rev. E, 21-Nov-2022 Document Number: 91551 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP23N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 60 10 V 9V 8V 7V 3 TJ = 25 °C ID = 12 A RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 80 40 20 6V 2.5 2 1.5 VGS = 10 V 1 0.5 5V 0 0 5 15 20 25 0 - 60 - 40 - 20 0 30 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 10 000 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 30 20 Ciss TJ = 150 °C ġ Capacitance (pF) 40 6V 1000 Coss 100 ġ ġ Crss 10 10 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd ġ 5V 1 0 0 10 5 20 15 25 0 30 VDS, Drain-to-Source Voltage (V) 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 16 14 5000 12 60 10 Coss (pF) ID, Drain-to-Source Current (A) 80 40 TJ = 150 °C Coss Eoss 8 500 Eoss (μJ) ID, Drain-to-Source Current (A) 10 6 20 4 TJ = 25 °C 2 VDS = 29.6 V 0 0 5 10 15 20 25 50 0 VGS, Gate-to-Source Voltage (V) 300 VDS Fig. 3 - Typical Transfer Characteristics Fig. 6 - Coss and Eoss vs. VDS S22-0948-Rev. E, 21-Nov-2022 0 100 200 400 500 600 Document Number: 91551 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP23N60E www.vishay.com Vishay Siliconix 25 VDS = 480 V VDS = 300 V VDS = 120 V 20 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 4 0 20 15 10 5 0 0 60 30 90 120 150 25 Qg, Total Gate Charge (nC) 100 125 150 Fig. 10 - Maximum Drain Current vs. Case Temperature 750 100 ID = 250 μA 725 VDS, Drain-to-Source Breakdown Voltage (V) ISD, Reverse Drain Current (A) 75 TJ, Case Temperature (°C) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage TJ = 150 °C TJ = 25 °C 10 1 700 675 650 625 600 575 VGS = 0 V 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD, Source-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage 100 Fig. 11 - Temperature vs. Drain-to-Source Voltage 1 ms Operation in this Area Limited by RDS(on) 10 ms 0.1 TC = 25 °C TJ = 150 °C Single Pulse 0.01 1 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) 100 μs Limited by RDS(on)* 1 550 - 60 - 40 - 20 0 IDM = Limited 10 ID, Drain Current (A) 50 BVDSS Limited 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S22-0948-Rev. E, 21-Nov-2022 Document Number: 91551 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP23N60E www.vishay.com Vishay Siliconix Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS QGD VG 10 % VGS td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ D.U.T RG 12 V + - IAS 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S22-0948-Rev. E, 21-Nov-2022 Document Number: 91551 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP23N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel           Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91551. S22-0948-Rev. E, 21-Nov-2022 Document Number: 91551 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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