SiHP6N80E
www.vishay.com
Vishay Siliconix
E Series Power MOSFET
FEATURES
D
• Low figure-of-merit (FOM) Ron x Qg
TO-220AB
• Low input capacitance (Ciss)
• Reduced switching and conduction losses
• Ultra low gate charge (Qg)
Available
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
G
G
D
S
S
N-Channel MOSFET
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
- Welding
- Induction heating
- Motor drives
- Battery chargers
- Renewable energy
- Solar (PV inverters)
PRODUCT SUMMARY
VDS (V) at TJ max.
RDS(on) typ. (Ω) at 25 °C
850
VGS = 10 V
Qg max. (nC)
0.82
44
Qgs (nC)
5
Qgd (nC)
8
Configuration
Single
ORDERING INFORMATION
Package
TO-220AB
SiHP6N80E-BE3
Lead (Pb)-free and halogen-free
SiHP6N80E-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
800
Gate-source voltage
VGS
± 30
Continuous drain current (TJ = 150 °C)
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed drain current a
ID
IDM
Linear derating factor
UNIT
V
5.4
3.4
A
15
0.63
W/°C
Single pulse avalanche energy b
EAS
95
mJ
Maximum power dissipation
PD
78
W
TJ, Tstg
-55 to +150
°C
Operating junction and storage temperature range
Drain-source voltage slope
TJ = 125 °C
Reverse diode dv/dt d
Soldering recommendations (peak temperature) c
For 10 s
dv/dt
70
0.25
300
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 2.6 A
c. 1.6 mm from case
d. ISD ≤ ID, di/dt = 100 A/μs, starting TJ = 25 °C
S21-1110-Rev. B, 15-Nov-2021
Document Number: 92009
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHP6N80E
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Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
62
Maximum junction-to-case (drain)
RthJC
-
1.6
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
Gate-source threshold Voltage (N)
Gate-source leakage
Zero gate voltage drain current
VDS
VGS = 0 V, ID = 250 μA
800
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
1.1
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
VGS = ± 20 V
-
-
± 100
nA
VGS = ± 30 V
-
-
±1
μA
VDS = 800 V, VGS = 0 V
-
-
1
VDS = 640 V, VGS = 0 V, TJ = 125 °C
-
-
10
IGSS
IDSS
μA
-
0.82
0.94
Ω
gfs
VDS = 30 V, ID = 3 A
-
2.5
-
S
Input capacitance
Ciss
VGS = 0 V,
VDS = 100 V,
f = 1 MHz
-
827
-
-
37
-
-
5
-
-
24
-
-
109
-
Drain-source on-state resistance
Forward transconductance
RDS(on)
VGS = 10 V
ID = 3 A
Dynamic
Output capacitance
Coss
Reverse transfer capacitance
Crss
Effective output capacitance, energy
related a
Co(er)
Effective output capacitance, time
related b
Co(tr)
pF
VDS = 0 V to 480 V, VGS = 0 V
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Turn-on delay time
Rise time
Turn-off delay time
-
22
44
-
5
-
-
8
-
td(on)
-
13
26
tr
-
9
18
-
27
54
td(off)
Fall time
tf
Gate input resistance
Rg
VGS = 10 V
ID = 3 A, VDS = 480 V
VDD = 480 V, ID = 3 A,
VGS = 10 V, Rg = 9.1 Ω
f = 1 MHz, open drain
-
18
36
0.5
1.0
2.0
-
-
5.4
nC
ns
Ω
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current
ISM
Diode forward voltage
VSD
Reverse recovery time
trr
Reverse recovery charge
Qrr
Reverse recovery current
IRRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 3 A, VGS = 0 V
TJ = 25 °C, IF = IS = 3 A,
di/dt = 100 A/μs, VR = 25 V
S
-
-
15
-
-
1.2
-
282
564
ns
-
2.0
4.0
μC
-
11
-
A
V
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 V to 480 V VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 V to 480 V VDSS
S21-1110-Rev. B, 15-Nov-2021
Document Number: 92009
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHP6N80E
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
15
3.0
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
12
9
ID = 3 A
TJ = 25 °C
RDS(on), Drain-to-Source On-Resistance
(Normalized)
6
3
2.0
1.5
1.0
VGS = 10 V
0.5
0
0
0
5
10
15
VDS, Drain-to-Source Voltage (V)
20
-60 -40 -20
8
10 000
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TJ = 150 °C
Ciss
1000
C, Capacitance (pF)
6
0 20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 1 - Typical Output Characteristics
ID, Drain-to-Source Current (A)
2.5
4
2
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds shorted
Crss = Cgd
Coss = Cds + Cgd
100
Coss
Crss
10
0
1
0
5
10
15
VDS, Drain-to-Source Voltage (V)
20
0
100
200
300
400
500
VDS, Drain-to-Source Voltage (V)
600
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 2 - Typical Output Characteristics
10 000
20
5.0
Coss, Output Capacitance (pF)
ID, Drain-to-Source Current (A)
4.5
TJ = 25 °C
15
10
TJ = 150 °C
5
4.0
3.5
1000
3.0
Coss
Eoss
2.5
2.0
100
1.5
1.0
0.5
VDS = 31 V
0
0
5
10
15
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
S21-1110-Rev. B, 15-Nov-2021
20
Eoss, Output Capacitance Stored Energy (μJ)
ID, Drain-to-Source Current (A)
TOP
0
10
0
100
200
300
400
500
VDS, Drain-to-Source Voltage (V)
600
Fig. 6 - Coss and Eoss vs. VDS
Document Number: 92009
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHP6N80E
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Vishay Siliconix
6
VDS = 480 V
VDS = 300 V
VDS = 120 V
5
9
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
12
6
4
3
2
3
1
0
0
0
6
12
18
Qg, Total Gate Charge (nC)
24
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
25
50
75
100
125
TC, Case Temperature (°C)
150
Fig. 10 - Maximum Drain Current vs. Case Temperature
VDS, Drain-to-Source Breakdown Voltage (V)
1050
ISD, Reverse Drain Current (A)
10
TJ = 150 °C
TJ = 25 °C
1
VGS = 0 V
0.1
0.0
0.3
0.6
0.9
1.2
VSD, Source-Drain Voltage (V)
1.5
Fig. 8 - Typical Source-Drain Diode Forward Voltage
1025
1000
975
950
925
900
875
850
825
800
ID = 250 μA
775
-60 -40 -20
0 20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 11 - Temperature vs. Drain-to-Source Voltage
100
Operation in this area
limited by RDS(on)
IDM limited
ID, Drain Current (A)
10
100 μs
1
Limited by RDS(on)*
1 ms
0.1
TC = 25 °C
TJ = 150 °C
single pulse
10 ms
BVDSS limited
0.01
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Fig. 9 - Maximum Safe Operating Area
S21-1110-Rev. B, 15-Nov-2021
Document Number: 92009
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHP6N80E
www.vishay.com
Vishay Siliconix
1
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single pulse
0.01
0.0001
0.001
0.01
Pulse Time (s)
0.1
1
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
VDS
Qg
10 V
90 %
Qgs
10 %
VGS
Qgd
VG
td(on)
td(off)
tr
tf
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
L
VDS
Vary tp to obtain
required IAS
50 kΩ
D.U.T.
Rg
12 V
0.2 μF
0.3 μF
+
- VDD
+
D.U.T.
IAS
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S21-1110-Rev. B, 15-Nov-2021
Document Number: 92009
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHP6N80E
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
Rg
•
•
•
•
1 Driver gate drive
Period
P.W.
+
V
- DD
dv/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D=
P.W.
Period
V GS = 10 V a
2
D.U.T. ISD waveform
Reverse
recovery
current
3 D.U.T. VDS
Body diode forward
current
di/dt
waveform
Diode recovery
dv/dt
Re-applied
voltage
V DD
Body diode forward drop
4 Inductor current
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92009.
S21-1110-Rev. B, 15-Nov-2021
Document Number: 92009
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-220-1
A
E
F
D
H(1)
Q
ØP
3
2
L(1)
1
M*
L
b(1)
C
b
e
J(1)
e(1)
MILLIMETERS
DIM.
INCHES
MIN.
MAX.
MIN.
MAX.
A
4.24
4.65
0.167
0.183
b
0.69
1.02
0.027
0.040
b(1)
1.14
1.78
0.045
0.070
c
0.36
0.61
0.014
0.024
D
14.33
15.85
0.564
0.624
E
9.96
10.52
0.392
0.414
e
2.41
2.67
0.095
0.105
e(1)
4.88
5.28
0.192
0.208
F
1.14
1.40
0.045
0.055
H(1)
6.10
6.71
0.240
0.264
J(1)
2.41
2.92
0.095
0.115
L
13.36
14.40
0.526
0.567
L(1)
3.33
4.04
0.131
0.159
ØP
3.53
3.94
0.139
0.155
Q
2.54
3.00
0.100
0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
Document Number: 66542
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 04-Nov-2021
Legal Disclaimer Notice
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Vishay
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Revision: 09-Jul-2021
1
Document Number: 91000