SIHW61N65EF-GE3

SiHW61N65EF www.vishay.com Vishay Siliconix E Series Power MOSFET with Fast Body Diode FEATURES PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) typ. at 25 °C () • Fast body diode MOSFET using E series technology • Reduced trr, Qrr, and IRRM • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Low switching losses due to reduced Qrr • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 700 VGS = 10 V Qg max. (nC) 0.041 371 Qgs (nC) 65 Qgd (nC) 93 Configuration Single D APPLICATIONS TO-247AD • Telecommunications - Server and telecom power supplies • Lighting - High-intensity lighting (HID) - Light emitting diodes (LEDs) • Consumer and computing - ATX power supplies • Industrial - Welding - Battery chargers • Renewable energy - Solar (PV inverters) • Switching mode power supplies (SMPS) • Applications using the following topologies - LLC - Phase shifted bridge (ZVS) - 3-level inverter - AC/DC bridge G G S D S N-Channel MOSFET ORDERING INFORMATION Package TO-247AD Lead (Pb)-Free and Halogen-Free SiHW61N65EF-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 650 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID UNIT V 64 41 A IDM 199 4.2 W/°C Single Pulse Avalanche Energy b EAS 1142 mJ Maximum Power Dissipation PD 520 W TJ, Tstg -55 to +150 °C Linear Derating Factor Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak temperature) c For 10 s dV/dt 70 50 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 9 A. c. 1.6 mm from case. d. ISD  ID, dI/dt = 500 A/μs, starting TJ = 25 °C. S17-0296-Rev. B, 27-Feb-17 Document Number: 91878 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHW61N65EF www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 0.24 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 650 - - V VDS/TJ Reference to 25 °C, ID = 10 mA - 0.81 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V VGS = ± 20 V - - ± 100 nA μA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS VGS = ± 30 V - - ±1 VDS = 520 V, VGS = 0 V - - 1 VDS = 520 V, VGS = 0 V, TJ = 125 °C - - 500 μA - 0.041 0.047  gfs VDS = 30 V, ID = 30.5 A - 23 - S VGS = 0 V, VDS = 100 V, f = 1 MHz - 7407 - - 351 - - 3 - - 233 - - 939 - RDS(on) VGS = 10 V ID = 30.5 A Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Effective Output Capacitance, Energy Related a Co(er) Effective Output Capacitance, Time Related b Co(tr) pF VDS = 0 V to 520 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) - 59 89 tr VDD = 520 V, ID = 30.5 A, VGS = 10 V, Rg = 9.1  - 107 161 - 217 326 - 133 200 f = 1 MHz, open drain 0.5 1 2 - - 64 - - 199 Rise Time Turn-Off Delay Time td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 30.5 A, VDS = 520 V - 247 371 - 65 - - 93 - nC ns  Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the  integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 30.5 A, VGS = 0 V TJ = 25 °C, IF = IS = 30.5 A, dI/dt = 100 A/μs, VR = 400 V - 0.9 1.2 V - 212 474 ns - 2.1 3.8 μC - 18 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S17-0296-Rev. B, 27-Feb-17 Document Number: 91878 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHW61N65EF www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 200 3.0 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 150 TJ = 25 °C ID = 30.5 A RDS(on), Drain-to-Source On-Resistance (Normalized) 100 50 0 2.5 2.0 1.5 1.0 VGS = 10 V 0.5 0 0 5 10 15 20 -60 -40 -20 VDS, Drain-to-Source Voltage (V) 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) 120 100 000 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V TJ = 150 °C 10 000 C, Capacitance (pF) ID, Drain-to-Source Current (A) 20 Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 90 0 60 Ciss 1000 Coss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100 Crss 10 30 1 0 0.1 0 5 10 15 20 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 250 45 40 5000 200 35 30 150 Coss (pF) ID, Drain-to-Source Current (A) TJ = 25 °C 100 Eoss 25 Coss 20 500 Eoss (μJ) ID, Drain-to-Source Current (A) TOP 15 TJ = 150 °C 10 50 5 VDS = 19.2 V 0 50 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S17-0296-Rev. B, 27-Feb-17 25 0 0 100 200 300 400 500 600 VDS Fig. 6 - Coss and Eoss vs. VDS Document Number: 91878 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHW61N65EF www.vishay.com Vishay Siliconix VDS = 520 V VDS = 325 V VDS = 130 V 20 60 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 40 20 4 0 0 0 90 180 270 360 25 450 50 75 100 125 150 TC, Case Temperature (°C) Qg, Total Gate Charge (nC) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature VDS, Drain-to-Source Breakdown Voltage (V) 850 ISD, Reverse Drain Current (A) 100 TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 825 800 775 750 725 700 675 ID = 10 mA 650 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-Drain Voltage (V) 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 8 - Typical Source-Drain Diode Forward Voltage Operation in this Area Limited by RDS(on) -60 -40 -20 Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM Limited ID, Drain Current (A) 100 Limited by RDS(on)* 10 100 μs 1 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 10 ms BVDSS Limited 0.1 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S17-0296-Rev. B, 27-Feb-17 Document Number: 91878 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHW61N65EF www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS 10 % VGS QGD VG td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform L Vary tp to obtain required IAS Current regulator Same type as D.U.T. VDS 50 kΩ D.U.T RG + - IAS 12 V 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S17-0296-Rev. B, 27-Feb-17 Document Number: 91878 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHW61N65EF www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel           Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91878. S17-0296-Rev. B, 27-Feb-17 Document Number: 91878 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-247AD (High Voltage) A E A2 D D1 Øp A1 b2 1 L1 2 L b4 3 (e) DIM. c b MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 4.70 5.31 0.185 0.209 A1 2.21 2.59 0.087 0.102 A2 1.50 2.49 0.059 0.098 b 0.99 1.40 0.039 0.055 b2 1.65 2.41 0.065 0.095 b4 2.59 3.43 0.102 c 0.61 BSC D 20.80 21.46 0.819 D1 3.68 5.49 0.145 (e) 0.135 0.024 BSC 5.46 BSC 0.845 0.216 0.215 BSC E 15.49 16.26 0.610 0.640 L 19.81 20.32 0.780 0.800 L1 4.06 4.50 0.160 0.177 Øp 3.51 3.66 0.138 0.144 ECN: S17-0178-Rev. B, 06-Feb-17 DWG: 6010 Revision: 06-Feb-17 Document Number: 91528 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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