SIP32401DNP-T1-GE4

SiP32401A, SiP32402A www.vishay.com Vishay Siliconix 1.1 V to 5.5 V, Slew Rate Controlled Load Switch DESCRIPTION FEATURES SiP32401A and SiP32402A are slew rate controlled load switches designed for 1.1 V to 5.5 V operation. • 1.1 V to 5.5 V operation voltage range The devices guarantee low switch on-resistance at 1.2 V input. They feature a controlled soft-on slew rate of typical 2.5 ms that limits the inrush current for designs of heavy capacitive load and minimizes the resulting voltage droop at the power rails. • Low Ron down to 1.2 V • 62 mΩ typical from 2 V to 5 V • Slew rate controlled turn-on: 2.5 ms at 3.6 V • Fast shutdown load discharge for SiP32402A Available • Low quiescent current < 1 μA when disabled 10.5 μA typical at VIN = 1.2 V These devices feature low voltage control logic interface (On/Off interface) that can interface with low voltage control signal without extra level shifting circuit. SiP32402A also integrates an output discharge switch that enables fast shutdown load discharge. • Reverse current blocking when switch is off Both SiP32401A and SiP32402A have exceptionally low shutdown current and provide reverse blocking to prevent high current flowing into the power source. APPLICATIONS SiP32401A and SiP32402A are in TDFN4 package of 1.2 mm by 1.6 mm. • Notebook / netbook computers • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 • PDAs / smart phones • Tablet PC • Portable media players • Digital camera • GPS navigation devices • Data storage devices • Optical, industrial, medical, and healthcare devices TYPICAL APPLICATION CIRCUIT VIN IN OUT VOUT SiP32401A, SiP32402A C IN 4.7 µF C OUT 0.1 µF EN EN GND GND GND Fig. 1 - SiP32401A, SiP32402A Typical Application Circuit S15-1246-Rev. D, 01-Jun-15 Document Number: 63705 1 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix ORDERING INFORMATION TEMPERATURE RANGE -40 °C to +85 °C PACKAGE TDFN4 1.2 mm x 1.6 mm MARKING PART NUMBER Gx SiP32401ADNP-T1GE4 Hx SiP32402ADNP-T1GE4 Notes • x = Lot code • GE4 denotes halogen-free and RoHS-compliant ABSOLUTE MAXIMUM RATINGS PARAMETER LIMIT Supply Input Voltage (VIN) Enable Input Voltage (VEN) -0.3 to +6 Output Voltage (VOUT) V -0.3 to VIN + 0.3 Maximum Continuous Switch Current (Imax.) c Maximum Repetitive Pulsed Current (1 ms, 10 % Duty Cycle) UNIT -0.3 to +6 2.4 c A 3 ESD Rating (HBM) 4000 V Junction Temperature (TJ) -40 to +125 °C Thermal Resistance (θJA) a 170 °C/W Power Dissipation (PD) a, b 324 mW Notes a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout. b. Derate 5.9 mW/°C above TA = 70 °C, see PCB layout. c. TA = 25 °C, see PCB layout Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE PARAMETER Input Voltage Range (VIN) Operating Junction Temperature Range (TJ) S15-1246-Rev. D, 01-Jun-15 LIMIT UNIT 1.1 to 5.5 V -40 to +125 °C Document Number: 63705 2 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix SPECIFICATIONS PARAMETER Operating Voltage c Quiescent Current SYMBOL TEST CONDITIONS UNLESS SPECIFIED VIN = 5 V, TA = -40 °C to +85 °C (typical values are at TA = 25 °C) UNIT MIN. a TYP. b MAX. a 1.1 - 5.5 VIN = 1.2 V, EN = active - 10.5 17 VIN = 1.8 V, EN = active - 21 30 VIN = 2.5 V, EN = active - 34 50 VIN = 3.6 V, EN = active - 54 90 VIN = 4.3 V, EN = active - 68 110 VIN = 5 V, EN = active - 105 180 VIN IQ LIMITS -40 °C to +85 °C Off Supply Current IQ(off) EN = inactive, OUT = open - - 1 Off Switch Current IDS(off) EN = inactive, OUT = GND - - 1 IRB VOUT = 5 V, VIN = 0 V, VEN = inactive - - 10 VIN = 1.2 V, IL = 100 mA, TA = 25 °C - 66 76 VIN = 1.8 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 2.5 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 3.6 V, IL = 100 mA, TA = 25 °C - 62 72 VIN = 4.3 V, IL = 100 mA, TA = 25 °C - 62 72 Reverse Blocking Current On-Resistance RDS(on) VIN = 5 V, IL = 100 mA, TA = 25 °C On-Resistance Temp.-Coefficient EN Input Low Voltage c EN Input High Voltage c - 62 72 - 4250 - VIN = 1.2 V - - 0.3 VIN = 1.8 V - - 0.4 d VIN = 2.5 V - - 0.5 d VIN = 3.6 V - - 0.6 d VIN = 4.3 V - - 0.7 d VIN = 5 V - - 0.8 d VIN = 1.2 V 0.9 d - - VIN = 1.8 V 1.2 d - - VIN = 2.5 V 1.4 d - - VIN = 3.6 V 1.6 d - - VIN = 4.3 V 1.7 d - - TCRDS VIL VIH V μA mΩ ppm/°C V VIN = 5 V 1.8 - - EN Input Leakage ISINK VEN = 5.5 V -1 - 1 μA Output Pulldown Resistance RPD EN = inactive, TA = 25 °C (for SiP32402A only) - 217 280 Ω Output Turn-On Delay Time td(on) - 1.8 - Output Turn-On Rise Time t(on) VIN = 3.6 V, RLOAD = 10 Ω, TA = 25 °C 1.2 2.5 3.8 Output Turn-Off Delay Time td(off) - - 0.001 ms Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. For VIN outside this range consult typical EN threshold curve. d. Not tested, guarantee by design. S15-1246-Rev. D, 01-Jun-15 Document Number: 63705 3 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix PIN CONFIGURATION EN 4 OUT 1 Bottom View GND IN 3 2 GND Fig. 2 - TDFN4 1.2 mm x 1.6 mm Package PIN DESCRIPTION PIN NUMBER 1 NAME OUT FUNCTION This is the output pin of the switch 2 GND Ground connection 3 IN This is the input pin of the switch 4 EN Enable input TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 140 120 VIN = 5 V 100 IQ - Quiescent Current (μA) IQ - Quiescent Current (μA) 120 100 80 60 40 80 60 VIN = 3.6 V 40 20 20 VIN = 1.2 V 0 0 1.0 1.5 2.0 2.5 3.0 3.5 VIN (V) 4.0 4.5 5.0 5.5 - 40 Fig. 3 - Quiescent Current vs. Input Voltage - 20 0 20 40 Temperature (°C) 60 80 100 Fig. 5 - Quiescent Current vs. Temperature 0.50 100 0.40 IQ(OFF) - Off Supply Current (nA) IQ(OFF) - Off Supply Current (nA) 0.45 0.35 0.30 0.25 0.20 0.15 0.10 10 1 0.1 0.01 VIN = 5 V VIN = 3.6 V 0.05 0.00 1.0 VIN = 1.2 V 0.001 1.5 2.0 2.5 3.0 3.5 VIN (V) 4.0 4.5 5.0 Fig. 4 - Off Supply Current vs. Input Voltage S15-1246-Rev. D, 01-Jun-15 5.5 - 40 - 20 0 20 40 Temperature (°C) 60 80 100 Fig. 6 - Off Supply Current vs. Temperature Document Number: 63705 4 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix 1.0 1000 0.9 100 IDS(off) - Off Switch Current (nA) IDS(off) - Off Switch Current (nA) TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 0.8 0.7 0.6 0.5 0.4 10 0.1 0.2 1 0.01 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 5.5 VIN = 1.2 V 0.0001 - 40 78 85 76 80 RDS - On-Resistance (mΩ) 74 72 70 IO = 2 A 68 IO = 1.2 A 66 IO = 1 A 64 62 1.5 2.0 2.5 60 80 100 75 70 65 60 55 IO = 0.1 A 3.0 3.5 VIN (V) 4.0 4.5 5.0 45 - 40 5.5 - 20 0 20 40 60 80 100 Temperature (°C) Fig. 11 - RDS(on) vs. Temperature 300 600 550 VOUT = VIN = 5 V VOUT = VIN RPD - Output Pulldown Resistance (Ω) RPD - Output Pulldown Resistance (Ω) 20 40 Temperature (°C) VIN = 5 V IO = 0.1 mA Fig. 8 - RDS(on) vs. VIN 500 450 SiP32402A only 400 350 300 250 200 150 100 1.0 0 50 IO = 0.2 A 1.0 - 20 Fig. 10 - Off Switch Current vs. Temperature Fig. 7 - Off Switch Current vs. Input Voltage RDS - On-Resistance (mΩ) VIN = 3.6 V 0.001 0.3 60 VIN = 5 V 1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 280 SiP32402A only 260 240 220 200 180 160 - 40 - 20 0 20 40 60 80 VIN (V) Temperature (°C) Fig. 9 - Output Pull Down vs. Input Voltage Fig. 12 - Output Pull Down vs. Temperature S15-1246-Rev. D, 01-Jun-15 100 Document Number: 63705 5 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix 0 3 -2 2.5 td(on) - Turn On Delay Time (ms) IIN - Input Current (nA) TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) -4 -6 -8 VIN = 0 V VEN = 0 V - 10 2 1.5 1 0.5 - 12 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 5 0 - 40 5.5 Fig. 13 - Reverse Blocking Current vs. Output Voltage - 20 0 20 40 60 Temperature (°C) 80 100 Fig. 16 - Turn-on Delay Time vs. Temperature 0.30 5.0 4.0 td(off) - Turn Off Delay Time (μs) VIN = 5 V CL = 0.1 μF RL = 10 Ω 4.5 tr - Rise Time (ms) VIN = 5 V CL = 0.1 μF RL = 10 Ω 3.5 3.0 2.5 2.0 1.5 1.0 VIN = 5 V CL = 0.1 μF RL = 10 Ω 0.25 0.20 0.15 0.10 0.05 0.5 0.0 - 40 - 20 0 20 40 60 Temperature (°C) 80 100 Fig. 14 - Rise Time vs. Temperature 0.00 - 40 - 20 0 20 40 Temperature (°C) 60 80 100 Fig. 17 - Turn-Off Delay Time vs. Temperature 1.5 1.4 EN Threshold Voltage (V) 1.3 VIH 1.2 1.1 VIL 1.0 0.9 0.8 0.7 0.6 0.5 0.4 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Fig. 15 - EN Threshold Voltage vs. Input Voltage S15-1246-Rev. D, 01-Jun-15 Document Number: 63705 6 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT IOUT for 5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT IOUT for 1.5VOUT 2 V/Div, 2 A/Div, 2 ms/Div Fig. 18 - Typical Turn-on Delay, Rise Time COUT = 0.1 μF, CIN = 4.7 μF, IOUT = 1.5 A Fig. 21 - Typical Fall Time COUT = 0.1 μF, CIN = 4.7 μF, IOUT = 1.5 A EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 2 V/Div, 0.25 A/Div, 2 ms/Div Fig. 19 - Typical Turn-on Delay, Rise Time COUT = 0.1 μF, CIN = 4.7 μF, ROUT = 10 Ω Fig. 22 - Typical Fall Time COUT = 0.1 μF, CIN = 4.7 μF, ROUT = 10 Ω EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 2 V/Div, 2 A/Div, 2 ms/Div Fig. 20 - Typical Turn-on Delay, Rise Time COUT = 200 μF, CIN = 4.7 μF, IOUT = 1.5 A S15-1246-Rev. D, 01-Jun-15 IOUT for 1.5VOUT 2 V/Div, 2 A/Div, 2 ms/Div Fig. 23 - Typical Fall Time COUT = 200 μF, CIN = 4.7 μF, IOUT = 1.5 A Document Number: 63705 7 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix EN EN 5VOUT 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT IOUT for 1.5VOUT 2 V/Div, 0.25 A/Div, 2 ms/Div 2 V/Div, 0.25 A/Div, 2 ms/Div Fig. 24 - Typical Turn-on Delay, Rise Time COUT = 200 μF, CIN = 4.7 μF, ROUT = 10 Ω Fig. 25 - Typical Fall Time COUT = 200 μF, CIN = 4.7 μF, ROUT = 10 Ω BLOCK DIAGRAM Reverse Blocking IN OUT Charge Pump Control Logic EN Turn On Slew Rate Control Note: for SiP32402A only GND Fig. 26 - Functional Block Diagram S15-1246-Rev. D, 01-Jun-15 Document Number: 63705 8 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com Vishay Siliconix PCB LAYOUT Top Bottom Fig. 27 - PCB Layout for TDFN4 1.2 mm x 1.6 mm (type: FR4, size: 1" x 1", thickness: 0.062", copper thickness: 2 oz.) DETAILED DESCRIPTION SiP32401A and SiP32402A are advanced slew rate controlled high side load switch consisted of a n-channel power switch. When the device is enable the gate of the power switch is turned on at a controlled rate to avoid excessive in-rush current. Once fully on the gate to source voltage of the power switch is biased at a constant level. The design gives a flat on resistance throughout the operating voltages. When the device is off, the reverse blocking circuitry prevents current from flowing back to input if output is raised higher than input. The reverse blocking mechanism also works in case of no input applied. The SiP32402A also integrates an output discharge switch which allows fast output discharge. APPLICATION INFORMATION Input Capacitor The SiP32401A and SiP32402A do not require an input capacitor. To limit the voltage drop on the input supply caused by transient inrush currents, an input bypass capacitor is recommended. A 2.2 μF ceramic capacitor placed as close to the VIN and GND should be enough. Higher values capacitor can help to further reduce the voltage drop. Ceramic capacitors are recommended for their ability to withstand input current surge from low impedance sources such as batteries in portable devices. Output Capacitor While these devices works without an output capacitor, an 0.1 μF or larger capacitor across VOUT and GND is recommended to accommodate load transient condition. It also help to prevent parasitic inductance forces VOUT below GND when switching off. Output capacitor has minimal affect on device’s turn on slew rate time. There is no requirement on capacitor type and its ESR. S15-1246-Rev. D, 01-Jun-15 Enable The EN pin is compatible with both TTL and CMOS logic voltage levels. Protection Against Reverse Voltage Condition Both SiP32401A and SiP32402A contain reverse blocking circuitry to protect the current from going to the input from the output in case where the output voltage is higher than the input voltage when the main switch is off. Reverse blocking works for input voltage as low as 0 V. Thermal Considerations SiP32401A and SiP32402A are designed to maintain a constant output load current. Due to physical limitations of the layout and assembly of the device the maximum switch current is 2.8 A, as stated in the Absolute Maximum Ratings table. However, another limiting characteristic for the safe operating load current is the thermal power dissipation of the package. To obtain the highest power dissipation (and a thermal resistance of 170 °C/W) the power pad of the device should be connected to a heat sink on the printed circuit board. Figure 23 shows a typical PCB layout. All copper traces and vias for the IN and OUT pins should be sized adequately to carry the maximum continuous current. The maximum power dissipation in any application is dependant on the maximum junction temperature, TJ (max.) = 125 °C, the junction-to-ambient thermal resistance for the TDFN4 1.2 mm x 1.6 mm package, θJ-A = 170 °C/W, and the ambient temperature, TA, which may be formulaically expressed as: P (max.) = T J (max.) - T A θJ- A = 125 - TA 170 Document Number: 63705 9 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32401A, SiP32402A www.vishay.com It then follows that, assuming an ambient temperature of 70 °C, the maximum power dissipation will be limited to about 324 mW. So long as the load current is below the 2.8 A limit, the maximum continuous switch current becomes a function of two things: the package power dissipation and the RDS(on) at the ambient temperature. As an example let us calculate the worst case maximum load current at TA = 70 °C. The worst case RDS(on) at 25 °C occurs at an input voltage of 1.2 V and is equal to 76 mΩ. The RDS(on) at 70 °C can be extrapolated from this data using the following formula: Vishay Siliconix Recommended Board Layout For the best performance, all traces should be as short as possible to minimize the inductance and parasitic effects. The input and output capacitors should be kept as close as possible to the input and output pins respectively. Connecting the central exposed pad to GND, using wide traces for input, output, and GND help reducing the case to ambient thermal impedance. RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x DT) Where TC is 4250 ppm/°C. Continuing with the calculation we have RDS(on) (at 70 °C) = 76 mΩ x (1 + 0.00425 x (70 °C - 25 °C)) = 90.5 mΩ The maximum current limit is then determined by P (max.) I LOAD (max.) < R DS(on) which in case is 1.9 A. Under the stated input voltage condition, if the 1.9 A current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63705. S15-1246-Rev. D, 01-Jun-15 Document Number: 63705 10 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TDFN4 1.2 x 1.6 Case Outline D D2 4 b 3 Pin #1 ID (Optional) 4 K E E2 3 1 2 e Index Area (D/2 x E/2) Bottom View A A1 Top View A3 1 L 2 Side View DIM. MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.45 0.55 0.60 0.017 0.022 0.024 A1 0.00 - 0.05 0.00 - A3 0.15 REF. or 0.127 REF. (1) 0.006 or 0.005 0.002 (1) b 0.20 0.25 0.30 0.008 0.010 0.012 D 1.15 1.20 1.25 0.045 0.047 0.049 D2 0.81 0.86 0.91 0.032 0.034 0.036 e 0.50 BSC 0.020 E 1.55 1.60 1.65 0.061 0.063 0.065 E2 0.45 0.50 0.55 0.018 0.020 0.022 K L 0.25 typ. 0.25 0.30 0.010 typ. 0.35 0.010 0.012 0.014 ECN: T16-0143-Rev. C, 18-Apr-16 DWG: 5995 Note (1) The dimension depends on the leadframe that assembly house used. Revision: 18-Apr-16 Document Number: 65734 1 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PAD Pattern Vishay Siliconix RECOMMENDED MINIMUM PADS FOR TDFN4 1.2 x 1.6 0.86 0.50 3 1 2 2.0 0.55 0.20 0.50 0.20 4 0.55 0.30 Recommended Minimum Pads Dimensions in mm Document Number: 66558 Revision: 05-Mar-10 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer  ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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ALL RIGHTS RESERVED Revision: 08-Feb-17 1 Document Number: 91000 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Vishay: SIP32401ADNP-T1GE4 SIP32402ADNP-T1GE4 SIP32401DNP-T1-GE4