SIP32434BEVB

SiP32433, SiP32434 www.vishay.com Vishay Siliconix eFuse Evaluation Board Manual INTRODUCTION This reference board allows the user to evaluate the SiP32433A, SiP32433B, SiP32434A, and SiP32434B single-channel eFuse load switches. It can also be used for AEC-Q100 qualified versions of these devices, which have part numbers starting with SiPQ instead of SiP. The SiP32433A, SiP32433B, SiP32434A, and SiP32434B integrate multiple control and protection features, which provide increased controllability and reliability with simplified designs and minimal external components. They protect both power sources and downstream circuitry connected to the switch from overloads, short circuits, voltage surges, and excessive inrush currents. The output current limit can be set by a single external resistor. VIN overvoltage protection and undervoltage lockout threshold levels can be set with an external resistor network. VIN inrush current requirements can be set with a single external soft start capacitor. Upon switch-off due to latchable faults, the SiP32433A and SiP32434A will latch the power switch off and the PGD will remain low. The switch can restart by resetting the EN or VIN. The SiP32433B and SiP32434B will auto retry if there is no OTP or OVP fault. The retry delay time is 32 times the soft start time set by the CSS. Overcurrent, overtemperature, and short circuits are latchable faults, while overvoltage, undervoltage, and reverse current flow are non-latchable faults. EVALUATION BOARD FEATURES The SiP32433A, SiP32433B, SiP32434A, and SiP32434B eFuse evaluation board features include: • 3 V to 23 V operation • Programmable current limit range. 150 mA to 3.5 A for the SiP32533 and 300 mA to 6 A for the SiP32434 • Programmable soft start output voltage slew rate and auto retry time • Input path current sense resistor for current probing • Onboard MOSFET for output short test • Programmable OVP threshold • Reverse current blocking (SiP32433x only) APPLICATIONS The evaluation board can be used for: • Servers and data storage • Routers and switches • Hot swap and hot plug devices • Optical modules • PCIe and memory • Industrial controls and automation • TVs and gaming systems DESCRIPTION This evaluation fits the evaluation of the eFuse products listed in Table 1. TABLE 1 - EVALUATION BOARD ORDERING INFORMATION PART NUMBER FAULT OFF RESPONSE RDS(ON) (mΩ) MAX. ILIM (A) REVERSE BLOCKING VIN RANGE (V) EN / UVLO SET (k) OVP SET (k) ILIM SET SiP32433AEVB Latch 78 3.5 Yes 3.3 to 23 25 / 4.12 15 / 1 2433A SiP32433BEVB Auto-retry 78 3.5 Yes 3.3 to 23 25 /4.12 15 / 1 2433B SiP32434AEVB Latch 33 6 No 3.3 to 23 25 /4.12 15 / 1 2434A SiP32434BEVB Auto-retry 33 6 No 3.3 to 23 25 /4.12 15 / 1 2434B Revision: 30-Nov-2023 Document Number: 62068 1 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix Fig. 1 - SiP32433xEVB, SiP32434xEVB Evaluation Board Rev. A J25 1 1 1 2 2 J3 1 CON1 2 IN1 VOUT_S OUT2 J8 10 2 1 J6 11 U1 1 Rsense CON1 1 SMA6F24A GND2 VIN_S 1 J7 J23 CON1 CON1 JUMPER J5 CON2 J4 J22 CON1 JUMPER J24 J21 1 J26 J20 1 D1 1 1 CON1 2 banana C1 10uF C5 10uF C2 10uF C6 10uF 1 J13 EN CON1 R8 C9 4.12k 47n J14 4 R5 J17 banana 1 2 R6 2.47k 5 SS EN Ilimit/Imon PG 8 GND 15k 7 D2 C7 10uF CON1 banana J9 1 R4 51k 1 J27 OVP 100k R2 R9 C8 10uF J10 1 R10 CON1 J11 JUMPER JUMPER R1 Q1 SiRA00 RL1 RL2 RL3 J12 1 10 CON1 R3 10k 1k J16 6 TBA 1 C4 10uF 9 SSA23L-E3/61T 1 3 C3 10uF OUT1 1 IN2 25k SiP3243xx 2 R7 banana JUMPER 1 J18 GND_S J19 GNS_S J1 CON1 Fig. 2 - SiP3243xxEVB Schematic SiP3243XXEVB PHYSICAL ACCESS Table 2 lists the SiP3243xxEVB eFuse evaluation board’s switch on / off control, power input, and output connectors. Table 3 lists the test points. Table 4 describes jumpers and the functions to be set. These jumpers are off at the normal board setting. TABLE 2 - INPUT AND OUTPUT CONNECTOR DESCRIPTION LABEL NAME J13 EN Active high enable and undervoltage input. Voltage divider resistors are 25 k and 4.12 k Power input connector J7 VIN J14 PGND J16 PGND J8 VOUT Revision: 30-Nov-2023 DESCRIPTION Ground connection for the power input Ground connection for the power output Power output connector Document Number: 62068 2 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix TABLE 3 - TEST POINTS DESCRIPTION LABEL NAME J27 OVP DESCRIPTION OVP pin probe point J25 OVP OVP pin probe through a 100 k resistor J18 GND IC ground sense J12 Gate High enable gate of MOSFET that shorts the output to GND J24 ISENSE Differential sense of input current over a shunt resistor J6 VOUT_S Power output sense point J19 GND J3 PG J5 VIN_S IC ground sense PG pull-up voltage bias supply Power input sense point TABLE 4 - JUMPER DESCRIPTION AND DEFAULT SETTING LABEL NAME J9 RL2 Connect load resistor DESCRIPTION J10 RL3 Connect load resistor J4 PG Jumper that connects PG pull-up resistor to VIN J17 RLIM Jumper that connects R6 as a parallel current limit setting resistor to R5 J26 OVP Jumper connects R10, OVP voltage divider upper resistor to be paralleled with R4 POWER INPUT AND OUTPUT TERMINALS The power header terminals are designed to allow a power supply and load to be connected easily to the evaluation board (see Fig. 1). The input voltage range for this evaluation is from 3.3 V to 23 V. D2 is the Schottky diode placed next to the device output to clamp the negative voltage when abruptly switching off an inductive load. A TVS diode can be placed at the input capacitor location in case input transient protection is required. INPUT AND OUTPUT CAPACITORS The input capacitors (C1 to C6) and output capacitors (C7, C8) are mounted close to the device to ensure a stable voltage right before and after the eFuse load switch. The capacitances of these capacitors are 10 μF. The voltage rating for input and output capacitors is 50 V. The SiP32433A, SiP32433B, SiP32434A, and SiP32434B can operate normally up to 23 V. It is important to use capacitors rated at 35 V or higher for the input and output capacitors. ENABLE AND UNDERVOLTAGE LOCKOUT TERMINAL The header J13 is directly connected to the EN pin for the enable function of the device. The voltage rating of the EN pin is 28 V. The enable threshold voltage is 1.25 V and the disable threshold voltage is 1.05 V. A user-defined undervoltage protection can be implemented with a voltage divider (Fig. 3) Power source IN SIP3243xx R1 EN / UVLO R2 GND Fig. 3 - Settable Undervoltage Protection With Designs PG, POWER GOOD OUTPUT The SiP32433A, SiP32433B, SiP32434A, and SiP32434B devices have power good output to indicate their operation. PG is an open drain output pin. When there is no fault, and VOUT reaches 95 % of VIN, the PG is off. The header J11 is connected to the PG of the device. An external bias voltage can be applied on header J3. The voltage rating of the power good is 28 V maximum. The pull-high resistor connects it to the VIN through the J4 jumper when using the VIN as a PG high bias voltage source. Revision: 30-Nov-2023 Document Number: 62068 3 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix OVERCURRENT LIMIT SETTING One of the key features of the devices is they provide overcurrent limit protection. The SiP32433A’s and SiP32433B’s current limit setting resistor RSET can be calculated by the below formula. 0.6 V R SET = -------------  10 300 I LIM The SiP32434A’s and SiP32434B’s RSET follows the formula below: 0.6 V R SET = -------------  20 600 I LIM • RSET is paralleled R5 and R6 on the board • ILIM is the target current limit setting PROGRAMMABLE SOFT POWER UP During soft start, the devices control the output voltage to follow the voltage ramp on the SS pin. I INRUSH x t SS V OUT = ---------------------------------C OUT The output slew rate (SR) and its set capacitor, CSS, can be calculated by the following formulas: I SS  9 C SS = ----------------SR Where: • tSS is the soft power up time • ISS is the built-in current to charge up the CSS; the value is 4.5 μA • CSS is the soft power setting capacitor shown as C9 on the board • RSET is the current limit resistor HOT-PLUG TEST Connect J3 to an external 5 V power source as the PG bias source. Hot-plug the power supply between J7 and J14. PGD (5 V/div) IOUT (2 A/div) VIN (5 V/div) VOUT (5 V/div) 10 ms/div Fig. 4 - An Example of Inrush Current Captured on the SiP32433 Series eFuse Evaluation Board Revision: 30-Nov-2023 Document Number: 62068 4 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix CURRENT LIMIT TEST Connect and turn on the power supply. Slowly increase the load current. The switch turns off after 6 ms at the set current limit clamping level. Fig. 5 - An Example of Overcurrent Protection Captured on the SiP32434 eFuse Evaluation Board OUTPUT SHORT TEST Short the output through the on-board MOSFET by pulling J12 high. Fig. 6 - An Example of Output Short Protection Captured on the SiP32433 eFuse Evaluation Board Revision: 30-Nov-2023 Document Number: 62068 5 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix Fig. 7 - An Example of Auto Retry Into an Output Short Condition EVALUATION BOARD LAYOUT AND PROPOSED LAYOUT GUIDELINES Fig. 8 to Fig. 11 show component placement and PCB layouts. Fig. 8 - SiP3243xxEVB Board Top Layer Revision: 30-Nov-2023 Document Number: 62068 6 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix Fig. 9 - SiP3243xxEVB Board Bottom Layer Fig. 10 - SiP3243xxEVB Board Inner 1 Layer Revision: 30-Nov-2023 Document Number: 62068 7 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix Fig. 11 - SiP3243xxEVB Board Inner 2 Layer Revision: 30-Nov-2023 Document Number: 62068 8 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix BILL OF MATERIALS Table 3 lists the evaluation board bill of materials (BOM). TABLE 3 - SiP3243XXEVB BILL OF MATERIALS SYM. NAME COMP. VALUE QUANTITY REFDES Banana 4 J7; J8; J14; J16 36-575-4-ND C0603-TDK 47 nF 1 C9 399-17881-2-ND C1210-TDK 10 uF, 50 V 8 C1; C2; C3; C4; C5; C6; C7; C8 445-14933-2-ND SSA23L-E3/61TGITR-ND BANANA DO-214 MANUFACTURE PART NUMBER SSA23L 1 D2 DO-221AC SMA6F24A 1 D1 DNP JUMPER2 JUMPER 5 J4; J9; J10; J17; J26 TSW-102-07-L-S JUMPER2 CON2 1 J24 TSW-102-07-L-S IC 1 U1 SiP3243xx SiRA00 1 Q1 SIRA00DP-T1-GE3TR-ND MLP33-11A MOSPOWERPAKSO8 R0603-VISHAY 51 k 1 R2 541-5465-2-ND R0603-VISHAY DNP 1 R4 DNP R0603-VISHAY DNP 1 R8 DNP R0603-VISHAY 12.4 k 1 R5 A140147TR-ND A140445TR-ND R0603-VISHAY 2.05 k 1 R6 R0603-VISHAY DNP 1 R7 DNP R0603-VISHAY 1 k 1 R9 541-1.00KHTR-ND R0603-VISHAY DNP 1 R10 DNP R0805-VISHAY 10  1 R1 CRCW080510R0FKEB R0805-VISHAY 100 k 1 R3 541-3950-2-ND R1206-VISHAY DNP 1 RL1 DNP R1206-VISHAY 25 m 1 RSENSE CSR1206FK25L0TR-ND R2512-VISHAY DNP 2 RL2; RL3 DNP CON1 11 J1; J3; J11; J12; J13; J20; J21; J22; J23; J25; J27 TP30 TP30 VIN_S 1 J5 TP30 VOUT_S 1 J6 TP30 GNDS 1 J18 TP30 GNSS 1 J19 Revision: 30-Nov-2023 36-5002-ND Document Number: 62068 9 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32433, SiP32434 www.vishay.com Vishay Siliconix LAYOUT GUIDELINES The SiP32434A and SiP32434B are protection switches designed to maintain a constant output load current upon overcurrent faults. An optimized layout with efficient heat sinking is critical. It is recommended to put as much copper as possible on the devices’ central exposed pad, which is connected to ground. Connect all ground planes with all possible thermal VIAs. The circuit setting components should be laid close to their connection pins. The components include a current limit setting resistor, soft start setting capacitor, and resistors connected to EN / UVLO and OVP pins. Protection devices such as an input TVS or output Schottky diode must be located close to the pins to be protected, and routed with short traces to reduce inductance. Below is a layout example. ROVP1 RPGD ROVP2 VIN+ VOUT+ 1 10 2 9 3 8 4 7 5 6 D COUT CIN CSS RLIM GND Fig. 12 Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62068. Revision: 30-Nov-2023 Document Number: 62068 10 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000