SIP41104DY-T1-E3

SiP41104 Vishay Siliconix Half-Bridge N-Channel MOSFET Driver for DC/DC Conversion DESCRIPTION FEATURES The SiP41104 is a high-speed half-bridge MOSFET driver for use in high frequency, high current, multiphase dc-to-dc synchronous rectifier buck power supplies. It is designed to operate at switching frequencies up to 1 MHz. The high-side driver is bootstrapped to allow driving N-channel MOSFETs. • • • • • • • The SiP41104 comes with adaptive shoot-through protection to prevent simultaneous conduction of the external MOSFETs. 5 V gate drive Undervoltage lockout Internal bootstrap diode PWM pin tristate enable feature Switching frequency up to 1 MHz Drive MOSFETs in 4.5 V to 50 V systems Compliant to RoHS directive 2002/95/EC APPLICATIONS The SiP41104 is available in both standard and lead (Pb)free 8 pin SOIC packages and is specified to operate over the industrial temperature range of - 40 °C to 85 °C. • • • • • • Multi-phase DC/DC conversion High current synchronous buck converters High frequency synchronous buck converters Asynchronous-to-synchronous adaptations Mobile computer DC/DC converters Desktop computer DC/DC converters FUNCTIONAL BLOCK DIAGRAM + 5 to 50 V +5V VDD BOOT OUTH SiP41104 LX Controller VOUT PWM OUTL GND GND GND *Pb containing terminations are not RoHS compliant, exemptions may apply. Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 www.vishay.com 1 SiP41104 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS (all voltages referenced to GND = 0 V) Parameter Limit VDD, PWM 7 LX, BOOT 55 BOOT to LX 7 Storage Temperature V - 40 to 150 Operating Junction Temperature °C 125 Power Dissipationa Thermal Impedance (ΘJA) Unit SO-8 a 770 mW 130 °C/W Notes: a. Device mounted with all leads soldered or welded to PC board. a. Derate 7.7 mW/°C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE (all voltages referenced to GND = 0 V) Parameter Limit VDD 4.5 to 5.5 VBOOT 4.5 to 50 CBOOT 100 nF to 1 µF Operating Temperature Range Unit V - 40 to 85 °C SPECIFICATIONSa Parameter Symbol Test Conditions Unless Specified VDD = 5 V, VBOOT - VLX = 5 V, CLOAD = 3 nF TA = - 40 °C to 85 °C Limits Min.a Typ.b Max.a Unit Power Supplies Supply Voltage VDD 5.5 V Quiescent Current IDDQ fPWM = 1 MHz, CLOAD = 0 2.5 3.5 mA Tristate Current IDDT PWM = open 500 1000 µA 4.5 Reference Voltage VBBM Break-Before-Make 1 V PWM Input Input High VIH Input Low VIL IB Bias Current Tristate Threshold High VTSH Low VTSL Tristate Shutdown Timeoutc VDD 4.0 0.5 TA = 25 °C ± 700 ± 1400 3.2 1.9 V µA V tTST Rising or falling VUVHS Rising or falling 2.5 3.35 3.75 V VF IF = 10 mA, TA = 25 °C 0.70 0.76 0.82 V 425 ns High-Side Undervoltage Lockout Threshold Bootstrap Diode Forward Voltage www.vishay.com 2 Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 SiP41104 Vishay Siliconix SPECIFICATIONSa Parameter Symbol Test Conditions Unless Specified VDD = 5 V, VBOOT - VLX = 5 V, CLOAD = 3 nF TA = - 40 °C to 85 °C Limits Min.a Typ.b Max.a Unit MOSFET Drivers High-Side Drive Currentc Low-Side Drive Current c High-Side Driver Impedance Low-Side Driver Impedance IPKH(source) IPKH(sink) IPKL(source) IPKL(sink) RDH(source) RDH(sink) RDL(source) RDL(sink) 0.9 VBOOT - VSH = 4.5 V 1.1 A 0.8 VDD = 4.5 V 1.5 2.5 VDD = 4.5 V, SH = GND VDD = 4.5 V 3.8 2.2 3.3 3.4 5.1 1.4 2.1 High-Side Rise Time trH 10 % - 90 % 32 40 High-Side Fall Time tfH 90 % - 10 % 36 45 td(off)H See Timing Waveforms 20 td(on)H See Timing Waveforms 30 Low-Side Rise Time trL 10 % - 90 % 45 55 Low-Side Fall Time tfL 90 % - 10 % 20 30 td(off)L See Timing Waveforms 30 td(on)L See Timing Waveforms 30 High-Side Propagation Delayc Low-Side Propagation Delayc Ω ns LX Timer LX Falling Timeoutc tLX 420 ns VDD Undervoltage Lockout Threshold Rising VUVLOR Threshold Falling VUVLOF 4.3 3.7 4.1 Hysteresis 0.4 Power on Reset Time 2.5 4.5 V ms Thermal Shutdown Temperature TSD Temperature rising 165 Hysteresis TH Temperature ralling 25 °C Notes: a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (- 40 °C to 85 °C). b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 5 V unless otherwise noted. c. Guaranteed by design. Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 www.vishay.com 3 SiP41104 Vishay Siliconix TIMING WAVEFORMS PWM 50 % 50 % 90 % 90 % OUTH 10 % 10 % tfH trH 90 % 90 % OUTL 10 % 10 % trL td(off)H tfL td(off)L td(on)H td(on)L LX 1V PIN CONFIGURATION AND TRUTH TABLE TRUTH TABLE OUTH OUTL L L H L H L TriState L L PWM SO-8 OUTH 1 BOOT 2 PWM 3 GND 4 SiP41104 8 LX 7 NC 6 VDD 5 OUTL Top View ORDERING INFORMATION Part Number SiP41104DY-T1 SiP41104DY-T1-E3 Temperature Range Marking - 40 °C to 85 °C 41104 Eval Kit Temperature Range SiP41104DB - 40 °C to 85 °C PIN DESCRIPTION Pin Number Name 1 OUTH Function High-side MOSFET gate drive 2 BOOT Bootstrap supply for high-side driver. A capacitor connects between BOOT and LX. 3 PWM Input signal for the MOSFET drivers 4 GND Ground Synchronous or low-side MOSFET gate drive 5 OUTL 6 VDD + 5 V supply 7 NC No connect 8 LX Connection to source of high-side MOSFET, drain of the low-side MOSFET, and the inductor www.vishay.com 4 Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 SiP41104 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VDD BOOT OUTH UVLO OTP LX TRI STATE - DETECT + PWM VBBM VDD OUTL GND Figure 1. DETAILED OPERATION PWM The PWM pin controls the switching of the external MOSFETs. The driver logic operates in a noninverting configuration. The PWM input stage should be driven by a signal with fast transition times, like those provided by a PWM controller or logic gate, (< 200 ns). The PWM input functions as a logic input and is not intended for applications where a slow changing input voltage is used to generate a switching output when the input switching threshold voltage is reached. Low-Side Driver The supplies for the low-side driver are VDD and GND. During shutdown, OUTL is held low. High-Side Driver The high-side driver is isolated from the substrate to create a floating high-side driver so that an N-Channel MOSFET can be used for the high-side switch. The supplies for the highside driver are BOOT and LX. The voltage is supplied by a floating bootstrap capacitor, which is continually recharged by the switching action of the output. During shutdown OUTH is held low. Bootstrap Circuit The internal bootstrap diode and a bootstrap capacitor form a charge pump that supplies voltage to the BOOT pin. An integrated bootstrap diode replaces the external Schottky Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 diode needed for the bootstrap circuit; only a capacitor is necessary to complete the bootstrap circuit. The bootstrap capacitor is sized according to, CBOOT = (QGATE/ΔVBOOT - LX) x 10 where QGATE is the gate charge needed to turn on the highside MOSFET and ΔVBOOT - LX is the amount of droop allowed in the bootstrapped supply voltage when the highside MOSFET is driven high. The bootstrap capacitor value is typically 0.1 µF to 1µF. The bootstrap capacitor voltage rating must be greater than VDD + 5 V to withstand transient spikes and ringing. Shoot-Through Protection The external MOSFETs are prevented from conducting at the same time during transitions. Break-before-make circuits monitor the voltages on the LX pin and the OUTL pin and control the switching as follows: When the signal on PWM goes low, OUTH will go low after an internal propagation delay. After the voltage on LX falls below 1 V by the inductor action, the low-side driver is enabled and OUTL goes high after some delay. When the signal on PWM goes high, OUTL will go low after an internal propagation delay. After the voltage on OUTL drops below 1 V the high-side driver is enabled and OUTH will go high after an internal propagation delay. If LX does not drop below 1 V within 400 ns after OUTH goes low, OUTL is forced high until the next PWM transition. www.vishay.com 5 SiP41104 Vishay Siliconix Shutdown Undervoltage Lockout The driver enters shutdown mode when the signal driving PWM enters HiZ or “tristate” mode for more than 400 ns. Undervoltage lockout prevents control of the circuit until the supply voltages reach valid operating levels. The UVLO circuit forces OUTL and OUTH to low when VDD is below its specified voltage. A separate UVLO forces OUTH low when the voltage between BOOT and LX is below the specified voltage. VDD Bypass Capacitor MOSFET drivers draw large peak currents from the supplies when they switch. A local bypass capacitor is required to supply this current and reduce power supply noise. Connect a 1 µF ceramic capacitor as close as practical between the VDD and GND pins. Thermal Protection If the die temperature rises above 165 °C, the thermal protection disables the drivers. The drivers are re-enabled after the die temperature has decreased below 140 °C. TYPICAL CHARACTERISTICS 50 IDD (mA) 40 30 1 MHz 500 kHz 20 200 kHz 10 0 0 1 2 3 4 5 CLOAD (nF) IDD vs. CLOAD vs. Frequency www.vishay.com 6 Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 SiP41104 Vishay Siliconix TYPICAL WAVEFORMS PWM IN 2 V/div PWM IN 2 V/div VLX 2 V/div 50 ns/div VLX 2 V/div 50 ns/div Figure 2. PWM Signal vs. LX (Rising) Figure 3. PWM Signal vs. LX (Falling) PWM IN 5 V/div PWM IN 5 V/div HS Gate 5 V/div HS Gate 5 V/div LS Gate 5 V/div LS Gate 5 V/div 50 ns/div Figure 4. PWM Signal vs. HS Gate and LS Gate (Rising) 50 ns/div Figure 5. PWM Signal vs. HS Gate and LS Gate (Falling) Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72706. Document Number: 72706 S09-1454-Rev. E, 03-Aug-09 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1