SiSH472DN
www.vishay.com
Vishay Siliconix
N-Channel 30 V (D-S) MOSFET
FEATURES
PowerPAK® 1212-8SH
• TrenchFET® power MOSFET
D
D
8
D
7
D
6
5
• Optimized for synchronous buck operation
• 100 % Rg and UIS tested
0.9 mm
3.3
mm
1
3.3
1
2
S
3
S
4
S
G
mm
Top View
Bottom View
APPLICATIONS
D
• Notebook CPU core
- High side switch
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
RDS(on) max. () at VGS = 4.5 V
Qg typ. (nC)
ID (A)
Configuration
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
G
30
0.0089
0.0124
9.8
20 a, g
Single
N-Channel MOSFET
S
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK 1212-8
SiSH472DN-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
SYMBOL
VDS
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Pulsed drain current
ID
IDM
Continuous source-drain diode current
TC = 25 °C
TA = 25 °C
IS
Single pulse avalanche current
Avalanche energy
L = 0.1 mH
IAS
EAS
Maximum power dissipation
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
PD
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d, e
TJ, Tstg
LIMIT
30
± 20
20 g
20 g
15 b, c
12 b, c
50
20 g
3.2 b, c
21
22
28
18
3.5 b, c
2.2 b, c
-55 to +150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
Maximum junction-to-ambient b, f
t 10 s
RthJA
29
36
°C/W
3.6
4.5
Maximum junction-to-case (drain)
Steady state
RthJC
Notes
a. Base on TC = 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK® 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 81 °C/W
g. Package limited
S18-1177-Rev. A, 26-Nov-2018
Document Number: 75656
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiSH472DN
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
30
-
-
V
-
28
-
-
-5.5
-
Static
Drain-source breakdown voltage
VDS temperature coefficient
VDS/TJ
ID = 250 μA
mV/°C
VGS(th) temperature coefficient
VGS(th)/TJ
Gate-source threshold voltage
VGS(th)
VDS = VGS, ID = 250 μA
1.2
-
2.5
V
IGSS
VDS = 0 V, VGS = ± 20 V
-
-
± 100
nA
VDS = 30 V, VGS = 0 V
-
-
1
VDS = 30 V, VGS = 0 V, TJ = 55 °C
-
-
10
VDS 5 V, VGS = 10 V
20
-
-
A
VGS = 10 V, ID = 15 A
-
0.0074
0.0089
VGS = 4.5 V, ID = 13 A
-
0.0103
0.0124
VDS = 15 V, ID = 13 A
-
49
-
-
997
-
VDS = 15 V, VGS = 0 V, f = 1 MHz
-
195
-
-
120
-
-
19.5
30
-
9.8
15
VDS = 15 V, VGS = 4.5 V, ID = 15 A
-
3.7
-
-
3.7
-
f = 1 MHz
0.2
1.2
2.4
-
19
29
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 4.5 V, Rg = 1
-
19
29
29
Gate-source leakage
Zero gate voltage drain current
IDSS
On-state drain current a
ID(on)
Drain-source on-state resistance a
RDS(on)
Forward transconductance a
gfs
μA
S
Dynamic b
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge
Qg
Gate-source charge
Qgs
Gate-drain charge
Qgd
Gate resistance
Rg
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDS = 15 V, VGS = 10 V, ID = 15 A
td(on)
tr
td(off)
-
19
tf
-
13
20
td(on)
-
9
18
tr
td(off)
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 10 V, Rg = 1
tf
-
9
18
-
18
27
-
8
15
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulse diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Reverse recovery fall time
ta
Reverse recovery rise time
tb
TC = 25 °C
-
-
20
-
-
50
IS = 10 A
-
0.85
1.2
-
14
28
ns
IF = 10 A, di/dt = 100 A/μs,
TJ = 25 °C
-
5
10
nC
-
7
-
-
7
-
A
V
ns
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %
b. Guaranteed by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S18-1177-Rev. A, 26-Nov-2018
Document Number: 75656
2
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiSH472DN
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
50
5
4
ID - Drain Current (A)
ID - Drain Current (A)
TC = - 55 °C
VGS = 10 V thru 5 V
40
30
20
10
TC = 125 °C
2
TC = 25 °C
1
VGS = 4 V
0
0.0
3
0
0.3
0.6
0.9
1.2
VDS - Drain-to-Source Voltage (V)
0
1.5
1
2
3
VGS - Gate-to-Source Voltage (V)
Transfer Characteristics
Output Characteristics
0.015
1500
Ciss
1200
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
4
0.012
VGS = 4.5 V
0.009
VGS = 10 V
900
600
Coss
300
Crss
0
0.006
0
10
20
30
40
50
ID - Drain Current (A)
0
6
12
18
24
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
1.7
10
VDS = 8 V
RDS(on) - On-Resistance (Normalized)
VGS - Gate-to-Source Voltage (V)
ID = 15 A
8
VDS = 15 V
6
VDS = 24 V
4
2
0
0
3
6
9
12
15
Qg - Total Gate Charge (nC)
Gate Charge
S18-1177-Rev. A, 26-Nov-2018
18
21
30
VGS = 4.5 V
ID = 15 A
VGS = 10 V
1.4
1.1
0.8
0.5
- 50
- 25
0
25
50
75
100
TJ - Junction Temperature (°C)
125
150
On-Resistance vs. Junction Temperature
Document Number: 75656
3
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiSH472DN
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
0.030
RDS(on) - On-Resistance (Ω)
IS - Source Current (A)
100
10
TJ = 150 °C
TJ = 25 °C
1
0.020
TJ = 125 °C
0.010
TJ = 25 °C
0.000
0.1
0.0
0.3
0.6
0.9
VSD - Source-to-Drain Voltage (V)
1.2
2
Source-Drain Diode Forward Voltage
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
9
10
On-Resistance vs. Gate-to-Source Voltage
2.5
120
2.2
96
Power (W)
V GS(th) (V)
ID = 250 µA
1.9
1.6
1.3
1.0
- 50
72
48
24
- 25
0
25
50
75
TJ - Temperature (°C)
100
125
0
0.001
150
Threshold Voltage
0.01
0.1
Time (s)
1
10
Single Pulse Power, Junction-to-Ambient
100
Limited by RDS(on)*
100 μs
ID - Drain Current (A)
10
1 ms
10 ms
1
100 ms
1s
10 s
0.1
DC
TC = 25 °C
Single Pulse
0.01
0.1
BVDSS Limited
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
S18-1177-Rev. A, 26-Nov-2018
Document Number: 75656
4
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiSH472DN
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
50
ID - Drain Current (A)
40
30
Package Limited
20
10
0
0
25
50
75
100
TC - Case Temperature (°C)
125
150
35
2.0
28
1.6
21
1.2
Power (W)
Power (W)
Current Derating a
14
7
0.8
0.4
0
0.0
0
25
50
75
100
TC - Case Temperature (°C)
125
Power Derating, Junction-to-Case
150
0
25
50
75
100
125
TA - Ambient Temperature (°C)
150
Power Derating, Junction-to-Ambient
Note
a. The power dissipation PD is based on TJ max = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit.
S18-1177-Rev. A, 26-Nov-2018
Document Number: 75656
5
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiSH472DN
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
0.02
t2
1. Duty Cycle, D =
Single Pulse
3. TJM - TA = PDMZthJA(t)
t1
t2
2. Per Unit Base = RthJA = 81 °C/W
4. Surface Mounted
0.01
10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
Single Pulse
0.01
10 -4
10 -3
10 -2
10 -1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?75656.
S18-1177-Rev. A, 26-Nov-2018
Document Number: 75656
6
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
PowerPAK® SO-8, (Single/Dual)
L
H
E2
K
E4
θ
D4
W
1
M
1
Z
2
D5
D2
e
2
D1
D
2
D
3
4
θ
4
b
3
L1
E3
θ
A1
Backside View of Single Pad
H
K
E2
E4
L
1
D1
D5
2
D2
Detail Z
K1
2
E1
E
D3 (2x) D4
c
A
θ
3
4
Notes
1. Inch will govern.
2 Dimensions exclusive of mold gate burrs.
3. Dimensions exclusive of mold flash and cutting burrs.
DIM.
A
A1
b
c
D
D1
D2
D3
D4
D5
E
E1
E2
E3
E4
e
K
K1
H
L
L1
W
M
b
D2
E3
Backside View of Dual Pad
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
0.97
1.04
0.41
0.28
5.15
4.90
3.76
1.50
0.57 typ.
3.98 typ.
6.15
5.89
3.66
3.78
0.75 typ.
1.27 BSC
1.27 typ.
0.61
0.61
0.13
0.25
0.125 typ.
1.12
0.05
0.51
0.33
5.26
5.00
3.91
1.68
0.038
0
0.013
0.009
0.199
0.189
0.140
0.052
0.044
0.002
0.020
0.013
0.207
0.197
0.154
0.066
6.25
5.99
3.84
3.91
0.238
0.228
0.137
0.145
0.71
0.71
0.20
12°
0.36
0.022
0.020
0.020
0.002
0°
0.006
0.041
0.016
0.011
0.203
0.193
0.148
0.059
0.0225 typ.
0.157 typ.
0.242
0.232
0.144
0.149
0.030 typ.
0.050 BSC
0.050 typ.
0.024
0.024
0.005
0.010
0.005 typ.
0.33
0.23
5.05
4.80
3.56
1.32
6.05
5.79
3.48
3.68
0.56
0.51
0.51
0.06
0°
0.15
0.246
0.236
0.151
0.154
0.028
0.028
0.008
12°
0.014
ECN: S17-0173-Rev. L, 13-Feb-17
DWG: 5881
Revison: 13-Feb-17
1
Document Number: 71655
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Disclaimer
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Revision: 09-Jul-2021
1
Document Number: 91000