SQ3419AEEV-T1_GE3

SQ3419AEEV www.vishay.com Vishay Siliconix Automotive P-Channel 40 V (D-S) 175 °C MOSFET FEATURES PRODUCT SUMMARY VDS (V) • TrenchFET® power MOSFET -40 RDS(on) (Ω) at VGS = -10 V 0.061 RDS(on) (Ω) at VGS = -4.5 V 0.093 ID (A) • AEC-Q101 qualified c • 100 % Rg and UIS tested • Typical ESD protection 800 V -6.9 Configuration • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Single Package TSOP-6 TSOP-6 Single D 6 D 5 (1, 2, 5, 6) D S 4 (3) G 1 D Top View 2 D 3 G P-Channel MOSFET (4) S Marking Code: 8W ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS -40 Gate-Source Voltage VGS ± 12 Continuous Drain Current TC = 25 °C TC = 125 °C Continuous Source Current (Diode Conduction) Pulsed Drain Current Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipation a L = 0.1 mH TC = 25 °C TC = 125 °C Operating Junction and Storage Temperature Range ID V -6.9 -4 IS -6.3 IDM -27 IAS -18 EAS 16.7 PD UNIT 5 1.6 A mJ W TJ, Tstg -55 to +175 °C SYMBOL LIMIT UNIT RthJA 110 RthJF 30 THERMAL RESISTANCE RATINGS PARAMETER Junction-to-Ambient Junction-to-Foot (Drain) PCB Mount b °C/W Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. b. When mounted on 1" square PCB (FR4 material). c. Parametric verification ongoing. S15-2284-Rev. A, 28-Sep-15 Document Number: 65332 1 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3419AEEV www.vishay.com Vishay Siliconix SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage VDS VGS = 0 V, ID = -250 μA -40 - - VGS(th) VDS = VGS, ID = -250 μA -1.5 -2.0 -2.5 Gate-Source Leakage IGSS Zero Gate Voltage Drain Current IDSS On-State Drain Current a ID(on) Drain-Source On-State Resistance a Forward Transconductance b RDS(on) gfs V VDS = 0 V, VGS = ± 12 V - - ±2 μA VDS = 0 V, VGS = ± 20 V - - ± 30 mA VGS = 0 V VDS = -40 V - - -1 VGS = 0 V VDS = -40 V, TJ = 125 °C - - -50 VGS = 0 V VDS = -40 V, TJ = 175 °C - - -150 VGS = -10 V VDS = -5 V -10 - - VGS = -10 V ID = -2.5 A - 0.048 0.061 VGS = -10 V ID = -2.5 A, TJ = 125 °C - 0.070 - VGS = -10 V ID = -2.5 A, TJ = 175 °C - 0.081 - VGS = -4.5 V ID = -2 A - 0.077 0.093 - 10 - VDS = -15 V, ID = -4 A μA A Ω S Dynamic b Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge c Gate-Source Charge c Gate-Drain Charge c Gate Resistance Turn-On Delay Time c Rise Time c Turn-Off Delay Time c Fall Time c VGS = 0 V VDS = -20 V, f = 1 MHz Qg Qgs VGS = -4.5 V VDS = -20 V, ID = -4 A Qgd Rg f = 1 MHz td(on) tr td(off) VDD = -20 V, RL = 5 Ω ID ≅ -4 A, VGEN = -10 V, Rg = 1 Ω tf Source-Drain Diode Ratings and Characteristics - 733 975 - 130 175 - 84 115 - 8.4 12.5 - 2.4 - - 4.1 - 2.6 5.3 7.9 - 9 12 pF nC Ω - 24 32 - 26 34 - 31 41 - - -27 A - -0.75 -1.1 V ns b Pulsed Current a ISM Forward Voltage VSD IF = -1.6 A, VGS = 0 V Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-2284-Rev. A, 28-Sep-15 Document Number: 65332 2 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3419AEEV www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 30 10 VGS = 10 V thru 6 V 8 ID - Drain Current (A) ID - Drain Current (A) 24 VGS = 5 V 18 12 VGS = 4 V 6 6 TC = 25 °C 4 2 VGS = 3 V TC = 125 °C TC = - 55 °C VGS = 2 V 0 0 0 2 4 6 8 0 10 2 4 6 8 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) 10 Transfer Characteristics Output Characteristics 30 15 24 12 gfs - Transconductance (S) ID - Drain Current (A) TC = - 55 °C 18 TC = 25 °C 12 6 TC = 25 °C 9 TC = 125 °C 6 3 TC = 125 °C TC = - 55 °C 0 0 0 2 4 6 8 VGS - Gate-to-Source Voltage (V) 0 10 2 4 6 ID - Drain Current (A) 10 Transconductance Transfer Characteristics 1200 0.25 1000 C - Capacitance (pF) 0.20 RDS(on) - On-Resistance (Ω) 8 0.15 VGS = 4.5 V 0.10 Ciss 800 600 400 Coss 0.05 200 VGS = 10 V Crss 0 0.00 0 6 12 18 ID - Drain Current (A) 24 On-Resistance vs. Drain Current S15-2284-Rev. A, 28-Sep-15 30 0 10 20 30 40 VDS - Drain-to-Source Voltage (V) Capacitance Document Number: 65332 3 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3419AEEV www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 1.0 ID = 4 A VDS = 20 V 5 0.7 ID = 250 μA VGS(th) Variance (V) VGS - Gate-to-Source Voltage (V) 6 4 3 2 0.4 ID = 5 mA 0.1 - 0.2 1 - 0.5 - 50 - 25 0 0 2 4 6 8 Qg - Total Gate Charge (nC) 10 0 2.0 75 100 125 150 175 100 ID = 5 A 1.7 TJ = 150 °C 10 VGS = 10 V IS - Source Current (A) RDS(on) - On-Resistance (Normalized) 50 Threshold Voltage Gate Charge 1.4 VGS = 4.5 V 1.1 0.8 TJ = 25 °C 1 0.1 0.01 0.5 - 50 - 25 0.001 0 25 50 75 100 125 150 0.0 175 0.6 1.2 1.8 2.4 3.0 TJ - Junction Temperature (°C) VSD - Source-to-Drain Voltage (V) On-Resistance vs. Junction Temperature Source Drain Diode Forward Voltage - 40 VDS - Drain-to-Source Voltage (V) 0.25 0.20 RDS(on) - On-Resistance (Ω) 25 TJ - Temperature (°C) 0.15 TJ = 150 °C 0.10 0.05 TJ = 25 °C 0.00 0 2 4 6 8 10 - 43 ID = 1 mA - 46 - 49 - 52 - 55 - 50 - 25 0 25 50 75 100 125 150 175 VGS - Gate-to-Source Voltage (V) TJ - Junction Temperature (°C) On-Resistance vs. Gate-to-Source Voltage Drain Source Breakdown vs. Junction Temperature S15-2284-Rev. A, 28-Sep-15 Document Number: 65332 4 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3419AEEV www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 100 IDM Limited 100 µs ID - Drain Current (A) 10 1 ms 1 10 ms Limited by RDS(on)* 0.1 TC = 25 °C Single Pulse BVDSS Limited 0.01 0.01 0.1 1 10 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified 100 ms 1 s, 10 s, DC 100 Safe Operating Area 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.05 PDM 0.1 t1 t2 1. Duty Cycle, D = 0.02 t1 t2 2. Per Unit Base = RthJA = 110 °C/W 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient S15-2284-Rev. A, 28-Sep-15 Document Number: 65332 5 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ3419AEEV www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Foot Note • The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C) - Normalized Transient Thermal Impedance Junction-to-Case (25 °C) are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65332. S15-2284-Rev. A, 28-Sep-15 Document Number: 65332 6 For technical questions, contact: automostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TSOP: 5/6−LEAD JEDEC Part Number: MO-193C e1 e1 5 4 6 E1 1 2 5 4 E E1 1 3 2 3 -B- e b E -B- e 0.15 M C B A 5-LEAD TSOP b 0.15 M C B A 6-LEAD TSOP 4x 1 -A- D 0.17 Ref c R R A2 A L2 Gauge Plane Seating Plane Seating Plane 0.08 C L A1 -C- (L1) 4x 1 MILLIMETERS Dim A A1 A2 b c D E E1 e e1 L L1 L2 R Min Nom Max Min Nom Max 0.91 - 1.10 0.036 - 0.043 0.01 - 0.10 0.0004 - 0.004 0.90 - 1.00 0.035 0.038 0.039 0.30 0.32 0.45 0.012 0.013 0.018 0.10 0.15 0.20 0.004 0.006 0.008 2.95 3.05 3.10 0.116 0.120 0.122 2.70 2.85 2.98 0.106 0.112 0.117 1.55 1.65 1.70 0.061 0.065 0.067 0.95 BSC 0.0374 BSC 1.80 1.90 2.00 0.071 0.075 0.079 0.32 - 0.50 0.012 - 0.020 0.60 Ref 0.024 Ref 0.25 BSC 0.010 BSC 0.10 - - 0.004 - - 0 4 8 0 4 8 7 Nom 1 ECN: C-06593-Rev. I, 18-Dec-06 DWG: 5540 Document Number: 71200 18-Dec-06 INCHES 7 Nom www.vishay.com 1 AN823 Vishay Siliconix Mounting LITTLE FOOTR TSOP-6 Power MOSFETs Surface mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages. The basis of the pad design for surface mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. In the case of the TSOP-6 package, the electrical connections are very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. REFLOW SOLDERING Vishay Siliconix surface-mount packages meet solder reflow reliability requirements. Devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures 2 and 3. Figure 1 shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins 1,2,5, and 6. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a “T” to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose. 0.167 4.25 0.074 1.875 0.014 0.35 0.122 3.1 0.026 0.65 0.049 1.25 0.049 1.25 0.010 0.25 FIGURE 1. Recommended Copper Spreading Footprint Document Number: 71743 27-Feb-04 Ramp-Up Rate +6_C/Second Maximum Temperature @ 155 " 15_C 120 Seconds Maximum Temperature Above 180_C 70 − 180 Seconds Maximum Temperature 240 +5/−0_C Time at Maximum Temperature 20 − 40 Seconds Ramp-Down Rate +6_C/Second Maximum FIGURE 2. Solder Reflow Temperature Profile www.vishay.com 1 AN823 Vishay Siliconix 10 s (max) 255 − 260_C 1X4_C/s (max) 3-6_C/s (max) 217_C 140 − 170_C 60 s (max) 60-120 s (min) Pre-Heating Zone 3_C/s (max) Reflow Zone Maximum peak temperature at 240_C is allowed. FIGURE 3. Solder Reflow Temperature and Time Durations THERMAL PERFORMANCE TABLE 1. Equivalent Steady State Performance—TSOP-6 Thermal Resistance Rqjf 30_C/W On-Resistance vs. Junction Temperature 1.6 VGS = 4.5 V ID = 6.1 A 1.4 rDS(on) − On-Resiistance (Normalized) A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, Rqjc, or the junction-to-foot thermal resistance, Rqjf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. Table 1 shows the thermal performance of the TSOP-6. 1.2 1.0 0.8 0.6 −50 SYSTEM AND ELECTRICAL IMPACT OF TSOP-6 −25 0 25 50 75 100 125 150 TJ − Junction Temperature (_C) FIGURE 4. Si3434DV In any design, one must take into account the change in MOSFET rDS(on) with temperature (Figure 4). www.vishay.com 2 Document Number: 71743 27-Feb-04 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR TSOP-6 0.099 0.039 0.020 0.019 (1.001) (0.508) (0.493) 0.064 (1.626) 0.028 (0.699) (3.023) 0.119 (2.510) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 26 Document Number: 72610 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 01-Jan-2021 1 Document Number: 91000