SQS840CENW
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Vishay Siliconix
Automotive N-Channel 40 V (D-S) 175 °C MOSFET
FEATURES
PowerPAK® 1212-8W Single
D
5
3.
D
6
D
7
• TrenchFET® power MOSFET
D
8
• AEC-Q101 qualified
• 100 % Rg and UIS tested
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
3
m
m
1
3.3
mm
Top View
4
G
Bottom View
3
S
2
S
1
S
D
Marking code: Q041
G
PRODUCT SUMMARY
VDS (V)
40
RDS(on) () at VGS = 10 V
0.020
RDS(on) () at VGS = 4.5 V
0.022
ID (A)
Configuration
Package
S
12
N-Channel MOSFET
Single
PowerPAK 1212-8W
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
40
Gate-source voltage
VGS
± 20
Continuous drain current a
TC = 25 °C
TC = 125 °C
Continuous source current (diode conduction) a
Pulsed drain current b
Single pulse avalanche current
Single pulse avalanche energy
Maximum power dissipation b
L = 0.1 mH
TC = 25 °C
TC = 125 °C
Operating junction and storage temperature range
ID
12
IS
12
24
IAS
19
EAS
18
TJ, Tstg
Soldering recommendations (peak temperature) e, f
V
12
IDM
PD
UNIT
33
11
-55 to +175
260
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
Junction-to-ambient
Junction-to-case (drain)
PCB mount c
SYMBOL
LIMIT
RthJA
81
RthJC
4.5
UNIT
°C/W
Notes
a. Package limited
b. Pulse test; pulse width 300 μs, duty cycle 2 %
c. When mounted on 1" square PCB (FR4 material)
d. Parametric verification ongoing
e. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8W is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
f. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
S19-0275-Rev. A, 25-Mar-2019
Document Number: 77821
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SPECIFICATIONS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
Gate-source threshold voltage
Gate-source leakage
VDS
VGS = 0, ID = 250 μA
40
-
-
VGS(th)
VDS = VGS, ID = 250 μA
1.5
2.0
2.5
VDS = 0 V, VGS = ± 20 V
IGSS
-
-
± 100
VGS = 0 V
VDS = 40 V
-
-
1
-
-
50
150
Zero gate voltage drain current
IDSS
VGS = 0 V
VDS = 40 V, TJ = 125 °C
VGS = 0 V
VDS = 40 V, TJ = 175 °C
-
-
On-state drain current a
ID(on)
VGS = 10 V
VDS 5 V
20
-
-
VGS = 10 V
ID = 7.5 A
-
0.014
0.020
VGS = 10 V
ID = 7.5 A, TJ = 125 °C
-
-
0.034
VGS = 10 V
ID = 7.5 A, TJ = 175 °C
-
-
0.042
VGS = 4.5 V
ID = 6.5 A
-
0.015
0.022
-
62
-
-
825
1031
-
131
164
-
58
73
Drain-source on-state resistance a
Forward transconductance b
RDS(on)
gfs
VDS = 15 V, ID = 10 A
V
nA
μA
A
S
Dynamic b
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Total gate charge c
Qg
Gate-source charge c
Qgs
Gate-drain charge c
Qgd
Gate resistance
Turn-on delay time c
Rise time c
Turn-off delay time c
Fall time c
Rg
VGS = 0 V
VGS = 10 V
VDS = 20 V, f = 1 MHz
VDS = 20 V, ID = 4 A
f = 1 MHz
td(on)
tr
td(off)
VDD = 20 V, RL = 5
ID 4 A, VGEN = 10 V, Rg = 1
tf
-
15
22.5
-
2.8
-
-
2.9
-
1.6
3.3
5
-
6.5
9.8
-
2.7
4
-
26
40
-
4.3
6.5
pF
nC
ns
Source-Drain Diode Ratings and Characteristic b
Pulsed current a
ISM
Forward voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
IF = 4.8 A, VGS = 0 V
IF = 5 A, di/dt = 100 A/μs
-
-
48
-
0.82
1.2
V
-
18
36
ns
-
12
24
nC
Reverse recovery fall time
ta
-
11
-
Reverse recovery rise time
tb
-
6
-
IRM(REC)
-
-1.3
-3
Body diode peak reverse recovery current
A
ns
A
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %
b. Guaranteed by design, not subject to production testing
c. Independent of operating temperature
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S19-0275-Rev. A, 25-Mar-2019
Document Number: 77821
2
For technical questions, contact: automostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQS840CENW
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Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
Axis Title
Axis Title
60
40
10000
10000
VGS = 10 V thru 4 V
VGS = 3 V
24
100
12
1000
24
1st line
2nd line
1000
36
2nd line
ID - Drain Current (A)
32
1st line
2nd line
2nd line
ID - Drain Current (A)
48
TC = 125 °C
16
100
TC = 25 °C
8
TC = -55 °C
0
0
10
0
2
4
6
8
10
10
0
2
4
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
Axis Title
Axis Title
TC = -55 °C
10000
16
TC = 125 °C
22
100
11
1000
12
1st line
2nd line
1000
TC = 25 °C
33
2nd line
ID - Drain Current (A)
44
10
20
10000
1st line
2nd line
TC = 25 °C
8
100
4
TC = 125 °C
0
0
6
12
18
24
30
10
0
1
3
4
VGS - Gate-to-Source Voltage (V)
Transconductance
Transfer Characteristics
Axis Title
Axis Title
1st line
2nd line
1000
Coss
100
100
Crss
10
10
16
24
32
40
2nd line
RDS(on) - On-Resistance (Ω)
Ciss
1000
10000
0.032
1000
0.024
VGS = 4.5 V
0.016
100
VGS = 10 V
0.008
0
10
0
6
12
18
24
VDS - Drain-to-Source Voltage (V)
ID - Drain Current (A)
Capacitance
On-Resistance vs. Drain Current
S19-0275-Rev. A, 25-Mar-2019
5
0.040
10000
8
2
ID - Drain Current (A)
10 000
0
TC = -55 °C
0
10
1st line
2nd line
2nd line
gfs - Transconductance (S)
8
VDS - Drain-to-Source Voltage (V)
55
2nd line
C - Capacitance (pF)
6
30
Document Number: 77821
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TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
Axis Title
Axis Title
100
10000
10000
ID = 16.4 A,
VDS = 20 V
6
4
100
10
TJ = 150 °C
1
TJ = 25 °C
100
0.1
2
0
0.01
10
0
4
8
12
16
10
0
20
0.3
0.6
0.9
1.2
1.5
Qg - Total Gate Charge (nC)
VSD - Source-to-Drain Voltage (V)
Gate Charge
Source Drain Diode Forward Voltage
Axis Title
Axis Title
2.2
0.5
10000
10000
ID = 5 A
1000
VGS = 7.5 V
1.3
1.0
100
0.1
1000
1st line
2nd line
VGS = 10 V
1.6
2nd line
VGS(th) - Variance (V)
1.9
1st line
2nd line
2nd line
RDS(on) - On-Resistance (Normalized)
1000
1st line
2nd line
1000
2nd line
IS - Source Current (A)
8
1st line
2nd line
2nd line
VGS - Gate-to-Source Voltage (V)
10
ID = 5 mA
-0.3
ID = 250 μA
100
-0.7
0.7
0.4
-1.1
10
-50 -25
0
25
50
75 100 125 150 175
10
-50 -25
0
25
50
75 100 125 150 175
TJ - Junction Temperature (°C)
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Threshold Voltage
Axis Title
Axis Title
0.05
54
10000
10000
0.03
TJ = 150 °C
0.02
TJ = 125 °C
0.01
100
TJ = 25 °C
0
10
0
2
4
6
8
10
52
50
1000
1st line
2nd line
1000
2nd line
VDS - Drain-to-Source Voltage (V)
0.04
1st line
2nd line
2nd line
RDS(on) - On-Resistance (Ω)
ID = 1 mA
48
46
100
44
42
40
10
-50 -25
0
25
50
75 100 125 150 175
VGS - Gate-to-Source Voltage (V)
TJ - Junction Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Drain Source Breakdown vs. Junction Temperature
S19-0275-Rev. A, 25-Mar-2019
Document Number: 77821
4
For technical questions, contact: automostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQS840CENW
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Vishay Siliconix
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
Axis Title
10000
1000
IDM limited
100 μs
10
1000
1st line
2nd line
2nd line
ID - Drain Current (A)
100
1 ms
Limited by RDS(on) a
1
10 ms
100 ms, 1 s,
10 s, DC
100
BVDSS limited
0.1
TC = 25 °C,
single pulse
0.01
0.01
0.1
1
10
100
10
1000
VDS - Drain-to-Source Voltage (V)
Safe Operating Area
1
Normalized Effective Transient
Thermal Impedance
Duty cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty cycle, D =
0.02
2. Per unit base = R thJA = 81 °C/W
3. TJM - TA = PDMZthJA(t)
Single pulse
0.01
10-4
t1
t2
10-3
4. Surface mounted
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
Note
a. VGS > minimum VGS at which RDS(on) is specified
S19-0275-Rev. A, 25-Mar-2019
Document Number: 77821
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For technical questions, contact: automostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Vishay Siliconix
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
Normalized Effective Transient
Thermal Impedance
2
1
Duty cycle = 0.5
0.2
0.1
0.1
Single pulse
0.05
0.02
0.01
10 -4
10 -3
10 -2
Square Wave Pulse Duration (s)
10 -1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Note
• The characteristics shown in the two graphs
- Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C)
- Normalized Transient Thermal Impedance Junction-to-Case (25 °C)
are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single
pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part
mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities
can widely vary depending on actual application parameters and operating conditions
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?77821.
S19-0275-Rev. A, 25-Mar-2019
Document Number: 77821
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
PowerPAK® 1212-8W Case Outline
E2
E4
H
L
K
1
Z
2
4
5
3
4
b
6
θ
3
D5
2
D2
2
7
D1
D
8
e
1
M
θ
D4
A2
W
L1
θ
E3
Backside view of single pad
θ
c
A
A1
2
E1
E
DIM.
Detail Z
Notes
1 Inch will govern
2 Dimensions exclusive of mold gate burrs
3 Dimensions exclusive of mold flash and
cutting burrs
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.97
1.04
1.12
0.038
0.041
0.044
A1
0
-
0.05
0
-
0.002
A2
0
-
0.13
0
-
0.005
b
0.23
0.30
0.41
0.009
0.012
0.016
c
0.23
0.28
0.33
0.009
0.011
0.013
D
3.20
3.30
3.40
0.126
0.130
0.134
D1
2.95
3.05
3.15
0.116
0.120
0.124
D2
1.98
2.11
2.24
0.078
0.083
0.088
D4
0.47 typ.
D5
2.3 typ.
0.0185 typ.
0.090 typ.
E
3.20
3.30
3.40
0.126
0.130
0.134
E1
2.95
3.05
3.15
0.116
0.120
0.124
E2
1.47
1.60
1.73
0.058
0.063
0.068
E3
1.75
1.85
1.98
0.069
0.073
0.078
E4
0.34 typ.
0.013 typ.
e
0.65 BSC.
0.026 BSC
K
0.86 typ.
0.034 typ.
H
0.30
0.41
0.51
0.012
0.016
0.020
L
0.30
0.43
0.56
0.012
0.017
0.022
L1
0.06
0.13
0.20
0.002
0.005
0.008
0°
-
12°
0°
-
12°
W
0.15
0.25
0.36
0.006
0.010
0.014
M
0.125 typ.
0.005 typ.
ECN: C15-1530-Rev. B, 16-Nov-15
DWG: 6032
Revision: 16-Nov-15
Document Number: 64614
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® 1212-8 Single
0.152
(3.860)
0.039
0.068
(0.990)
(1.725)
0.010
(0.255)
(2.390)
0.094
0.088
(2.235)
0.016
(0.405)
0.026
(0.660)
0.025
0.030
(0.635)
(0.760)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Return to Index
APPLICATION NOTE
Document Number: 72597
Revision: 21-Jan-08
www.vishay.com
7
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
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parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
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Revision: 09-Jul-2021
1
Document Number: 91000