SUM60061EL-GE3

SUM60061EL www.vishay.com Vishay Siliconix P-Channel 80 V (D-S) MOSFET FEATURES TO-263 • TrenchFET® power MOSFET • Package with low thermal resistance • Maximum 175 ºC junction temperature • Low RDS(on) conduction G APPLICATIONS -80 • Battery protection RDS(on) max. (Ω) at VGS = -10 V 0.0061 • Motor drive control RDS(on) max. (Ω) at VGS = -4.5 V 0.0086 • Load switch ID (A) Configuration from • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 PRODUCT SUMMARY Qg typ. (nC) loss • 100 % Rg and UIS tested D VDS (V) power • Compatible with logic-level gate driving S Top View minimizes S G 145 -150 P-Channel MOSFET Single D ORDERING INFORMATION Package TO-263 Lead (Pb)-free and halogen-free SUM60061EL-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-source voltage VDS -80 Gate-source voltage VGS ± 20 Continuous drain current d (TJ = 175 °C) TC = 25 °C TC = 70 °C Pulsed drain current (100 μs) Avalanche current Single pulse avalanche energy a Power dissipation ID IDM L = 0.1 mH TC = 25 °C c TC = 125 °C b Operating junction and storage temperature range V -150 d -150 d -250 IAS -75 EAS 281 PD UNIT 375 125 A mJ W TJ, Tstg -55 to +175 °C SYMBOL LIMIT UNIT RthJA 40 RthJC 0.4 THERMAL RESISTANCE RATINGS PARAMETER Junction-to-ambient Junction-to-case PCB mount b °C/W Notes a. Duty cycle ≤ 1 % b. When mounted on 1" square PCB (FR4 material) c. See SOA curve for voltage derating d. Limited by package S21-0031-Rev. A, 25-Jan-2021 Document Number: 63024 1 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SUM60061EL www.vishay.com Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage Gate threshold voltage Gate-body leakage Zero gate voltage drain current On-state drain current a Drain-source on-state resistance a Forward transconductance a Dynamic VDS VGS = 0 V, ID = -10 mA -80 - - VGS(th) VDS = VGS, ID = -250 μA -1.5 - -2.5 IGSS VDS = 0 V, VGS = ± 20 V - - ± 100 VDS = -80 V, VGS = 0 V - - -1 IDSS VDS = -80 V, VGS = 0 V, TJ = 125 °C - - -50 VDS = -80 V, VGS = 0 V, TJ = 175 °C - - -250 VDS ≤ -5 V, VGS = -10 V -30 - - VGS = -10 V, ID = -20 A - 0.0051 0.0061 VGS = -4.5 V, ID = -15 A - 0.0069 0.0086 VDS = -15 V, ID = -15 A - 80 - - 9600 - - 3300 - - 110 - ID(on) RDS(on) gfs V nA μA A Ω S b Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Crss Total gate charge c Qg Gate-source charge c Qgs VGS = 0 V, VDS = -40 V, f = 1 MHz pF - 145 218 VDS = -40 V, VGS = -10 V, ID = -110 A - 34 - - 16 - f = 1 MHz 0.46 2.3 4.6 - 25 35 - 20 30 - 90 140 - 20 30 IS - - -150 Pulsed current ISM - - -250 Forward voltage a VSD - -0.8 -1.5 V - 90 135 ns - -2.8 -4.2 A - 145 218 nC Gate-drain charge c Gate resistance Turn-on delay time c Rise time c Turn-off delay time c Fall time c Qgd Rg td(on) tr td(off) VDD = -40 V, RL = 0.71 Ω ID ≅ -20 A, VGEN = -10 V, Rg = 1 Ω tf nC Ω ns Drain-Source Body Diode Characteristics (TC = 25 °C b) Continuous current Reverse recovery time Peak reverse recovery charge Reverse recovery charge IF = -10 A, VGS = 0 V trr IRM(REC) Qrr IF = -20 A, dI/dt = 100 A/μs A Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 % b. Guaranteed by design, not subject to production testing c. Independent of operating temperature Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S21-0031-Rev. A, 25-Jan-2021 Document Number: 63024 2 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SUM60061EL www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) Axis Title Axis Title 10000 200 10000 200 1000 1st line 2nd line VGS = 4 V 100 100 50 150 1000 1st line 2nd line 2nd line ID - Drain Current (A) 150 2nd line ID - Drain Current (A) VGS = 10 V thru 5 V 100 TC = 125 °C 100 50 TC = 25 °C VGS = 3 V 10 0 0 1.0 2.0 3.0 TC = -55 °C 0 4.0 0 1 2 3 10 4 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 5 Axis Title Axis Title 10000 200 10000 0.02 100 1000 TC = 125 °C 100 50 0.015 1000 0.01 VGS = 4.5 V 0 25 50 75 10 0 0 100 50 ID - Drain Current (A) Axis Title 10000 Ciss 1000 Crss 100 10 10 60 80 VDS = 20 V, 40 V, 64 V 8 1000 6 1st line 2nd line Coss 1000 2nd line VGS - Gate-to-Source Voltage (V) ID = 20 A 1st line 2nd line 2nd line C - Capacitance (pF) 10 000 40 4 100 2 10 0 0 30 60 90 120 VDS - Drain-to-Source Voltage (V) Qg - Total Gate Charge (nC) Capacitance Gate Charge S21-0031-Rev. A, 25-Jan-2021 200 10 10000 20 150 On-Resistance vs. Drain Current Axis Title 0 100 ID - Drain Current (A) Transconductance 100 100 VGS = 10 V 0.005 10 0 1st line 2nd line TC = 25 °C 2nd line RDS(on) - On-Resistance (Ω) 150 1st line 2nd line 2nd line gfs - Transconductance (S) TC = -55 °C 150 Document Number: 63024 3 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SUM60061EL www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) Axis Title Axis Title 10000 10000 2.2 VGS = 10 V, 20 A ID = 250 μA 1.2 VGS = 4.5 V, 15 A 1000 1.6 1st line 2nd line 1000 2nd line VGS(th) (V) 1.9 1.5 1st line 2nd line 2nd line RDS(on) - On-Resistance (Normalized) 1.8 1.3 100 100 0.9 1.0 -50 -25 0 25 50 10 0.7 10 0.6 75 100 125 150 175 -50 -25 0 25 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature Threshold Voltage Axis Title Axis Title 10000 10000 98 ID = 20 A 1000 0.01 TJ = 125 °C 100 TJ = 25 °C 0.005 10 0 2 4 6 8 95 1000 1st line 2nd line 0.015 2nd line VDS - Drain-to-Source Voltage (V) ID = 10 mA 1st line 2nd line 2nd line RDS(on) - On-Resistance (Ω) 75 100 125 150 175 TJ - Junction Temperature (°C) 0.02 92 100 89 10 86 10 -50 -25 0 25 50 75 100 125 150 175 VGS - Gate-to-Source Voltage (V) TJ - Junction Temperature (°C) On-Resistance vs. Gate-to-Source Voltage Drain Source Breakdown vs. Junction Temperature Axis Title 100 10 1000 1st line 2nd line TJ = 150 °C TJ = 25 °C 1 100 0.1 0.01 10 0 0.2 0.4 0.6 0.8 1.0 1.2 VSD - Source-to-Drain Voltage (V) Source Drain Diode Forward Voltage S21-0031-Rev. A, 25-Jan-2021 2nd line IDAV - Drain Current Avalanche (A) 10000 100 2nd line IS - Source Current (A) 50 150 °C 10 0.00001 0.0001 25 °C 0.001 0.01 t - Time (s) Avalanche Current vs. Time Document Number: 63024 4 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SUM60061EL www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) Axis Title 1000 10000 100 1000 100 μs Limited by RDS(on) a 1 ms 10 TC = 25 °C, single pulse BVDSS limited 1 10 100 DC, 10s, 1s, 10ms, 100ms 1 0.1 1st line 2nd line 2nd line ID - Drain Current (A) IDM limited 100 10 1000 VDS - Drain-to-Source Voltage (V) Safe Operating Area Note a. VGS > minimum VGS at which RDS(on) is specified 1 Normalized Effective Transient Thermal Impedance Duty cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 0.05 t1 0.02 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 62.5 °C/W Single pulse 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted 0.01 10 -4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63024. S21-0031-Rev. A, 25-Jan-2021 Document Number: 63024 5 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-263 (D2PAK): 3-LEAD -B- L2 6 E1 K D4 -A- c2 D2 D3 A E L3 L D D1 E3 A A b2 b e c Detail “A” E2 0.010 M A M 2 PL 0° L4 -5 ° INCHES L1 DETAIL A (ROTATED 90°) c* c c1 c1 M b b1 SECTION A-A MIN. MAX. MIN. MAX. A 0.160 0.190 4.064 4.826 b 0.020 0.039 0.508 0.990 b1 0.020 0.035 0.508 0.889 1.397 b2 0.045 0.055 1.143 Thin lead 0.013 0.018 0.330 0.457 Thick lead 0.023 0.028 0.584 0.711 Thin lead 0.013 0.017 0.330 0.431 Thick lead 0.023 0.027 0.584 0.685 c2 0.045 0.055 1.143 1.397 D 0.340 0.380 8.636 9.652 D1 0.220 0.240 5.588 6.096 D2 0.038 0.042 0.965 1.067 D3 0.045 0.055 1.143 1.397 D4 0.044 0.052 1.118 1.321 E 0.380 0.410 9.652 10.414 E1 0.245 - 6.223 - E2 0.355 0.375 9.017 9.525 E3 0.072 0.078 1.829 1.981 e Notes 1. Plane B includes maximum features of heat sink tab and plastic. 2. No more than 25 % of L1 can fall above seating plane by max. 8 mils. 3. Pin-to-pin coplanarity max. 4 mils. 4. *: Thin lead is for SUB, SYB. Thick lead is for SUM, SYM, SQM. 5. Use inches as the primary measurement. 6. This feature is for thick lead. Revison: 30-Sep-13 MILLIMETERS DIM. 0.100 BSC 2.54 BSC K 0.045 0.055 1.143 1.397 L 0.575 0.625 14.605 15.875 L1 0.090 0.110 2.286 2.794 L2 0.040 0.055 1.016 1.397 L3 0.050 0.070 1.270 1.778 L4 M 0.010 BSC - 0.254 BSC 0.002 - 0.050 ECN: T13-0707-Rev. K, 30-Sep-13 DWG: 5843 1 Document Number: 71198 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 AN826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: 73397 11-Apr-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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ALL RIGHTS RESERVED Revision: 09-Jul-2021 1 Document Number: 91000