Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
Low Profile Fast Infrared Transceiver (FIR, 4 Mbit/s)
for IrDA® Applications
FEATURES
• Lowest profile: 1.9 mm
• Smallest footprint: 6 mm x 3.05 mm
• Surface mount package
• IrDA transmit distance: 50 cm typical
• Best remote control distance: 6.5 m on-axis
20208
• Fast data rates: from 9.6 kbit/s to 4 Mbit/s
• Low shutdown current: 0.01 μA
DESCRIPTION
• Operating voltage: 2.4 V to 3.6 V
The TFBS6711 is the smallest FIR transceiver available. It is
a low profile and low-power IrDA transceiver. Compliant to
IrDA’s physical layer specification, the TFBS6711 supports
data transmission rates from 9.6 kbit/s to 4 Mbit/s with a
typical link distance of 50 cm. It also enables mobile phones
and PDAs to function as universal remote controls for
televisions, DVDs and other home appliances. The
TFBS6711 emitter covers a range of 6.5 m with common
remote control receivers. Integrated within the transceiver
module is a pin photodiode, an infrared emitter, and a
low-power control IC. The TFBS6711 can be completely
shutdown, achieving very low power consumption. The
TFBS6711 has an I/O voltage related to the supply voltage.
• Reduced pin count: 6 pins
• I/O voltage equal to the supply voltage
• Pin compatibility: TFBS4711
• Integrated EMI protection - no external shield required
• IEC 60825-1 class 1, eye safe
• Qualified for lead (Pb)-free and Sn/Pb processing
• Compliant to IrDA physical layer specification
• Split power supply, transmitter and receiver can be
operated from two power supplies with relaxed
requirements saving costs, US patent no. 6,157,476
• Qualified for lead (Pb)-free and Sn/Pb processing (MSL4)
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• High-speed data
communication
transfer
using
infrared
wireless
• Mobile phones
• Camera phones
• PDAs
• MP3 players
• Digital cameras
• IrDA adapters or dongles
PRODUCT SUMMARY
PART NUMBER
TFBS6711
DATA RATE
(kbit/s)
DIMENSIONS
HxLxW
(mm x mm x mm)
LINK DISTANCE
(m)
OPERATING
VOLTAGE
(V)
IDLE SUPPLY
CURRENT
(mA)
4000
1.9 x 6 x 3.1
0 to 0.3
2.4 to 3.6
1.9
PARTS TABLE
PART NUMBER
DESCRIPTION AND REMARKS
TFBS6711-TR1
Oriented in carrier tape for side view surface mounting
QTY/REEL OR TUBE
1000 pcs
TFBS6711-TR3
Oriented in carrier tape for side view surface mounting
2500 pcs
TFBS6711-TT1
Oriented in carrier tape for top view surface mounting
1000 pcs
TFBS6711-TT3
Oriented in carrier tape for top view surface mounting
2500 pcs
Rev. 2.0, 06-Sep-13
Document Number: 84676
1
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
FUNCTIONAL BLOCK DIAGRAM
VCC1
Tri-state
driver
Amplifier
RXD
Comparator
VCC2
SD
Logic
Controlled
driver
and
Control
TXD
GND
19298
Fig. 1 - Functional Block Diagramm
PIN DESCTIPTION
PIN
NUMBER
FUNCTION
DESCRIPTION
1
VCC2, IRED
anode
IRED anode to be externally connected to VCC2. For higher voltages as
3.6 V an external resistor might be necessary for reducing the internal power
dissipation. See derating curves. This pin is allowed to be supplied from an
uncontrolled power supply separated from the controlled VCC1 - supply
2
TXD
3
I/O
ACTIVE
Transmit data input
I
High
RXD
Received data output, push-pull CMOS driver output capable of driving a
standard CMOS load. No external pull-up or pull-down resistor is required.
Floating with a weak pull-up of 500 k (typ.) in shutdown mode. The RXD output
echos the TXD input during transmission.
O
Low
4
SD
Shutdown, also used for dynamic mode switching
I
High
5
VCC1
Supply voltage
6
GND
Ground
PINOUT
TFBS6711
Weight: 50 mg
Definitions:
In the Vishay transceiver datasheets the following
nomenclature is used for defining the IrDA operating modes:
SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial
infrared standard with the physical layer version IrPhy 1.0
MIR: 576 kbit/s to 1152 kbit/s
FIR: 4 Mbit/s
VFIR: 16 Mbit/s
PIN 1
Fig. 2 - Pinning
Rev. 2.0, 06-Sep-13
19428
IrDA, the infrared data association, implemented MIR and
FIR with IrPHY 1.1, followed by IrPhY 1.2, adding the SIR
low power standard. IrPhY 1.3 extended the low power
option to MIR and FIR and VFIR was added with IrPhY 1.4.
A new version of the standard in any case obsoletes the
former version.
Document Number: 84676
2
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
TEST CONDITIONS
SYMBOL
MIN.
Supply voltage range,
transceiver
0 V < VCC2 < 6 V
VCC1
Supply voltage range,
transmitter
0 V < VCC1 < 6 V
VCC2
Input currents
TYP.
MAX.
UNIT
- 0.5
6
V
- 0.5
6.5
V
10
mA
For all pins, except IRED anode
pin
Output sinking current
25
mA
Power dissipation
PD
500
mW
Junction temperature
TJ
125
°C
Ambient temperature range
(operating)
Tamb
- 25
+ 85
°C
Storage temperature range
Tstg
- 25
+ 85
°C
260
°C
Soldering temperature (1)
Average output current
Repetitive pulse output current
< 90 μs, ton < 20 %
IRED anode voltage
Voltage at all inputs and
outputs
VIN > VCC1 is allowed
IIRED (DC)
125
mA
IIRED (RP)
600
mA
IIREDA
- 0.5
6.5
V
VIN
- 0.5
5.5
V
Notes
• Reference point pin 8 (ground) unless otherwise noted.
Typical values are for design aid only, not guaranteed nor subject to production testing.
(1) Sn/lead (Pb)-free soldering. The product passed Vishay’s standard convection reflow profile soldering test.
EYE SAFETY INFORMATION
STANDARD
CLASSIFICATION
IEC/EN 60825-1 (2007-03), DIN EN 60825-1 (2008-05) “SAFETY OF LASER PRODUCTS Part 1: equipment classification and requirements”, simplified method
Class 1
IEC 62471 (2006), CIE S009 (2002) “Photobiological Safety of Lamps and Lamp Systems”
Exempt
DIRECTIVE 2006/25/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 5th April 2006
on the minimum health and safety requirements regarding the exposure of workers to risks arising from
physical agents (artificial optical radiation) (19th individual directive within the meaning of article 16(1)
of directive 89/391/EEC)
Exempt
Note
• Vishay transceivers operating inside the absolute maximum ratings are classified as eye safe according the above table.
Rev. 2.0, 06-Sep-13
Document Number: 84676
3
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS
PARAMETERS
TEST CONDITIONS
SYMBOL
MIN.
VCC
2.4
TYP.
MAX.
UNIT
3.6
V
TRANSCEIVER
Supply voltage
Dynamic supply current
Receive mode only.
In transmit mode, add additional 85 mA (typ.) for IRED current.
Add RXD output current depending on RXD load.
SD = low, SIR mode
ICC
1.7
3
mA
SD = low, MIR/FIR mode
ICC
1.9
3.3
mA
Shutdown supply current
SD = high
T = 25 °C, not ambient light
sensitive, detector is disabled in
shutdown mode
ISD
1
μA
Shutdown supply current
SD = high
T = 85 °C, not ambient light
sensitive
ISD
5
μA
+ 85
°C
0.4
V
Operating temperature range
TA
Output voltage low
IOL = 1 mA
CLOAD = 15 pF
VOL
Output voltage high
IOH = - 250 μA
CLOAD = 15 pF
VOH
Internal RXD pull-up
- 25
0.9 x VCC
V
RRXD
400
Input voltage low (TXD, SD)
VIL
- 0.5
0.5
V
Input voltage high (TXD, SD)
VIH
VCC - 0.5
VCC + 0.5
V
Input leakage current (TXD, SD) (1)
IICH
-1
+1
μA
5
pF
Input capacitance (TXD, SD)
500
600
0.05
CI
k
Notes
• Tamb = 25 °C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for design aid only, not guaranteed nor subject to production
testing.
(1) The typical threshold level is 0.5 x V
CC (VCC = 3 V). It is recommended to use the specified min./max. values to avoid increased
operating/shutdown current.
OPTOELECTRONIC CHARACTERISTICS
PARAMETER
TEST CONDITIONS
SYMBOL
Minimum irradiance Ee in
angular range (2)
9.6 kbit/s to 115.2 kbit/s
= 850 nm to 900 nm, VCC = 2.4 V
Minimum irradiance Ee in
angular range MIR mode
MIN.
TYP.
MAX.
UNIT
Ee
50
(5)
80
(8)
mW/m2
(μW/cm2)
1.152 Mbit/s
= 850 nm to 900 nm, VCC = 2.4 V
Ee
100
(10)
Minimum irradiance Ee in
angular range FIR mode
4 Mbit/s
= 850 nm to 900 nm, VCC = 2.4 V
Ee
120
(12)
Maximum irradiance Ee in
angular range (3)
= 850 nm to 900 nm
Ee
5
(500)
RECEIVER
No detection receiver input
irradiance (fluorescent light
noise suppression)
Ee
4
(0.4)
mW/m2
(μW/cm2)
200
(20)
mW/m2
(μW/cm2)
kW/m2
(mW/cm2)
mW/m2
(μW/cm2)
Rise time of output signal
10 % to 90 %, CL = 15 pF
tr (RXD)
10
50
ns
Fall time of output signal
90 % to 10 %, CL = 15 pF
tf (RXD)
10
50
ns
RXD pulse width of output
signal, 50 %, SIR mode
Input pulse length
1.4 μs < PWopt < 25 μs
tPW
1.4
1.8
2.6
μs
RXD pulse width of output
signal, 50 %, MIR mode
Input pulse length
PWopt = 217 ns, 1.152 Mbit/s
tPW
110
250
270
ns
RXD pulse width of output
signal, 50 %, FIR mode
Input pulse length
PWopt = 125 ns, 4 Mbit/s
tPW
110
140
ns
Rev. 2.0, 06-Sep-13
Document Number: 84676
4
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
OPTOELECTRONIC CHARACTERISTICS
PARAMETER
TEST CONDITIONS
SYMBOL
MIN.
Input pulse length
PWopt = 250 ns, 4 Mbit/s
tPW
225
TYP.
MAX.
UNIT
275
ns
20
40
350
ns
500
μs
100
μs
600
mA
1
μA
RECEIVER
RXD pulse width of output
signal, 50 %, FIR mode
RXD output jitter, leading edge
Input irradiance = 150 mW/m2,
4 Mbit/s
1.152 Mbit/s
115.2 kbit/s
Receiver start up time
After completion of shutdown
programming sequence
power on delay
Latency (1)
tL
TRANSMITTER
IRED operating current,
switched current control
For 3.3 V operation no external resistor is
needed
ID
330
Output leakage IRED current
VCC = VIRED = 3.3 V, TXD = low
IIRED
-1
Output radiant intensity,
see figure 3, recommended
application circuit
VCC = VIRED = 3.3 V, a = 0°
TXD = high, SD = low, R1 = 1
Ie
45
115
300
mW/sr
Output radiant intensity,
see figure 3, recommended
application circuit
VCC = VIRED = 3.3 V, a = 0°, 15°
TXD = high, SD = low, R1 = 1
Ie
25
75
300
mW/sr
VCC1 = 3.6 V, a = 0°, 15°
TXD = low or SD = high
(receiver is inactive as long as SD = high)
Ie
0.04
mW/sr
Output radiant intensity
Output radiant intensity, angle
of half intensity
a
Optical overshoot
± 24
deg
p
880
900
nm
tropt,
tfopt
10
40
ns
Input pulse width 217 ns,
1.152 Mbit/s
topt
200
217
230
ns
Input pulse width 125 ns, 4 Mbit/s
topt
116
125
134
ns
Input pulse width 250 ns, 4 Mbit/s
topt
241
250
259
ns
Input pulse width t < 80 μs
Input pulse width t 3 80 μs
topt
topt
Peak - emission wavelength
Optical rise time,
optical fall time
Optical output pulse duration
440
t
20
85
25
μs
%
Notes
• For more definitions see the document “Symbols and Terminology” on the Vishay website.
• Tamb = 25 °C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for design aid only, not guaranteed nor subject to production
testing. All timing data measured with 4 Mbit/s are measured using the IrDA FIR transmission header. The data given here are valid 5 μs after
starting the preamble.
(1) IrDA latency definition: receiver latency allowance (milliseconds or microseconds) is the maximum time after a node ceases transmitting
before the node’s receiver recovers its specified sensitivity. During this period and also during the receiver start up time (after power on or
shutdown) the RXD output may be in an undefined state.
(2) IrDA sensitivity definition: minimum irradiance Ee in angular range, power per unit area. The receiver must meet the BER specification while
the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum link length.
(3) Maximum irradiance E in angular range, power per unit area. The optical delivered to the detector by a source operating at the maximum
e
intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible related link errors. If placed at
the active output interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification.
Rev. 2.0, 06-Sep-13
Document Number: 84676
5
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
RECOMMENDED CIRCUIT DIAGRAM
Operated at a clean low impedance power supply the
TFBS6711 needs no additional external components.
However, depending on the entire system design and board
layout, additional components may be required (see fig. 3).
VCC2
VCC1
GND
VCC
C3
COMPONENT
RECOMMENDED VALUE
C1
4.7 μF, 16 V
Vishay part#:
293D 475X9 016B
C2
0.1 μF, ceramic
Vishay part#:
VJ1206 Y 104 J XXMT
R1
3.3 V supply voltage: no resistor is
necessary, the internal controller is able to
control the current
R2
4.7 , 0.125 W
IRED anode
R1
R2
C1
TABLE 1 - RECOMMENDED APPLICATION
CIRCUIT COMPONENTS
C2
Ground
SD
SD
TXD
TXD
RXD
RXD
I/O AND SOFTWARE
19299
Fig. 3 - Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line. This one
should be a tantalum or other fast capacitor to guarantee the
fast rise time of the IRED current.
Vishay transceivers integrate a sensitive receiver and a
built-in power driver. The combination of both needs a
careful circuit board layout. The use of thin, long, resistive
and inductive wiring should be avoided. The inputs (RXD,
SD) and the output RXD should be directly (DC) coupled to
the I/O circuit.
The capacitor C2 combined with the resistor R2 is the low
pass filter for smoothing the supply voltage.
R2, C1 and C2 are optional and dependent on the quality of
the supply voltages VCCx and injected noise. An unstable
power supply with dropping voltage during transmission
may reduce the sensitivity (and transmission range) of the
transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to the
transceiver power supply pins.
In the description, already different I/Os are mentioned.
Different combinations are tested and the function verified
with the special drivers available from the I/O suppliers. In
special cases refer to the I/O manual, the Vishay application
notes, or contact directly Vishay Sales, Marketing, or
Application.
MODE SWITCHING
The TFBS6711 is in the SIR mode after power on as a
default mode, therefore the FIR data transfer rate has to be
set by a programming sequence using the TXD and SD
inputs as described below. The low frequency mode covers
speeds up to 115.2 kbit/s. Signals with higher data rates
should be detected in the high frequency mode. Lower
frequency data can also be received in the high frequency
mode but with reduced sensitivity. To switch the
transceivers from low frequency mode to the high frequency
mode and vice versa, the programming sequences
described below are required.
SETTING TO THE HIGH BANDWIDTH MODE
(0.576 Mbit/s to 4 Mbit/s)
1. Set SD input to logic “high”.
2. Set TXD input to logic “high”. Wait ts 200 ns.
A tantalum capacitor should be used for C1 while a ceramic
capacitor is used for C2.
3. Set SD to logic “low” (this negative edge latches state of
TXD, which determines speed setting).
In addition, when connecting the described circuit to the
power supply, low impedance wiring should be used.
4. After waiting th 200 ns TXD can be set to logic “low”.
The hold time of TXD is limited by the maximum allowed
pulse length.
When extended wiring is used the inductance of the power
supply can cause dynamically a voltage drop at VCC2. Often
some power supplies are not able to follow the fast current
rise time. In that case another 4.7 μF (type, see table under
C1) at VCC2 will be helpful.
TXD is now enabled as normal TXD input for the high
bandwidth mode.
Keep in mind that basic RF-design rules for circuit design
should be taken into account. Especially longer signal lines
should not be used without termination. See e.g. “The Art of
Electronics” Paul Horo-witz, Winfield Hill, 1989, Cambridge
University Press, ISBN: 0521370957.
Rev. 2.0, 06-Sep-13
Document Number: 84676
6
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
SETTING TO THE LOWER BANDWIDTH MODE
(2.4 kbit/s to 115.2 kbit/s)
50 %
SD
1. Set SD input to logic “high”.
2. Set TXD input to logic “low”. Wait ts 200 ns.
ts
th
High: FIR
3. Set SD to logic “low” (this negative edge latches state of
TXD, which determines speed setting).
50 %
TXD
50 %
Low: SIR
4. TXD must be held for th 200 ns.
TXD is now enabled as normal TXD input for the lower
bandwidth mode.
14873
Fig. 4 - Mode Switching Timing Diagram
TRUTH TABLE
INPUTS
OUTPUTS
SD
TXD
INPUT IRRADIANCE mW/m2
RXD
High
x
x
Weakly pulled (500 k) high
0
Low
High
x
Low active (echo)
Ie
Low
High > 80μs
x
High
0
Low
Low
min. irradiance Ee in angular range
< max. irradiance Ee in angular range
Low (active)
0
Low
Low
> max. irradiance Ee in angular range
x
0
TRANSMITTER
RECOMMENDED SOLDER PROFILES
Manual Soldering
Solder Profile for Sn/Pb Soldering
260
Manual soldering is the standard method for lab use.
However, for a production process it cannot be
recommended because the risk of damage is highly
dependent on the experience of the operator. Nevertheless,
we added a chapter to the above mentioned application
note, describing manual soldering and desoldering.
10 s max. at 230 °C
240 °C max.
240
220
2 °C/s to 4 °C/s
200
Temperature (°C)
180
160 °C max.
160
140
120 s to 180 s
120
90 s max.
Storage
100
80
The storage and drying processes for all Vishay transceivers
(TFDUxxxx and TFBSxxx) are equivalent to MSL4.
2 °C/s to 4 °C/s
60
40
20
0
0
50
19431
100
150
200
250
300
350
Time (s)
The data for the drying procedure is given on labels on the
packing and also in the application note “Taping, Labeling,
Storage and Packing”.
Fig. 5 - Recommended Solder Profile for Sn/Pb Soldering
280
Wave Soldering
T peak = 260 °C max.
240
T ≥ 217 °C for 50 s max
220
200
180
Temperature (°C)
The TFBS6711 is a lead (Pb)-free transceiver and qualified
for lead (Pb)-free processing. For lead (Pb)-free solder paste
like Sn(3.0-4.0)Ag(0.5-0.9)Cu, there are two standard reflow
profiles: Ramp-Soak-Spike (RSS) and Ramp-To-Spike
(RTS). The Ramp-Soak-Spike profile was developed
primarily for reflow ovens heated by infrared radiation. With
widespread use of forced convection reflow ovens the
Ramp-To-Spike profile is used increasingly. Shown in
figure 5 and 6 are Vishay’s recommended profiles for use
with the TFBS6711 transceivers. For more details please
refer to the application note “SMD Assembly Instructions”.
T ≥ 255 °C for 20 s max
260
Lead (Pb)-free, Recommended Solder Profile
160
20 s
140
120
90 s...120 s
100
50 s max.
2 °C...4 °C/s
80
60
2 °C...4 °C/s
40
20
0
0
50
100
150
200
250
300
350
19261
Time (s)
Fig. 6 - Solder Profile, RSS Recommendation
For TFDUxxxx and TFBSxxxx transceiver devices wave
soldering is not recommended.
Rev. 2.0, 06-Sep-13
Document Number: 84676
7
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
TFBS6711 PACKAGE DIMENSIONS in millimeters
19612
Fig. 7 - Package Drawing, Tolerances: Height + 0.1, - 0.2 mm, otherwise ± 0.2 mm if not indicated
Recommended Footprint
Top View Application
Recommended Footprint
Side View Application
5 x 0.95 = 4.75
0.95
0.64
Emitter
4
5
Detector
6
1.27
1.27
3
0.6
2
0.4
1
1
2
3
4
0.95
19728
Emitter
5
6
0.64
5 x 0.95 = 4.75
Detector
19301
Fig. 8 - Soldering Footprints
Design Rules for Optical Windows
For optical windows see the application note on the web.
Rev. 2.0, 06-Sep-13
Document Number: 84676
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Not for New Designs
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Vishay Semiconductors
REEL DIMENSIONS in millimeters
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
14017
TAPE WIDTH
(mm)
A MAX.
(mm)
N
(mm)
W1 MIN.
(mm)
W2 MAX.
(mm)
W3 MIN.
(mm)
W3 MAX.
(mm)
16
330
50
16.4
22.4
15.9
19.4
Rev. 2.0, 06-Sep-13
Document Number: 84676
9
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Not for New Designs
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Vishay Semiconductors
TAPE DIMENSIONS in millimeters
19613
Fig. 9 - Tape Drawing, TFBS6711 for Side View Mounting, Tolerance ± 0.1 mm
Rev. 2.0, 06-Sep-13
Document Number: 84676
10
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TFBS6711
www.vishay.com
Vishay Semiconductors
TAPE DIMENSIONS in millimeters
20416
Fig. 10 - Tape Drawing, TFBS6711 for Top View Mounting, Tolerance ± 0.1 mm
Rev. 2.0, 06-Sep-13
Document Number: 84676
11
For technical questions, contact: irdasupportAM@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000