VBUS054CV-HS3-GS08

VBUS054CV-HS3 Vishay Semiconductors 4-Line BUS-Port ESD-Protection Features • • • • • Ultra compact LLP75-6A package 4-line USB ESD-protection Low leakage current Low load capacitance CD = 1.2 pF ESD-protection acc. IEC 61000-4-2 ± 30 kV contact discharge ± 30 kV air discharge • High surge current acc. IEC61000-4-5 IPP > 11 A • Lead (Pb)-free component • Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC 6 5 4 1 2 3 19957 20397 1 Marking (example only) XX YY Dot = Pin 1 marking XX = Date code YY = Type code (see table below) 21001 Ordering Information Ordering code Taped units per reel (8 mm tape on 7" reel) Minimum order quantity VBUS054CV-HS3-GS08 3000 15000 Device name VBUS054CV-HS3 Package Data Device name Package name Marking code Weight Molding compound flammability rating Moisture sensitivity level Soldering conditions VBUS054CV-HS3 LLP75-6A U8 5.1 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals Absolute Maximum Ratings Parameter Peak pulse current Peak pulse power ESD immunity Operating temperature Storage temperature Test conditions Symbol Value Unit Pin 1, 3, 4 or 6 to pin 2 acc. IEC 61000-4-5; tP = 8/20 µs; single shot IPPM 11 A Pin 5 to pin 2 acc. IEC 61000-4-5; tP = 8/20 µs; single shot IPPM 13 A Pin 1, 3, 4 or 6 to pin 2 acc. IEC 61000-4-5; tP = 8/20 µs; single shot PPP 242 W Pin 5 to pin 2 acc. IEC 61000-4-5; tP = 8/20 µs; single shot PPP 246 W Contact discharge acc. IEC 61000-4-2; 10 pulses VESD ± 30 kV Air discharge acc. IEC 61000-4-2; 10 pulses VESD ± 30 kV TJ - 40 to + 125 °C TSTG - 40 to + 150 °C Junction temperature * Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902 Document Number 81760 Rev. 1.1, 04-Sep-08 For technical support, please contact: ESD-Protection@vishay.com www.vishay.com 1 VBUS054CV-HS3 Vishay Semiconductors Electrical Characteristics Ratings at 25 °C, ambient temperature unless otherwise specified VBUS054CV-HS3 Date line: pin 1 , 3, 4 or 6 to pin 2 Parameter Test conditions/remarks Symbol Number of line which can be protected Nlines at IR = 0.1 µA VRWM at VIN = VRWM = 5 V IR at IR = 1 mA VBR Reverse clamping voltage at IPP = 11 A; acc. IEC 61000-4-5 Forward clamping voltage Protection paths Reverse working voltage Reverse current Min. Typ. Max. Unit 4 lines 5 V < 0.01 0.1 µA 7.9 8.6 V VC 18 22 V at IF = 11 A; acc. IEC 61000-4-5 VF 6.5 8 V VR (at I/O pin) = 0 V; VR (at pin 5) = 5 V; f = 1 MHz CD 1.2 2.5 pF Difference of the line capacitances dCD 0.2 pF Test conditions/remarks Symbol Min. Typ. Max. Unit at IR = 0.1 µA VRWM 5 6.6 at VIN = VRWM = 5 V IR at IR = 1 mA VBR Reverse clamping voltage at IPP = 13 A; acc. IEC 61000-4-5 VC Forward clamping voltage at IF = 13 A; acc. IEC 61000-4-5 VF VR (at pin 5) = 0 V; f = 1 MHz CD Reverse breakdown voltage Data line capacitance Line Symmetry 7 VBUS054CV-HS3 VBUS-line: pin 5 to pin 2 Parameter Reverse working voltage Reverse current Reverse breakdown voltage Line capacitance 7 V < 0.01 0.1 µA 7.9 8.6 V 18 22 V 7 V 190 pF Application Note With the VBUS054CV-HS3 a double, high speed USB-port can be protected against transient voltage signals. Negative transients will be clamped close below the ground level while positive transients will be clamped close above the 5 V working range. An avalanche diode clamps the supply line (VBUS at pin 5) to ground (pin 2). The high speed data lines, D1+, D2+, D1- and D2- , are connected to pin 1, 3, 4 and 6. As long as the signal voltage on the data lines is between the ground- and the VBUS -level, the low capacitance PN-diodes offer a very high isolation to VBUS , ground and to the other data lines. But as soon as any transient signal exceeds this working range, one of the PN-diodes gets in the forward mode and clamps the transient to ground or the avalanche break through voltage level. www.vishay.com 2 For technical support, please contact: ESD-Protection@vishay.com Document Number 81760 Rev. 1.1, 04-Sep-08 VBUS054CV-HS3 Vishay Semiconductors t w i n U S B P o r t R E C E I V E R VBUS D1+ D16 5 4 1 2 3 IC D2+ D2GND 20399 Typical Characteristics Tamb = 25 °C, unless otherwise specified 120 % 2.5 f = 1 MHz Rise time = 0.7 ns to 1 ns Discharge Current IESD 100 % 2.0 Pin 1, 3, 4 or 6 to pin 2 80 % CD (pF) 1.5 60 % 53 % VR at pin 5 = 5 V 1.0 40 % 27 % 0.5 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 Time (ns) 20557 0 0 Figure 1. ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 Ω/150 pF) 2 3 4 5 6 VR (V) Figure 3. Typical Capacitance CD vs. Reverse Voltage VR 200 8 µs to 100 % 100 % 1 21356 f = 1 MHz 180 160 140 CD (pF) IPPM 80 % 60 % 20 µs to 50 % P in 5 to pin 2 120 100 40 % 80 60 40 20 % 20 0% 0 0 10 20548 20 30 40 Time (µs) Figure 2. 8/20 µs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Document Number 81760 Rev. 1.1, 04-Sep-08 0 1 2 21357 3 4 5 6 VR (V) Figure 4. Typical Capacitance CD vs. Reverse Voltage VR For technical support, please contact: ESD-Protection@vishay.com www.vishay.com 3 VBUS054CV-HS3 Vishay Semiconductors 80 100 acc. IEC 61000-4-2 + 8 kV contact discharge Pin 1, 3, 4 or 6 to pin 2 60 10 Pin 5 to pin 2 VC-ESD (V) 40 IF (mA) 1 0.1 20 0 Pin 1, 3, 4 or 6 to pin 2 0.01 - 20 0.001 0.5 0.6 0.7 0.8 0.9 - 40 - 10 0 1 VF (V) 21358 10 20 30 40 50 60 70 80 90 21361 Figure 5. Typical Forward Current IF vs. Forward Voltage VF t (ns) Figure 8. Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 9 60 acc. IEC 61000-4-2 + 8 kV contact discharge Pin 1, 3, 4 or 6 to pin 2 Pin 1, 3, 4 or 6 to pin 2 8 40 7 20 Pin 5 to pin 2 VC-ESD (V) 6 VR (V) 5 4 3 0 - 20 - 40 2 - 60 1 0 0.01 0.1 1 10 100 21362 IR (µA) 21359 - 80 - 10 0 10 20 30 40 50 60 70 80 90 1000 10 000 Figure 6. Typical Reverse Voltage VR vs. Reverse Current IR t (ns) Figure 9. Typical Clamping performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) 300 25 acc. IEC 61000-4-2 contact discharge Pin 1, 3, 4 or 6 to pin 2 P in 1, 3, 4 o r 6 to pin 2 200 20 VC-ESD (V) VC (V) 100 15 10 - 100 VC P in 5 to pin 2 VC-ESD 0 5 - 200 Measured acc. IEC 61000-4-5 (8/20µs - wave form) 0 - 300 0 21360 5 10 15 IPP (A) Figure 7. Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP www.vishay.com 4 0 21363 5 10 15 20 25 30 VESD (kV) Figure 10. Typical Peak Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) For technical support, please contact: ESD-Protection@vishay.com Document Number 81760 Rev. 1.1, 04-Sep-08 VBUS054CV-HS3 Vishay Semiconductors Package Dimensions in millimeters (inches): LLP75-6A 18058 Document Number 81760 Rev. 1.1, 04-Sep-08 For technical support, please contact: ESD-Protection@vishay.com www.vishay.com 5 VBUS054CV-HS3 Vishay Semiconductors Ozone Depleting Substances Policy Statement It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively. 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA. 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany www.vishay.com 6 For technical support, please contact: ESD-Protection@vishay.com Document Number 81760 Rev. 1.1, 04-Sep-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1