VCNL3030X01
www.vishay.com
Vishay Semiconductors
Fully Integrated Proximity Sensor With Infrared Emitter,
I2C Interface, and Interrupt Function
FEATURES
• Package type: surface-mount
• Dimensions (L x W x H in mm): 4.0 x 2.36 x 0.75
• AEC-Q101 qualified
• Integrated modules: infrared emitter (IRED),
proximity sensor (PS), and signal conditioning IC
• Low power consumption
compatible) interface
I2C
(SMBus
• Output type: I2C bus (PS)
• Operation voltage: 2.5 V to 3.6 V
VDD
1
8
SDA
SCL
2
7
INT
GND
3
6
LDR
IR anode
4
5
IR cathode
• Floor life: 168 h, MSL 3, according to J-STD-020
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PROXIMITY FUNCTION
• Immunity to red glow (940 nm IRED)
LINKS TO ADDITIONAL RESOURCES
3D 3D
3D Models
Design Tools
• Programmable IRED sink current
• Intelligent cancellation to reduce cross talk phenomenon
A
T
Application
Notes
Technical
Notes
• Smart persistence scheme to reduce PS response time
• Selectable for 12- / 16-bit PS output data
DESCRIPTION
VCNL3030X01 integrates a proximity sensor (PS) and a high
power IRED into one small package. It incorporates
photodiodes, amplifiers, and analog to digital converting
circuits into a single chip by CMOS process. The PS offers
a programmable interrupt with individual high and low
thresholds offers the power savings on the microcontroller.
INTERRUPT
• Programmable interrupt function for PS with upper and
lower thresholds
• Adjustable persistence to prevent false triggers for PS
APPLICATIONS
• Force feedback applications
• Proximity / optical switch for consumer, computing,
automotive and industrial devices
PRODUCT SUMMARY
PART NUMBER
VCNL3030X01
OPERATING
RANGE (1)
(mm)
OPERATING
VOLTAGE
RANGE
(V)
I2C BUS
VOLTAGE
RANGE
(V)
IRED PULSE
CURRENT (2)
(mA)
OUTPUT
CODE
ADC RESOLUTION
PROXIMITY /
AMBIENT LIGHT
0 to 300
2.5 to 3.6
1.8 to 5.5
200
16 bit, I2C
16 bit / -
Notes
(1) Part should be operated in dark condition (not in direct sunlight)
(2) Adjustable through I2C interface
Rev. 1.0, 12-Aug-2020
Document Number: 84960
1
For technical questions, contact: sensorstechsupport@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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ORDERING INFORMATION
ORDERING CODE
PACKAGING
VCNL3030X01-GS08
Tape and reel
VCNL3030X01-GS18
VOLUME (1)
REMARKS
MOQ: 3300 pcs
MOQ: 13 000 pcs
4.0 mm x 2.36 mm x 0.75 mm
Note
(1) MOQ: minimum order quantity
SLAVE ADDRESS OPTIONS
ORDERING CODE
SLAVE ADDRESS (7 bit)
VCNL3030X01-GS08
0x41
VCNL3030X01-GS18
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
Supply voltage
TEST CONDITION
VDD
2.5
3.6
UNIT
V
Operation temperature range
Tamb
-40
+105
°C
Storage temperature range
Tstg
-40
+110
°C
RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
Supply voltage
TEST CONDITION
VDD
2.5
3.6
UNIT
V
Operation temperature range
Tamb
-40
+105
°C
I2C bus operating frequency
f(I2CCLK)
10
400
kHz
PIN DESCRIPTIONS
PIN ASSIGNMENT
SYMBOL
TYPE
1
VDD
-
Power supply input
2
SCL
I
I2C digital bus clock input
3
GND
-
Ground
4
IR ANODE
I
Anode for IRED
5
IR CATHODE
I
Cathode (IRED) connection
6
LDR
I
IRED driver input
7
INT
O
Interrupt pin
8
SDA
I / O (open drain)
I2C data bus data input / output
Rev. 1.0, 12-Aug-2020
FUNCTION
Document Number: 84960
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VCNL3030X01
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BLOCK DIAGRAM
VCNL3030X01
8 SDA
PS
data buffer
DSP
GND 3
Driver
Oscillator
PS-PD
SCL 2
Output buffer
I2C interface
VDD 1
7 INT
6 LDR
Temperature
compensation
IR anode 4
5 IR cathode
Fig. 1 - Detailed Block Diagram
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
Supply voltage
Excluded LED driving
Supply current
Light condition = dark, VDD = 3.3 V
I2C supply voltage
Logic high
I2C signal input
Logic low
Logic high
Logic low
VDD = 3.3 V
VDD = 2.6 V
Peak sensitivity wavelength of PS
Full PS counts
PS detection range
MIN.
TYP.
MAX.
VDD
2.5
-
3.6
V
IDD
-
200
-
μA
IDD (SD)
-
0.2
-
μA
1.8
-
5.5
V
VIH
1.55
-
-
VIL
-
-
0.4
VIH
1.4
-
-
VIL
-
-
0.4
λp
-
720
-
nm
-
-
4096 / 65 535
steps
0
-
300
mm
-40
-
+105
°C
-
-
5.5
V
-
200
-
mA
Kodak gray card (1)
Tamb
LED_Anode voltage
(2)
UNIT
VPULL UP
12-bit / 16-bit resolution
Operating temperature range
IRED driving current
SYMBOL
V
V
Notes
• Test condition: VDD = 3.3 V, temperature: 25 °C
(1) Part should be operated in dark condition (not in direct sunlight)
(2) Programmable between 50 mA and 200 mA; based on IRED on / off duty ratio = 1/40, 1/80, 1/160, and 1/320
Rev. 1.0, 12-Aug-2020
Document Number: 84960
3
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCNL3030X01
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I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
STANDARD MODE
SYMBOL
MIN.
MAX.
f(I2CCLK)
10
t(BUF)
4.7
t(HDSTA)
Repeated start condition setup time
Stop condition setup time
Data hold time
Data setup time
Clock frequency
Bus free time between start and stop condition
Hold time after (repeated) start condition;
after this period, the first clock is generated
FAST MODE
UNIT
MIN.
MAX.
100
10
400
kHz
-
1.3
-
μs
4.0
-
0.6
-
μs
t(SUSTA)
4.7
-
0.6
-
μs
t(SUSTO)
4.0
-
0.6
-
μs
t(HDDAT)
-
3450
-
900
ns
t(SUDAT)
250
-
100
-
ns
I2C clock (SCK) low period
t(LOW)
4.7
-
1.3
-
μs
I2C clock (SCK) high period
t(HIGH)
4.0
-
0.6
-
μs
Clock / data fall time
tf
-
300
-
300
ns
Clock / data rise time
tr
-
1000
-
300
ns
t(LOW)
I2C bus
CLOCK
(SCLK)
tr
tf
VIH
VIL
t(HDSTA)
t(SUSTA)
t(HIGH)
t(SUSTO)
t(BUF)
t(HDDAT)
I2C bus
DATA
(SDAT)
t(SUDAT)
VIH
VIL
{
P
Stop condition
{
{
S
Start condition
{
S
Start
P
Stop
t(LOSEXT)
SCLKACK
t(LOWMEXT)
SDAACK
t(LOWMEXT)
t(LOWMEXT)
2
I C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
Fig. 2 - I2C Bus Timing Diagram
Rev. 1.0, 12-Aug-2020
Document Number: 84960
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PARAMETER TIMING INFORMATION
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA0
SA1
SA2
ACK by
VCNL3030X01
ACK by
VCNL3030X01
I2C bus slave address byte
Command code
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA0
SA1
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
Stop by
ACK by
VCNL3030X01 master
ACK by
VCNL3030X01
Data byte low
Data byte high
Fig. 3 - I2C Bus Timing for Sending Word Command Format
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
SA7
SA6
SA5
SA4
SA3
SA0
SA1
SA2
ACK by
VCNL3030X01
ACK by
VCNL3030X01
Start by
master
I2C bus slave address byte
Command code
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA6
SA7
SA5
SA4
SA3
SA2
R
SA1
Start by
master
SA7
SA6
SA5
SA4
SA3
ACK by
VCNL3030X01
SA2
SA1
SA0
ACK by
master
I2C bus slave address byte
Data byte low
I2C bus
CLOCK
(SCLK)
I2C bus
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
NACK by
master
Stop by
master
Data byte high
Fig. 4 - I2C Bus Timing for Receiving Word Command Format
Rev. 1.0, 12-Aug-2020
Document Number: 84960
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For technical questions, contact: sensorstechsupport@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
0°
10000
0.6
0.5
0.4
100
0.3
0.2
0.1
400
500
600
700
800
900
10
1000 1100
1.0
0.9
40°
0.8
0.7
60°
0.6
80°
λ - Wavelength (nm)
2nd line
0.5 0.4 0.3 0.2 0.1 0
Fig. 8 - Relative Radiant Intensity Emitter vs.
Angular Displacement
Fig. 5 - Normalized Spectral Response
(PS channel)
Axis Title
Axis Title
1.0
1st line
2nd line
1000
10
100
1
10000
0.9
0.8
0.7
1000
0.6
1st line
2nd line
tp = 500 μs
Tamb = 25 °C
2nd line
Ie, rel - Relative Radiant Intensity
10000
100
ϕ - Angular Displacement
1000
Irel - Relative Radiant Intensity
0.8
0.7
0
2nd line
IF - Forward Current (mA)
20°
0.9
1st line
2nd line
2nd line
S(λ)rel - Relative Spectral Sensitivity
1.0
0.5
0.4
100
0.3
0.2
0.1
0
10
10
-90
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7
-60
-30
0
30
60
90
VF - Forward Voltage (V)
2nd line
ϕ - Angular Displacement (°)
2nd line
Fig. 6 - Forward Current IF = f (VF)
for LED
Fig. 9 - Relative Radiant Intensity Emitter vs.
Angular Displacement
Axis Title
Axis Title
0.22
1.0
10000
10000
0.16
VDD = 2.5 V
0.14
100
0.12
PS: active force mode enable
ALS: disabled
0.10
-20
0
20
40
60
80
100 120
Tamb - Ambient Temperature (°C)
2nd line
Fig. 7 - Supply Current vs. Ambient Temperature
With PS = Active
Rev. 1.0, 12-Aug-2020
0.7
1000
0.6
0.5
0.4
100
0.3
0.2
0.1
10
-40
0.8
1st line
2nd line
1000
2nd line
Srel - Relative Sensitivity
VDD = 3.0 V
0.18
1st line
2nd line
2nd line
IDD - Supply Current (mA)
0.9
VDD = 3.6 V
0.20
0
10
-90
-60
-30
0
30
60
90
ϕ - Angular Displacement (°)
2nd line
Fig. 10 - Relative Sensitivity vs. Angular Displacement
Document Number: 84960
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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APPLICATION INFORMATION
Pin Connection with the Host
VCNL3030X01 integrates proximity sensor and IRED all together with I2C interface. It is very easy for the baseband (CPU) to
access PS data via I2C interface without extra software algorithms. The hardware schematic is shown in the following diagram.
Two additional capacitors in the circuit can be used for the following purposes: (1) the 0.1 μF capacitor near the VDD pin is used
for power supply noise rejection, (2) the 2.2 μF capacitor - connected to the anode - is used to prevent the IRED voltage from
instantly dropping when the IRED is turned on, and (3) 2.2 kΩ is suitable for the pull up resistor of I2C except for the 8.2 kΩ
applied on the INT pin.
Note
• IR cathode and LDR: pins need to be connected together externally
1.8 V to 5.5 V
R2 R3
R4
2.5 V to 5.5 V
C1
10 μF
IR anode (4)
C2
IR cathode (5)
100 nF
LDR (6)
Host
micro controller
VCNL3030X01
2.5 V to 3.6 V
C3
VDD (1)
INT (7)
GND (3)
SCL (2)
SDA (8)
GPIO
100 nF
I2C bus clock SCL
I2C bus data SDA
Fig. 11 - Circuitry with Two Separate Power Supply Sources
Rev. 1.0, 12-Aug-2020
Document Number: 84960
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Digital Interface
VCNL3030X01 applies single slave address 0x41 (HEX) of 7-bit addressing following I2C protocol. All operations can be
controlled by the command register. The simple command structure helps users easily program the operation setting and latch
the light data from VCNL3030X01. As Fig. 17 shows, VCNL3030X01’s I2C command format is simple for read and write
operations between VCNL3030X01 and the host. The white sections indicate host activity and the gray sections indicate
VCNL3030X01’s acknowledgement of the host access activity. Write word and read word protocol is suitable for accessing
registers for 12-bit / 16-bit PS data. Interrupt can be cleared by reading data out from register: INT_Flag. All command codes
should follow read word and write word protocols.
Send byte → write command to VCNL3030X01
1
7
1
1
8
1
8
1
8
1
1
S
Slave address
Wr
A
Command code
A
Data byte low
A
Data byte high
A
P
Receive byte → read data from VCNL3030X01
1
7
1
1
8
1
1
7
1
1
8
1
8
1
1
S
Slave address
Wr
A
Command code
A
S
Slave address
Rd
A
Data byte low
A
Data byte high
N
P
S = start condition
P = stop condition
A = acknowledge
N = no acknowledge
Shaded area = VCNL3030X01 acknowledge
Fig. 12 - Write Word and Read Word Protocol
Function Description
For proximity sensor function, VCNL3030X01 supports different kinds of mechanical designs to achieve the best proximity
detection performance for any color of object with more flexibility. The basic PS function settings, such as duty ratio, integration
time, interrupt, and PS enable / disable, and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS
response time. Integration time represents the duration of the energy being received. The interrupt is asserted when the PS
detection levels over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the
interrupt function is enabled, the host reads the PS output data from VCNL3030X01 that saves host loading from periodically
reading PS data. More than that, INT flag (register: INT_Flag) indicates the behavior of INT triggered under different conditions.
PS persistence (PS_PERS) sets up the PS INT asserted conditions as long as the PS output value continually exceeds the
threshold level. The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon.
VCNL3030X01 also supports an easy use of proximity detection logic output mode that outputs just high / low levels saving
loading from the host. Normal operation mode or proximity detection logic output mode can be selected on the register: PS_MS.
A smart persistence is provided to get faster PS response time and prevent false trigger for PS. Descriptions of each slave
address operation are shown in table 1.
Rev. 1.0, 12-Aug-2020
Document Number: 84960
8
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION
COMMAND
CODE
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
DATE BYTE
LOW /
HIGH
REGISTER
NAME
R/
W
DEFAUL
T
VALUE
FUNCTION DESCRIPTION
L
Reserved
R/W
0x01
Reserved
H
Reserved
R/W
0x01
Reserved
L
Reserved
R/W
0x00
Reserved
H
Reserved
R/W
0x00
Reserved
L
Reserved
R/W
0x00
Reserved
H
Reserved
R/W
0x00
Reserved
L
PS_CONF1
R/W
0x01
PS duty ratio, integration time, persistence, and PS enable / disable
H
PS_CONF2
R/W
0x00
PS gain, PS output resolution, PS interrupt trigger
L
PS_CONF3
R/W
0x00
PS smart persistence, active force mode
H
PS_MS
R/W
0x00
LED current selection
L
PS_CANC_L
R/W
0x00
PS cancellation level setting
H
PS_CANC_M
R/W
0x00
PS cancellation level setting
L
PS_THDL_L
R/W
0x00
PS low interrupt threshold setting LSB byte
H
PS_THDL_M
R/W
0x00
PS low interrupt threshold setting MSB byte
L
PS_THDH_L
R/W
0x00
PS high interrupt threshold setting LSB byte
H
PS_THDH_M
R/W
0x00
PS high interrupt threshold setting MSB byte
L
PS_Data_L
R
0x00
PS LSB output data
H
PS_Data_M
R
0x00
PS MSB output data
L
Reserved
R
0x00
Reserved
H
Reserved
R
0x00
Reserved
L
Reserved
R
0x00
Reserved
H
Reserved
R
0x00
Reserved
L
Reserved
R
0x00
Reserved
H
Reserved
R
0x00
Reserved
L
Reserved
R
0x00
Reserved
H
Reserved
R
0x00
Reserved
L
Reserved
R
0x00
Reserved
H
INT_Flag
R
0x00
PS interrupt flags, PS sunlight protection mode flag
L
ID_L
R
0x80
Device ID LSB
H
ID_M
R
0x00
For version with 0x41 as device address; 0x10 for version with 0x51,
0x20 for version with 0x40 and 0x30 for version with 0x60 as device
address
Note
• All of reserved register are used for internal test. Please keep as default setting
Command Register Format
VCNL3030X01 provides an 8-bit command register for PS controlling. The description of each command format is shown in
following tables.
TABLE 2 - REGISTER: PS_CONF1 DESCRIPTION
REGISTER: PS_CONF1
Command
COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)
Bit
Description
PS_Duty
7:6
(0 : 0) = 1/40, (0 : 1) = 1/80, (1 : 0) = 1/160, (1 : 1) = 1/320
PS IRED on / off duty ratio setting
PS_PERS
5:4
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4
PS interrupt persistence setting
PS_ IT
3:1
(0 : 0 : 0) = 1T, (0 : 0 : 1) = 1.5T, (0 : 1 : 0) = 2T, (0 : 1 : 1) = 2.5T, (1 : 0 : 0) = 3T, (1 : 0 : 1) = 3.5T,
(1 : 1 : 0) = 4T, (1 : 1 : 1) = 8T, PS integration time setting
PS_SD
0
Rev. 1.0, 12-Aug-2020
0 = PS power on, 1 = PS shut down, default = 1
Document Number: 84960
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TABLE 3 - REGISTER: PS_CONF2 DESCRIPTION
REGISTER: PS_CONF2
COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)
Command
Bit
Description
Reserved
7:6
(0 : 0), reserved
PS_Gain
5:4
(0 : 0) and (0 : 1) = two step mode, (1 : 0) = single mode x 8, (1 : 1) = single mode x 1
PS_HD
3
0 = PS output is 12 bits, 1 = PS output is 16 bits
PS_NS
2
0 = typical sensitivity (two step mode x 4), 1 = typical sensitivity mode (two step mode)
PS_INT
1:0
(0 : 0) = interrupt disable, (0 : 1) = trigger by closing, (1 : 0)= trigger by away,
(1 : 1) = trigger by closing and away
TABLE 4 - REGISTER: PS_CONF3 DESCRIPTION
REGISTER: PS_CONF3
Command
LED_I_LOW
Reserved
COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)
Bit
7
6:5
Description
0 = disabled = normal current, 1 = enabled = 1/10 of normal current,
with that the current is accordingly: 5 mA, 7.5 mA, 10 mA, 12 mA, 14 mA, 16 mA, 18 mA, 20 mA
(0 : 0)
PS_SMART_PERS
4
0 = disable; 1 = enable PS smart persistence
PS_AF
3
0 = active force mode disable (normal mode), 1 = active force mode enable
PS_TRIG
2
0 = no PS active force mode trigger, 1 = trigger one time cycle
VCNL3030X01 output one cycle data every time host writes in ‘1’ to sensor.The state returns to ‘0’
automatically.
PS_MS
1
0 = proximity normal operation with interrupt function, 1 = proximity detection logic output mode enable
0
0 = turn off sunlight cancel; 1 = turn on sunlight cancel
PS sunlight cancel function enable setting
PS_SC_EN
TABLE 5 - REGISTER: PS_MS DESCRIPTION
REGISTER: PS_MS
COMMAND CODE: 0x04_H (0x04 DATA BYTE HIGH)
Command
Bit
Reserved
7
PS_SC_CUR
6:5
PS_SP
4
PS_SPO
3
LED_I
2:0
Description
0
(0 : 0) = 1 x typical sunlight cancel current, (0 : 1) = 2 x typical sunlight cancel current,
(1 : 0) = 4 x typical sunlight cancel current, (1 : 1) = 8 x typical sunlight cancel current
0 = typical sunlight capability, 1 = 1.5 x typical sunlight capability
0 = output is 00h in sunlight protect mode, 1 = output is FFh in sunlight protect mode,
(0 : 0 : 0) = 50 mA; (0 : 0 : 1) = 75 mA; (0 : 1 : 0) = 100 mA; (0 : 1 : 1) = 120 mA
(1 : 0 : 0) = 140 mA; (1 : 0 : 1) = 160 mA; (1 : 1 : 0) = 180 mA; (1 : 1 : 1) = 200 mA
LED current selection setting
TABLE 6 - REGISTER PS_CANC_L AND PS_CANC_M DESCRIPTION
COMMAND CODE: 0x05_L (0x05 DATA BYTE LOW) AND 0x05_H (0x05 DATA BYTE HIGH)
Register
Bit
Description
PS_CANC_L
7:0
0x00 to 0xFF, PS cancellation level setting_LSB byte
PS_CANC_M
7:0
0x00 to 0xFF, PS cancellation level setting_MSB byte
TABLE 7 - REGISTER: PS_THDL_L AND PS_THDL_M DESCRIPTION
COMMAND CODE: 0x06_L (0x06 DATA BYTE LOW) AND 0x06_H (0x06 DATA BYTE HIGH)
Register
Bit
Description
PS_THDL_L
7:0
0x00 to 0xFF, PS interrupt low threshold setting_LSB byte
PS_THDL_M
7:0
0x00 to 0xFF, PS interrupt low threshold setting_MSB byte
TABLE 8 - REGISTER: PS_THDH_L AND PS_THDH_M DESCRIPTION
COMMAND CODE: 0x07_L (0x07 DATA BYTE LOW) AND 0x07_H (0x07 DATA BYTE HIGH)
Register
Bit
Description
PS_THDH_L
7:0
0x00 to 0xFF, PS interrupt high threshold setting_LSB byte
PS_THDH_M
7:0
0x00 to 0xFF, PS interrupt high threshold setting_MSB byte
Rev. 1.0, 12-Aug-2020
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TABLE 9 - READ OUT REGISTER DESCRIPTION
Register
PS_Data_L
Command Code
Bit
Description
0x08_L (0x08 data byte low)
7:0
PS_Data_M
0x08_H (0x08 data byte high)
7:0
0x00 to 0xFF, PS1 MSB output data
Reserved
0x09_L (0x09 data byte low)
7:0
Reserved
Reserved
0x09_H (0x09 data byte high)
7:0
Reserved
Reserved
0x0A_L (0x0A data byte low)
7:0
Reserved
Reserved
0x0A_H (0x0A data byte high)
7:0
Reserved
Reserved
0x0B_L (0x0B data byte low)
7:0
Reserved
Reserved
0x0B_H (0x0B data byte high)
7:0
Reserved
Reserved
0x0C_L (0x0C data byte low)
7:0
Reserved
Reserved
0x0C_H (0x0C data byte high)
7:0
Reserved
Reserved
0x0D_L (0x0D data byte low)
7:0
INT_Flag
0x0D_H (0x0D data byte high)
7
6
5
4
3
2
1
0
ID_L
0x0E_H (0x0E data byte low)
7:0
0x80
7:6
(0 : 0)
ID_M
0x0E_H (0x0E data byte high)
0x00 to 0xFF, PS1 LSB output data
Default = 0x00
Reserved
Reserved
Reserved
Reserved
Reserved
PS_SPFLAG, PS entering sunlight protection mode
PS_IF_CLOSE, PS rises above PS_THDH INT trigger event
PS_IF_AWAY, PS drops below PS_THDL INT trigger event
5:4
(0 : 0) = slave address = 0x41 (7-bit)
3:0
Version code (0 : 0 : 0 : 0)
Adjustable Sampling Time
VCNL3030X01’s embedded LED driver drives the internal IRED with the “LDR” pin by a pulsed duty cycle. The IRED on / off
duty ratio is programmable by I2C command at register: PS_Duty which is related to the current consumption and PS response
time. The higher the duty ratio adopted, the faster response time achieved with higher power consumption. For example,
PS_Duty = 1/320, peak IRED current = 100 mA, averaged current consumption is 100 mA/320 = 0.3125 mA.
Initialization
VCNL3030X01 includes default values for each register. As long as power is on, it is ready to be controlled by host via I2C bus.
Threshold Window Setting
• Programmable PS Threshold
VCNL3030X01 provides both high and low thresholds for PS (register: PS_THDL, PS_THDH)
• PS Persistence
The PS persistence function (PS_PERS, 1, 2, 3, 4) helps to avoid false trigger of the PS INT. For example, if
PS_PERS
= 3 times, the PS INT will not be asserted unless the PS value is greater than the PS threshold (PS_THDH) value for three periods
of time continuously
• PS Active Force mode
An extreme power saving way to use PS is to apply PS active force (register: PS_CONF3 command: PS_FOR = 1) mode.
Anytime host would like to read out just one of PS data, write in ‘1’ at register: PS_CONF3 command: PS_FOR_Trig. Without
commands placed, there is no PS data output. VCNL3030X01 stays in standby mode constantly
• PS detection object
Any color of object is detectable by VCNL3030X01
Intelligent Cancellation
VCNL3030X01 provides an intelligent cancellation method to reduce cross talk phenomenon for the proximity sensor. The
output data will be subtracted by the input value on register: PS_CANC.
Rev. 1.0, 12-Aug-2020
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Interruption (INT)
VCNL3030X01 has PS interrupt feature operated by a single pin “INT”. The purpose of the interrupt feature is to actively inform
the host once INT has been asserted. With the interrupt function applied, the host does not need to be constantly pulling data
from the sensor, but to read data from the sensor while receiving interrupt request from the sensor. As long as the host enables
PS interrupt (register: PS_INT) function, the level of INT pin (pin 7) is pulled low once INT asserted. All registers are accessible
even if INT is asserted.
To effectively adopt PS INT function, it is recommended to use PS detection mechanism at register: PS_INTT = 1 for the best
PS detection performance which can be adjusted by high / low THD level of PS. PS INT trigger way is defined by register:
PS_INT.
Interruption Flag
Register: INT_Flag represents all of interrupt trigger status for PS. Any flag value changes from ‘0’ to ‘1’ state, the level of INT
pin will be pulled low. As long as host reads INT_Flag data, the bit will change from ‘1’ state to ‘0’ state after reading out, the
INT level will be returned to high afterwards.
PROXIMITY DETECTION LOGIC OUTPUT MODE
VCNL3030X01 provides a proximity detection logic output mode that uses INT pin (pin 7) as a proximity detection logic
high / low output (register: PS_MS). When this mode is selected, the PS output (pin 7; INT/Pout) is pulled low when an
object is closing to be detected and returned to level high when the object moves away. Register: PS_THDH / PS_THDL defines
how sensitive PS detection is.
PROXIMITY DETECTION HYSTERESIS
A PS detection hysteresis is important that keeps PS state in a certain range of detection distance. For example, PS INT asserts
when PS value over PS_THDH. Host switches off panel backlight and then clears INT. When PS value is less than PS_THDL,
host switches on panel backlight. Any PS value lower than PS_THDH or higher than PS_THDL, PS INT will not be asserted. Host
does keep the same state.
APPLICATION CIRCUIT BLOCK REFERENCE
1.8 V to 5.5 V
R2 R3
R4
2.5 V to 3.6 V
C1
22 μF
IR anode (4)
C2
IR cathode (5)
100 nF
LDR (6)
VCNL3030X01
R1
10R
Host
micro controller
C4
10 μF
C3
VDD (1)
INT (7)
GND (3)
SCL (2)
SDA (8)
INT (GPIO)
100 nF
I2C bus clock SCL
I2C bus data SDA
Fig. 13 - Circuitry with Just One Common Power Supply Source
Rev. 1.0, 12-Aug-2020
Document Number: 84960
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PACKAGE DIMENSIONS in millimeters
1.95
1.18
0.29
Pinning bottom view
0.195
LDR
6
INT
7
SDA
8
0.4
0.77
1.4
1.03
0.7
0.4
IRLED-C
5
IRLED-A
4
0.65 (8 x)
0.195
SCL
2
VDD
1
Pinning top view
IRLED-A
4
GND
3
SCL
2
IRLED-C
5
LDR
6
INT
7
VDD
1
0.15
0.75
0.415
GND
3
Exposed pad is
internally connected
to GND
1.05 (3 x)
SDA
8
Recommended solder foot print
0.75 (8 x)
0.8
4
0.83
0.65 (8 x)
(2.36)
1.36
2.66
1.18
0.78
2.36
2.41
0.78
0.75
0.3 (6 x)
(4)
Drawing No.: 6.550-5326.01-4
Issue: 2, 27.07.2020
Not indicated tolerances ± 0.1 mm
Rev. 1.0, 12-Aug-2020
Technical drawings
according to DIN
specification.
Document Number: 84960
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TAPE AND REEL DIMENSIONS in millimeters
Reel-Size:
GS 08: Ø 180 mm ± 2 mm = 3300 pcs.
GS 18: Ø 330 mm ± 2 mm = 13 000 pcs.
Reel-design is representative for different types
Non tolerated dimensions ± 0.1 mm
Unreel direction
ReelØ
Ø 13
A
E
(Em mpty
pty lea
tra der
iler 40
20 0 m
0m m
m min
mi
n.) .
Label posted here
.4
1.3
0.3
18
A
Sensor orientation
Ø 1.55
4
4
2
12
Drawing No.: 9.8000-5142.01-4
Issue: 1, 07.06.2017
Rev. 1.0, 12-Aug-2020
5.5
1.75
Document Number: 84960
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SOLDER PROFILE
DRYPACK
Devices are packed in moisture barrier bags (MBB) to
prevent the products from moisture absorption during
transportation and storage. Each bag contains a desiccant.
Axis Title
10000
300
Max. 260 °C
255 °C
240 °C
217 °C
245 °C
FLOOR LIFE
1000
200
Max. 30 s
1st line
2nd line
2nd line
Temperature (°C)
250
150
Max. 120 s
100
Max. 100 s
Max. ramp down 6 °C/s
100
Floor life (time between soldering and removing from MBB)
must not exceed the time indicated on MBB label:
Floor life: 168 h
Conditions: Tamb < 30 °C, RH < 60 %
Moisture sensitivity level 3, according to J-STD-020.
Max. ramp up 3 °C/s
50
DRYING
10
0
0
50
100
150
200
250
300
Time (s)
19841
Fig. 14 - Lead (Pb)-free Reflow Solder Profile
According to J-STD-020
Rev. 1.0, 12-Aug-2020
In case of moisture absorption devices should be baked
before soldering. Conditions see J-STD-020 or label.
Devices taped on reel dry using recommended conditions
192 h at 40 °C (+ 5 °C), RH < 5 %.
Document Number: 84960
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Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
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