Not for New Designs
VCNL36821S
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Vishay Semiconductors
Proximity Sensor With Interrupt, IRED, and I2C Interface
FEATURES
• Package type: surface-mount
• Dimensions (L x W x H in mm): 2.55 x 2.05 x 1.0
• Integrated modules: infrared emitter (IRED),
proximity sensor (PS), and signal conditioning IC
• Interrupt function
• Smallest light hole opening design
• Immunity to red glow issue (940 nm)
• Supply voltage range VDD: 1.7 V to 3.6 V
• Low power consumption I2C (SMBus compatible
interface)
• Floor life: 168 h, MSL 3, according to J-STD-020
LINKS TO ADDITIONAL RESOURCES
3D 3D
Design Tools
Related
Documents
• Output type: I2C bus (PS)
3D Models
DESCRIPTION
VCNL36821S integrates a proximity sensor (PS), and a
IRED into one small package. It incorporates photodiodes,
amplifiers, and analog to digital converting circuits into a
single chip by CMOS process. PS programmable interrupt
features of individual high and low thresholds offer the best
utilization of resource and power saving on the
microcontroller.
APPLICATIONS
• Temperature compensation: -40 °C to +85 °C
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PROXIMITY FUNCTION
•
•
•
•
•
Immunity to red glow (940 nm IR LED)
Programmable IR LED sink current
Intelligent cancellation to reduce cross talk phenomenon
Smart persistence scheme to reduce PS response time
Low power consumption mode
INTERRUPT
• Handheld device
• Programmable interrupt function for PS with upper and
lower thresholds
• Adjustable persistence to prevent false triggers for PS
• Consumer device
• Industrial application
• Earphone
PIN DEFINITION
4
5
3
6
2
7
1
8
1
GND
5
2
INT
6
LED_A
VDD
3
NC
7
SDA
4
LED_C
8
SCL
PRODUCT SUMMARY
PART
NUMBER
OPERATING
RANGE
(mm)
OPERATING
VOLTAGE RANGE
(V)
I2C BUS
VOLTAGE RANGE
(V)
IRED DRIVING
CURRENT
(mA)
OUTPUT
CODE
ADC RESOLUTION
PROXIMITY /
AMBIENT LIGHT
300
1.7 to 3.6
1.7 to 3.6
156
12 bit, I2C
12 bit / -
VCNL36821S
Rev. 1.5, 03-Feb-2021
Document Number: 80150
1
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Not for New Designs
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Vishay Semiconductors
ORDERING INFORMATION
ORDERING CODE
PACKAGING
VOLUME (1)
REMARKS
VCNL36821S
Tape and reel
MOQ: 3000 pcs, 3000 pcs/reel
2.55 mm x 2.05 mm x 1.0 mm
Note
(1) MOQ: minimum order quantity
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
MAX.
UNIT
Supply voltage
VDD
1.7
3.6
V
Operation temperature range
Tamb
-40
+85
°C
Storage temperature range
Tstg
-40
+100
°C
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
VDD
1.7
-
3.6
V
Sensor supply voltage
IR LED supply voltage
Supply current
Shutdown current
VDD
2.5
-
3.6
V
Excluding LED driving
IDD
100
200
300
μA
Light condition = dark;
VDD = 1.8 V, Tamb = 25 °C
IDD (SD)
-
1
-
μA
VPULL UP
1.65
-
-
V
VIH
1.26
-
-
V
I2C supply voltage
I2C signal input, logic high
VDD = 3.3 V
I2C
signal input, logic low
VDD = 3.3 V
VIL
-
-
0.73
V
Peak wavelength of IRED
IF = 50 mA
λpLED
-
940
-
nm
-
-
156
mA
IRED driving current
PIN DESCRIPTIONS
PIN ASSIGNMENT
SYMBOL
TYPE
FUNCTION
1
GND
-
Ground
2
INT
O (open drain)
Interrupt pin
3
NC
-
Connected to GND or floating
4
LED_Cathode
I
Cathode (LED) connection
5
LED_Anode
I
Anode of LED
6
VDD
-
Power supply input
7
SDA
I / O (open drain)
I2C digital bus data input / output
8
SCL
I (open drain)
I2C digital bus clock input
Rev. 1.5, 03-Feb-2021
Document Number: 80150
2
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
BLOCK DIAGRAM
VDD
Anode
Pin 6
Pin 5
PS timing
controller
PS
buffer
DSP
IRED
PD
Oscillator
IRED
driver
Temperature
compensation
INT
Pin 2
SCL
Pin 8
SDA
Pin 7
I2C bus logic
control
Pin 1
Pin 3
(n.c.)
Pin 4
(n.c.)
GND
Rev. 1.5, 03-Feb-2021
Document Number: 80150
3
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
Clock frequency
STANDARD MODE
MIN.
MAX.
f(SMBCLK)
10
t(BUF)
4.7
t(HDSTA)
Repeated start condition setup time
Stop condition setup time
Data hold time
Data setup time
Bus free time between start and stop condition
Hold time after (repeated) start condition;
after this period, the first clock is generated
FAST MODE
UNIT
MIN.
MAX.
100
10
400
kHz
-
1.3
-
μs
4.0
-
0.6
-
μs
t(SUSTA)
4.7
-
0.6
-
μs
t(SUSTO)
4.0
-
0.6
-
μs
t(HDDAT)
0
3450
0
900
ns
t(SUDAT)
250
-
100
-
ns
I2C clock (SCK) low period
t(LOW)
4.7
-
1.3
-
μs
I2C clock (SCK) high period
t(HIGH)
4.0
-
0.6
-
μs
Clock / data fall time
t(f)
-
300
-
300
ns
Clock / data rise time
t(r)
-
1000
-
300
ns
Note
• Data based on standard I2C protocol requirement, not tested in production
t(LOW)
I2C BUS
CLOCK
(SCLK)
t(r)
t(f)
VIH
VIL
t(HDSTA)
t(HIGH)
t(SUSTA)
t(SUSTO)
t(BUF)
t(HDDAT)
I2C BUS
DATA
(SDAT)
t(SUDAT)
VIH
Start
{
S
Start condition
{
P
Stop condition
{
{
VIL
S
P
Stop
t(LOSEXT)
SCLKACK
t(LOWMEXT)
SDAACK
t(LOWMEXT)
t(LOWMEXT)
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
Fig. 1 - I2C Bus Timing Diagram
Rev. 1.5, 03-Feb-2021
Document Number: 80150
4
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
PARAMETER TIMING INFORMATION
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA5
SA6
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA1
SA2
SA0
ACK by
VCNL36821S
ACK by
VCNL36821S
2
I C bus slave address byte
Command code
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA4
SA5
SA2
SA3
SA7
SA0
SA1
SA6
SA4
SA5
SA3
SA2
SA1
SA0
Stop by
ACK by
VCNL36821S master
ACK by
VCNL36821S
Data byte low
Data byte high
Fig. 2 - I2C Bus Timing for Sending Word Command Format
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
VCNL36821S
ACK by
VCNL36821S
Command code
2
I C bus slave address byte
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
R
SA1
Start by
master
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
master
ACK by
VCNL36821S
Data byte low
2
I C bus slave address byte
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
master
Stop by
master
Data byte high
Fig. 3 - I2C Bus Timing for Receiving Word Command Format
Rev. 1.5, 03-Feb-2021
Document Number: 80150
5
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
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Vishay Semiconductors
TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
Axis Title
100
10000
1000
10000
100
1000
10
100
1000
60
50
40
100
30
20
1st line
2nd line
70
IF - Forward Current (mA)
1st line
80
1st line
2nd line
Relative Response (%)
1st line
90
10
0
400
500
600
700
800
900
1
10
1000
10
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Wavelength (nm)
2nd line
VF - Forward Voltage (V)
2nd line
Fig. 4 - PS Sensor Spectral Response
Fig. 6 - Forward Current vs. Forward Voltage
Axis Title
Axis Title
280
10 000
10000
10000
220
200
100
180
1000
50 mA
98 mA
156 mA
100
1000
1st line
2nd line
1000
Proximity Value (counts)
1st line
240
1st line
2nd line
IDD - Supply Current (μA)
1st line
260
100
10
160
Media: Kodak Gray Card
8T (50 μs), MPS = 1
140
10
-40
-20
0
20
40
60
80
100
1
0.1
1
10
100
10
1000
Temperature (°C)
2nd line
Distance to Reflecting Card (mm)
2nd line
Fig. 5 - IDD vs. Temperature
Fig. 7 - Proximity Value vs. Distance; PS_IT = 8T
Rev. 1.5, 03-Feb-2021
Document Number: 80150
6
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
APPLICATION INFORMATION
Pin Connection with the Host
VCNL36821S integrates proximity sensor, and IRED all together with I2C interface. It is very easy for the baseband (CPU) to
access PS output data via I2C interface without extra software algorithms. The hardware schematic is shown in the following
diagram.
Two additional capacitors in the circuit can be used for the following purposes: (1) one 1 μF capacitor near the VDD pin is used
for power supply noise rejection, a second one, close to the anode pin, is used to prevent the IRED voltage from instantly
dropping when the IRED is turned on and (2) 2.2 kΩ is suitable for the pull high resistor of I2C except 10 kΩ applied on INT pin.
Vpull_up
VDD
1 μF
2.2 kΩ
VLED
2.2 kΩ
3
6
8
SCL
SCL
1 μF
NC
VDD
7
SDA
SDA
Anode
5
10 kΩ
VCNL36821S
Baseband
2
GPIO
INT
Cathode
4
GND
1
Fig. 8 - Hardware Pin Connection Diagram
Digital Interface
VCNL36821S applies single slave address 0x60 (HEX) of 7-bit addressing following I2C protocol. All operations can be
controlled by the command register. The simple command structure helps users easily program the operation setting and latch
the light data from VCNL36821S. As Fig. 9 shows, VCNL36821S’s I2C command format is simple for read and write operations
between VCNL36821S and the host. The white sections indicate host activity and the gray sections indicate VCNL36821S’s
acknowledgement of the host access activity. Write word and read word protocol is suitable for accessing registers particularly
for 12-bit PS data. Interrupt can be cleared by reading data out from register: INT_Flag. All command codes should follow read
word and write word protocols.
Send byte → write command to VCNL36821S
1
7
1
1
8
1
8
1
8
1
1
S
Slave address
Wr
A
Command code
A
Data byte low
A
Data byte high
A
P
Receive byte → read data from VCNL36821S
1
7
1
1
8
1
1
7
1
1
8
1
8
1
1
S
Slave address
Wr
A
Command code
A
S
Slave address
Rd
A
Data byte low
A
Data byte high
N
P
S = start condition
P = stop condition
A = acknowledge
N = not acknowledge
Host action
VCNL36821S response
Fig. 9 - Write Word and Read Word Protocol
Rev. 1.5, 03-Feb-2021
Document Number: 80150
7
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
Function Description
VCNL36821S supports different kinds of mechanical designs to achieve the best proximity detection performance for any color
of object with more flexibility. The basic PS function settings, such as duty ratio, integration time, interrupt, and PS enable /
disable and persistence, are handled by the register: PS_CONF2_LOW. Duty ratio controls the PS response time. Integration
time represents the duration of the energy being received. The interrupt is asserted when the PS detection levels over the high
threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the interrupt function is enabled,
the host reads the PS output data from VCNL36821S that saves host loading from periodically reading PS data. More than that,
INT flag (register: INT_Flag) indicates the behavior of INT triggered under different conditions. PS persistence (PS_PERS) sets
up the PS INT asserted conditions as long as the PS output value continually exceeds the threshold level. The intelligent
cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon.
A smart persistence (register: PS_SMART_PERS) is provided to get faster PS response time and prevent false trigger for PS.
TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION
COMMAND
CODE
DATE BYTE
LOW / HIGH
0x00
0x03
0x04
0x05
0x06
0x07
0x08
0xF8
0xF9
0xFA
0xFB
REGISTER
NAME
R/W
DEFAULT
VALUE
L
PS_CONF1_LOW
R/W
0x01
H
PS_CONF1_HIGH R / W
0x00
Standby and on / off
0x01
PS period, persistence, interrupt, smart persistence and PS
start / stop
L
PS_CONF2_LOW
R/W
H
PS_CONF2_HIGH R / W
FUNCTION DESCRIPTION
Standby and on / off
0x00
PS integration time, multi pulse and interrupt function
L
PS_CONF3
R/W
0x00
PS force mode and sunlight light protect interrupt setting
H
PS_CONF4
R/W
0x00
PS LED current
L
PS_THDL
R/W
0x00
PS low interrupt threshold setting
H
PS_THDL
R/W
0x00
PS low interrupt threshold setting
L
PS_THDH
R/W
0x00
PS high interrupt threshold setting
H
PS_THDH
R/W
0x00
PS high interrupt threshold setting
L
PS_CANC_L
R/W
0x00
PS cancellation LSB setting
H
PS_CANC_M
R/W
0x00
PS cancellation MSB setting
L
PS_AC_L
R/W
0x00
PS auto-calibration period, number, interrupt setting
H
PS_LPPERI
R/W
0x00
PS low power mode setting
L
PS_Data_L
R
0x00
PS channel LSB output data
H
PS_Data_M
R
0x00
PS channel MSB output data
L
Reserved
R
0x00
Reserved
H
INT_Flag
R
0x00
PS interrupt flag
Device ID LSB
L
ID_L
R
0x26
H
ID_M
R
0x00
Device ID MSB
L
PS_AC_Data_L
R
0x00
PS auto-calibration LSB data
H
PS_AC_Data_H
R
0x00
PS auto-calibration MSB data, busy and sunlight protect
Note
• All of reserved register are used for internal test. Please keep as default setting
Rev. 1.5, 03-Feb-2021
Document Number: 80150
8
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
Command Register Format
VCNL36821S provides an 8-bit command register for PS controlling independently. The description of each command format
is shown in the following tables.
TABLE 2 - REGISTER: PS_CONF1_LOW DESCRIPTION
REGISTER NAME
Command
PS_INIT
Reserved
COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
Bit
7
6:2
Description
Must be set to “1” when power on ready
Default = (0 : 0 : 0 : 0 : 0)
Set this bit = “1” to enable bias circuit
PS_ON
1
Note
• Initiallization process: step 1: set PS_ON = “1”; step 2: set PS_INIT = “1”
Reserved
0
Default = 1, must always stay = 1
TABLE 3 - REGISTER: PS_CONF1_HIGH DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)
Command
Bit
Reserved
7:2
Description
Reserved
1
Must be set to “1” when power on ready
Reserved
0
Default = 0
Default = (0 : 0 : 0 : 0 : 0)
TABLE 4 - REGISTER: PS_CONF2_LOW DESCRIPTION
REGISTER NAME
Command
COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)
Bit
Description
PS_Period
7:6
(0 : 0) = 10 ms, (0 : 1) = 20 ms, (1 : 0) = 40 ms, (1 : 1) = 80 ms
PS sample period setting
PS_PERS
5:4
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4
PS interrupt persistence setting
PS_ INT
3:2
(0 : 0) = interrupt disable, (0 : 1) = logic high / low mode, (1 : 0) = first high, (1 : 1) = interrupt enable
PS_SMART_PERS
1
0 = disable PS smart persistence, 1 = enable PS smart persistence
PS_ST
0
0 = PS start, 1 = PS stop, default = 1; for active force mode set AF = 1 before setting PS_ST = 0
TABLE 5 - REGISTER: PS_CONF2_HIGH DESCRIPTION
REGISTER NAME
Command
COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)
Bit
Description
PS_IT
7:6
(0 : 0) = 1T, (0 : 1) = 2T, (1 : 0) = 4T, (1 : 1) = 8T
PS_MPS
5:4
(0 : 0 ) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8;
PS multi-pulse setting
PS_ITB
PS_HG
Reserved
Rev. 1.5, 03-Feb-2021
3
2
1:0
0: ITB = 25 μs, 1: ITB = 50 μs
0 = disable, 1 = enable, PS high gain mode
Default = (0 : 0)
Document Number: 80150
9
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Not for New Designs
VCNL36821S
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Vishay Semiconductors
TABLE 6 - REGISTER: PS_CONF3 DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)
Command
Bit
Reserved
7
PS_AF
6
0 = auto mode; 1 = force mode
5
0 = no PS active force mode trigger, 1 = trigger one time cycle
VCNL36821S output one cycle data every time host writes in “1” to sensor. The state returns to “0”
automatically
PS_FOR_Trig
Description
Default = 0
PS_FORCENUM
4
0 = one detect cycle after trigger, 1 = two detect cycle after trigger
Reserved
3
When use PS function, must write “1”
PS_SP_INT
Reserved
2
1:0
0 = disable, 1 = enable, PS sunlight light protect INT setting
Reserved
TABLE 7 - REGISTER: PS_CONF4 DESCRIPTION
REGISTER NAME
Command
PS_SC
Reserved
LED_I
COMMAND CODE: 0x04_H (0x04 DATA BYTE HIGH)
Bit
7:5
4
3:0
Description
Default = (0 : 0 : 0), with all 3 bit = “1”, (1 : 1 : 1), sunlight cancellation is enabled
Default = 0
(1 : 0 : 0 : 0) = 50 mA; (1 : 0 : 0 : 1) = 66 mA; (1 : 0 : 1 : 0) = 82 mA; (1 : 0 : 1 : 1) = 98 mA;
(1 : 1 : 0 : 0) = 114 mA; (1 : 1 : 0 : 1) = 130 mA; (1 : 1 : 1 : 0) = 144 mA; (1 : 1 : 1 : 1) = 156 mA;
LED current selection setting
TABLE 8 - REGISTER: PS_THDL DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x05_L (0x05 DATA BYTE LOW) AND 0x05_H (0x05 DATA BYTE HIGH)
Command
Bit
PS_THDL
7:0
0x00 to 0xFF, PS interrupt low threshold setting
Description
PS_THDL
3:0
0x00 to 0x0F, PS interrupt low threshold setting
TABLE 9 - REGISTER: PS_THDH DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x06_L (0x06 DATA BYTE LOW) AND 0x06_H (0x06 DATA BYTE HIGH)
Command
Bit
PS_THDH
7:0
00H to FFH, PS interrupt high threshold setting
Description
PS_THDH
3:0
00H to 0FH, PS interrupt high threshold setting
TABLE 10 - REGISTER: PS_CANC DESCRIPTION
REGISTER NAME
Command
COMMAND CODE: 0x07_L (0x07 DATA BYTE LOW) AND 0x07_H (0x07 DATA BYTE HIGH)
Bit
Description
PS_CANC_L
7:0
0x00 to 0xFF, PS intelligent cancellation level setting
PS_CANC_H
3:0
0x00 to 0x0F, PS intelligent cancellation level setting
TABLE 11 - REGISTER: PS_AC DESCRIPTION
REGISTER NAME
Command
COMMAND CODE: 0x08_L (0x08 DATA BYTE LOW)
Bit
Description
PS_AC_PERIOD
7:6
(0 : 0) = 3 ms, (0 : 1) = 6 ms, (1 : 0) = 12 ms, (1 : 1) = 24 ms; PS auto-calibration detect sample period setting
PS_AC_NUM
5:4
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8; PS auto-calibration detect sample number setting
PS_AC
3
PS_AC_TRIG
2
0 = disable, 1 = enable; trigger one time auto-calibration
Reserved
1
Reserved
PS_AC_INT
0
0 = disable, 1 = enable; PS auto-calibration INT setting
Rev. 1.5, 03-Feb-2021
0 = disable, 1 = enable; PS auto-calibration enable; need set PS_AF = 1
Document Number: 80150
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
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Vishay Semiconductors
TABLE 12 - REGISTER: PS_LP DESCRIPTION
REGISTER NAME
COMMAND CODE: 0x08_H (0x08 DATA BYTE HIGH)
Command
Bit
Reserved
7:3
Default = (0 : 0 : 0 : 0 : 0)
PS_LPPER
2:1
(0 : 0) = 40 ms, (0 : 1) = 80 ms, (1 : 0) = 160 ms, (1 : 1) = 320 ms; PS detection period setting at low power
mode (PS_LPEN = 1)
0
0 = disable, 1 = enable = starts proximity low power measurements; now PS_LPPER used as periode, but
LED_I, PS_IT, PS_ITB, PS_MPS as defined within register 3 and register 4
PS_LPEN
Description
TABLE 13 - READ OUT REGISTER DESCRIPTION
Register
Command Code
Bit
Description
PS_Data_L
0xF8_L (0xF8 data byte low)
7:0
0x00 to 0xFF, PS output data
PS_Data_M
0xF8_H (0xF8 data byte high)
3:0
0x00 to 0x0F, PS output data
INT_Flag
0xF9_H (0xF9 data byte high)
7:6
5
4
3
2
1
0
Reserved
PS_ACFLAG, after PS finishing auto-calibration, INT raise
PS_SPFLAG, PS entering protection mode
Reserved
Reserved
PS_IF_CLOSE, PS rises above PS_THDH INT trigger event
PS_IF_AWAY, PS drops below PS_THDL INT trigger event
ID_L
FAH_L (FAH data byte low)
7:0
Default = 0010 0110, device ID LSB byte
ID_M
FAH_H (FAH data byte high)
7:6
5:4
3:0
(0 : 0)
(0 : 0) slave address = 0x60
Version code (0 : 0 : 0 : 0) device ID MSB byte
PS_AC_Data_L
0xFB_L (0xFB data byte low)
7:0
0x00 to 0xFF, PS auto-calibration data (LSB)
0xFB_H (0xFB data byte high)
7
6
5:4
3:0
AC_BUSY, when AC, the bit will be “1”
AC_SUN, PS enters sunlight protect during auto-calibration
Reserved
0x00 to 0xFF, PS auto-calibration data (MSB)
PS_AC_Data_H
Initialization
VCNL36821S includes default values for each register. As long as power is on, it is ready to be controlled by host via I2C bus.
Proximity Interrupt
There are three different Interrupt methods: “normal” interrupt mode, first high mode and so-called “logic high / low” mode.
The first high mode is selected by setting (0x03_L, bit 3:2 = 1:0) within register PS_CONF2_LOW. In this mode, the initial
interrupt that is triggered needs to be with regard to the high threshold (PS_THDH). Passing underneath the low threshold will
have no effect until the first high threshold event has occurred. In this mode, the interrupt event will remain set, until it is cleared,
by reading the interrupt register.
The “normal” interrupt mode is selected with PS_INT = interrupt enabled (0x03_L, bit 3 : 2 = 1 : 1) within register
PS_CONF2_LOW.
Tests with ready-made application will show where to set the value for high threshold (PS_THDH) and low threshold (PS_THDL).
For more information and explanation please study also the application note www.vishay.com/doc?80178.
The “logic high / low” mode is selected with PS_INT = trigger by logic high/low mode (0x03_L, bit 3 : 2 = 0 : 1) within register
PS_CONF2_LOW. When this mode is selected, the interrupt pin is pulled low when the proximity counts reach the programmed
high threshold (PS_THDH) and will return to high level when counts drop below the count value for low threshold (PS_THDL).
With help of the function PS persistence one may also improve a reliable detection that not just one short event directly triggers
an interrupt, but only when 2 (or up to 4) consecutive proximity measurements are above the programmed threshold value the
interrupt will be set; please see also within the application note www.vishay.com/doc?80178.
Rev. 1.5, 03-Feb-2021
Document Number: 80150
11
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
PROXIMITY LOW POWER CONSUMPTION MODE
While register PS_LPEN set to 1, proximity sensor operates in a special low power consumption mold offering significant lower
power consumption of just 17.6 μA with response time of 320 ms for proximity detection that is a remarkable feature for any
fuctions required a lower power consumtion operations and did not want to always request one proximity measurement with
proximity force mode (PS_AF and PS_TRIG).
PS period (ms)
Normal mode (μA)
Low power mode (μA)
10
20
40
80
160
2794
1492
841
515
n/a
320
n/a
n/a
n/a
106
56
30
17.6
Notes
• IR LED = 130 mA, PS_IT = x 4, PS_ITB = 50 μs
• While register PS_LPEN = 1, proximity sensor
PROXIMITY DETECTION HYSTERESIS
A PS detection hysteresis is important that keeps PS state in a certain range of detection distance. For example, PS INT asserts
when PS value over PS_THDH. Host switches off panel backlight and then clears INT. When PS value is less than PS_THDL,
host switches on panel backlight. Any PS value lower than PS_THDH or higher than PS_THDL, PS INT will not be asserted. Host
does keep the same state.
Vpull_up
VDD
1 μF
2.2 kΩ
VLED
2.2 kΩ
3
6
8
SCL
SCL
1 μF
NC
VDD
7
SDA
SDA
Anode
5
10 kΩ
VCNL36821S
Baseband
GPIO
2
INT
Cathode
4
GND
1
Fig. 10 - VCNL36821S Reference Circuit Connection With Host (proximity detection logic output mode)
(VCNL36821S INT pin connecting to BB GPIO instead of INT pin)
Rev. 1.5, 03-Feb-2021
Document Number: 80150
12
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
PACKAGE INFORMATION in millimeters
Top view
Side view
Bottom view
1.0 ± 0.1
Ø0
4
1
0.455
8
0.250
0.400
0.620
0.400
0.92
0.38
2.55 ± 0.1
.40
5
0.638
5
0.10 ± 0.05
0.250
8
1
1.440
1
GND
5
2
INT
6
VDD
3
NC
7
SDA
4
LED_C
8
SCL
0.638
4
0.455
0.410
LED_A
0.1 ± 0.05
2.05 ± 0.1
Fig. 11 - VCNL36821S Package Dimensions
LAYOUT PAD INFORMATION in millimeters
0.500
0.310
0.638
Recommended footprint
0.510
1.440
Fig. 12 - VCNL36821S PCB Layout Footprint
Rev. 1.5, 03-Feb-2021
Document Number: 80150
13
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
APPLICATION CIRCUIT BLOCK REFERENCE
Vpull_up
VDD
1 μF
2.2 kΩ
VDD_LED
2.2 kΩ
3
6
8
SCL
SCL
1 μF
NC
VDD
7
SDA
SDA
Anode
5
10 kΩ
VCNL36821S
Baseband
GPIO
2
INT
Cathode
4
GND
1
Fig. 13 - VCNL36821S Application Circuit
RECOMMENDED STORAGE AND REBAKING CONDITIONS
PARAMETER
MIN.
MAX.
UNIT
Storage temperature
5
50
°C
Relative humidity
-
60
%
Open time
-
168
h
From the date code on the aluminized envelope (unopened)
-
12
months
Tape and reel: 60 °C
-
22
h
Tube: 60 °C
-
22
h
Total time
Rebaking
Rev. 1.5, 03-Feb-2021
CONDITIONS
Document Number: 80150
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
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Vishay Semiconductors
RECOMMENDED INFRARED REFLOW
Soldering conditions which are based on J-STD-020 C
IR REFLOW PROFILE CONDITION
PARAMETER
CONDITIONS
Peak temperature
TEMPERATURE
TIME
260 °C + 5 °C / - 5 °C (max.: 265 °C)
10 s
150 °C to 200 °C
60 s to 180 s
Preheat temperature range and timing
Timing within 5 °C to peak temperature
Timing maintained above temperature / time
Timing from 25 °C to peak temperature
-
10 s to 30 s
217 °C
60 s to 150 s
-
8 min (max.)
Ramp-up rate
3 °C/s (max.)
-
Ramp-down rate
6 °C/s (max.)
-
Temperature (°C)
Recommend Normal Solder Reflow is 235 °C to 265 °C
Max. Temperature
260 °C + 5 °C / - 5 °C/10 s
260
200
150
Ramp-Down Rate
6 °C/s (max.)
Ramp-Up Rate
3 °C/s (max.)
217
Soldering Zone
60 s to 150 s
Ramp-Up Rate
3 °C/s (max.)
Pre-Heating Time
t2 - t1 = 60 s to 180 s
t2
t1
Time (s)
Fig. 14 - VCNL36821S Solder Reflow Profile Chart
RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING
1. Solder the device with the following conditions:
1.1. Soldering temperature: 400 °C (max.)
1.2. Soldering time: 3 s (max.)
2. If the temperature of the method portion rises in addition to the residual stress between the leads, the possibility that an
open or short circuit occurs due to the deformation or destruction of the resin increases
3. The following methods: VPS and wave soldering, have not been suggested for the component assembly
4. Cleaning method conditions:
4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol
4.2. Solvent temperature < 45 °C (max.)
4.3. Time: 3 min (min.)
Rev. 1.5, 03-Feb-2021
Document Number: 80150
15
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
VCNL36821S
www.vishay.com
Vishay Semiconductors
TAPE PACKAGING INFORMATION in millimeters
12.0 ± 0.1
Ø 60 ± 0.5
Ø 178 ± 1
0.
60
5
Ø
±
±
Ø
5
13
0.
4.00 ± 0.10
2.00 ± 0.05
Ø 1.50 + 0.10 / - 0
1.75 ± 0.10
+
+
+
+
+
+
0.23 ± 0.05
3.50 ± 0.10
8.00 ± 0.20
+
+
The dot means pin 1 area, will not show
on top, but shows on bottom pad
Ø 1.00 ± 0.10
2.25 ± 0.05
5
4
8
1
2.75 ± 0.05
1.20 ± 0.05
Bottom view
Rev. 1.5, 03-Feb-2021
Document Number: 80150
16
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
www.vishay.com
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
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consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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Revision: 01-Jan-2021
1
Document Number: 91000
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