VCNL4200
www.vishay.com
Vishay Semiconductors
High Sensitivity Long Distance Proximity and
Ambient Light Sensor With I2C Interface
FEATURES
• Package type: surface-mount
• Dimensions (L x W x H in mm): 8.0 x 3.0 x 1.8
• Integrated modules: infrared emitter (IRED),
ambient light sensor (ALS), proximity sensor
(PS), and signal conditioning IC
• Operates ALS and PS in parallel structure
• FiltronTM technology adoption
background light cancellation
for
robust
• Supports low transmittance (dark) lens design
• Temperature compensation: -40 °C to +85 °C
DESCRIPTION
VCNL4200 integrates a high sensitivity long distance
proximity sensor (PS), ambient light sensor (ALS), and
940 nm IRED into one small package. It incorporates
photodiodes, amplifiers, and analog to digital converting
circuits into a single chip using a CMOS process. The 16-bit
high resolution ALS offers excellent sensing capabilities
with sufficient selections to fulfill most applications whether
a dark or high transparency lens design. VCNL4200 offers
individual programmable high and low threshold interrupt
features for the best utilization of resources and power
saving on the microcontroller. For the 12-bit / 16-bit
proximity sensing function, VCNL4200 has a built-in
intelligent cancellation scheme that eliminates background
light issues. The persistence feature prevents false
judgment of proximity sensing due to ambient light noise.
FiltronTM
• Low power consumption I2C (SMBus compatible)
interface
• Floor life: 168 h, MSL 3, according to J-STD-020
• Output type: I2C bus (ALS / PS)
• Operation voltage: 2.5 V to 3.6 V
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PROXIMITY FUNCTION
• Immunity to red glow (940 nm IRED)
• Intelligent background light cancellation
• Smart persistence scheme to reduce PS response time
• Proximity distance up to 1.5 m
technology achieves
The adoption of the patented
the closest ambient light spectral sensitivity to real human
eye responses. VCNL4200 provides excellent temperature
compensation capability for keeping the output stable under
changing temperature. ALS and PS functions are easily
operated via the simple command format of I2C (SMBus
compatible) interface protocol. Operating voltage ranges
from 2.5 V to 3.6 V.
AMBIENT LIGHT FUNCTION
PIN DEFINITION
• Programmable interrupt function for ALS and PS with
upper and lower thresholds
5
4
3
2
1
6
7
8
9
10
• Fluorescent light flicker immunity
• Spectrum close to real human eye responses
• Selectable maximum detection range (197 / 393 / 786 /
1573) lux with highest sensitivity 0.003 lux/step
INTERRUPT
• Adjustable persistence to prevent false triggers for ALS
and PS
APPLICATIONS
Top View
• Presence detection to activate displays in printers,
copiers, and home appliances
• Collision detection in robots and toys
1
GND
6
LED+
2
LED_CATHODE
7
NC
• Proximity sensing and lighting control in offices, corridors
and public buildings
3
VDD
8
INT
• Parking space availability in lots and garages
4
NC
9
SDAT
5
LED-
10
SCLK
Rev. 1.4, 16-Oct-2019
• Proximity detection in lavatory appliances
Document Number: 84430
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PRODUCT SUMMARY
PART
NUMBER
OPERATING
RANGE
(mm)
VCNL4200
0 to 1500
OPERATING I2C BUS
IRED PULSE
VOLTAGE VOLTAGE
CURRENT
RANGE
RANGE
(mA)
(V)
(V)
2.5 to 3.6
1.8 to 3.6
AMBIENT
LIGHT
RANGE
(lx)
800 (1)
AMBIENT
ADC RESOLUTION
LIGHT
OUTPUT
PROXIMITY /
RESOLUTION
CODE
AMBIENT LIGHT
(lx)
0.003 to 1573
0.003
16 bit, I2C
12 bit / 16 bit
Note
(1) Maximum allowed current for VCNL4200 internal IRED
ORDERING INFORMATION
ORDERING CODE
PACKAGING
VOLUME (1)
PIN NUMBER
REMARKS
VCNL4200
Tape and reel
MOQ: 2500 pcs
10
8.0 mm x 3.0 mm x 1.8 mm
Note
MOQ: minimum order quantity
(1)
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
Supply voltage
TEST CONDITION
VDD
-
5.0
UNIT
V
Operation temperature range
Tamb
-40
+85
°C
Storage temperature range
Tstg
-40
+100
°C
RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
MAX.
UNIT
VDD
2.5
3.6
V
Operation temperature range
Tamb
-40
+85
°C
I2C bus operating frequency
f(I2CCLK)
10
400
kHz
Supply voltage
PIN DESCRIPTIONS
PIN ASSIGNMENT
SYMBOL
TYPE
1
GND
I
FUNCTION
Ground
2
LED_CATHODE
I
IRED cathode connection
3
VDD
I
Power supply input
4
NC
-
No connection
5
LED-
O
IRED cathode
6
LED+
I
IRED anode
7
NC
-
No connection
8
INT
O
Interrupt pin
9
SDAT
I / O (open drain)
I2C data bus data input / output
10
SCLK
I
I2C digital bus clock input
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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BLOCK DIAGRAM
VDD
PS timing
controller
LED+
PS
buffer
DSP
IRED
LED-
PS
PD
Oscillator
INT
SCLK
SDAT
LED driver
LED_CATHODE
Temperature
sensor
I2C bus logic
control
ALS
PD
ALS
16-bits
data
buffer
Low pass filter
GND
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
VDD
2.5
-
3.6
V
VIRED
3.8
-
5.5
V
Excluded LED driving
IDD
-
350
-
μA
Light condition = dark, VDD = 3.3 V
IDD (SD)
-
0.2
-
μA
ALS disable, PS enable
IALSSD
-
300
-
μA
ALS enable, PS disable
IPSSD
-
213
-
μA
VIH
1.5
-
-
VIL
-
-
0.8
VIH
1.4
-
-
VIL
-
-
0.6
Peak sensitivity wavelength of ALS
λp
-
550
-
Peak sensitivity wavelength of PS
λpps
-
940
-
nm
16-bit resolution
-
-
65 535
steps
steps
Supply voltage
Supply voltage for IRED
Supply current
Shutdown current
ALS shut down
PS shut down
Logic high
I2C signal input
Logic low
Logic high
Logic low
Full ALS counts
Full PS counts
VDD = 3.3 V
VDD = 2.6 V
V
nm
12-bit / 16-bit resolution
-
-
4095 / 65 535
Minimum
IT = 400 ms, VDD = 3.3 V,
1 step (1)(2)
-
0.003
-
Maximum
IT = 50 ms, VDD = 3.3 V,
65 535 steps (1)(2)
-
1573
-
IT = 50 ms, VDD = 3.3 V,
normal sensitivity (1)
0
-
3
-40
-
+85
°C
-
-
800
mA
Detectable intensity
ALS dark offset
Operating temperature range
IRED driving current
V
lx
Tamb
(3)
steps
Notes
(1) Light source: white LED
(2) Maximum detection range to ambient light can be determined by ALS refresh time adjustment. Refer to table 17 “ALS Resolution and
Maximum Detection Range”
(3) Based on IRED on / off duty ratio = 1/160, 1/320, 1/640, and 1/1280. The circuitry should use an external MOSFET as shown with Fig.11.
Please see also the Application Note “Designing the VCNL4200 into an Application” (www.vishay.com/doc?84327)
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
Clock frequency
STANDARD MODE
MIN.
MAX.
f(SMBCLK)
10
t(BUF)
4.7
t(HDSTA)
Repeated start condition setup time
Stop condition setup time
Data hold time
t(HDDAT)
Data setup time
Bus free time between start and stop condition
Hold time after (repeated) start condition;
after this period, the first clock is generated
FAST MODE
UNIT
MIN.
MAX.
100
10
400
kHz
-
1.3
-
μs
4.0
-
0.6
-
μs
t(SUSTA)
4.7
-
0.6
-
μs
t(SUSTO)
4.0
-
0.6
-
μs
3450
-
900
ns
t(SUDAT)
250
-
100
-
ns
I2C clock (SCK) low period
t(LOW)
4.7
-
1.3
-
μs
I2C clock (SCK) high period
t(HIGH)
4.0
-
0.6
-
μs
Clock / data fall time
t(F)
-
300
-
300
ns
Clock / data rise time
t(R)
-
1000
-
300
ns
t(LOW)
I2C BUS
CLOCK
(SCLK)
t(R)
t(F)
VIH
VIL
t(HDSTA)
t(HIGH)
t(SUSTA)
t(SUSTO)
t(BUF)
t(HDDAT)
I2C BUS
DATA
(SDAT)
t(SUDAT)
VIH
VIL
{
P
Stop condition
{
{
S
Start condition
{
S
Start
P
Stop
t(LOSEXT)
SCLKACK
t(LOWMEXT)
SDAACK
t(LOWMEXT)
t(LOWMEXT)
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
Fig. 1 - I2C Bus Timing Diagram
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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PARAMETER TIMING INFORMATION
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA5
SA6
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA1
SA2
SA0
ACK by
VCNL4200
ACK by
VCNL4200
2
I C bus slave address byte
Command code
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA4
SA5
SA2
SA3
SA7
SA0
SA1
SA6
SA4
SA5
SA3
SA2
SA1
SA0
ACK by
VCNL4200
ACK by
VCNL4200
Data byte low
Stop by
master
Data byte high
Fig. 2 - I2C Bus Timing for Sending Word Command Format
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
W
SA1
SA2
Start by
master
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
VCNL4200
ACK by
VCNL4200
Command code
2
I C bus slave address byte
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
R
SA1
Start by
master
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK by
master
ACK by
VCNL4200
Data byte low
2
I C bus slave address byte
I2C BUS
CLOCK
(SCLK)
I2C BUS
DATA
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
NACK by
master
Stop by
master
Data byte high
Fig. 3 - I2C Bus Timing for Receiving Word Command Format
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
Axis Title
100
PS
ALS
70
1000
1st line
2nd line
60
50
40
100
30
20
10
230
220
1000
210
1st line
2nd line
80
10000
240
Relative Radiant Intensity
IDD - Supply Current (A)
90
200
190
100
180
170
160
500
700
600
800
900
10
150
-40
-20
Wavelength (nm)
2nd line
20
0
100
Fig. 7 - IDD vs.Temperature
Axis Title
10°
0°
110
20°
10000
80
1000
1st line
2nd line
70
60
50
40
100
30
20
10
Relative Radiant Intensity
90
Ie, rel - Relative Radiant Intensity
30°
100
Relative Radiant Intensity
Normalized Output (%)
80
60
Tamb - Ambient Temperature (°C)
2nd line
Fig. 4 - Normalized Spectral Response
40°
1.0
0.9
50°
0.8
60°
70°
0.7
80°
10
0
-90
-60
0
-30
30
60
0.6
90
0.4
0.2
0
View Angle
2nd line
Tamb - Ambient Temperature (°C)
2nd line
Fig. 5 - ALS Normalized Output vs. View Angle
Fig. 8 - Relative Radiant Intensity vs. Angular Displacement
Axis Title
Axis Title
70 000
1.0
10000
10000
0.9
1000
40 000
200 ms
30 000
100 ms
20 000
100
50 ms
10 000
0.8
0.7
1000
0.6
1st line
2nd line
400 ms
1st line
2nd line
50 000
Relative Radiant Intensity
Relative Radiant Intensity
60 000
Step
Step
40
2nd line
400
10
1000 1100
Angular Displacement
0
ϕ-
Relative Radiant Intensity
Relative Response (%)
250
10000
0.5
0.4
100
0.3
0.2
0.1
0
0
10
250 500 750 1000 1250 1500 1750 2000
0
-100 -75
10
-50
-25
0
25
50
75
100
Lux
2nd line
View Angle
2nd line
Fig. 6 - ALS Refresh Time vs. Maximum Detection Range
Fig. 9 - Relative Radiant Intensity vs. Angular Displacement
(Cartesian view)
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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Axis Title
1000
10000
100
1000
10
100
1st line
2nd line
IF - Forward Current (mA)
1st line
tp = 100 μs
1
10
1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
VF - Forward Voltage (V)
2nd line
Fig. 10 - Forward Current vs. Forward Voltage
APPLICATION INFORMATION
Pin Connection with the Host
VCNL4200 is a cost effective solution of a long distance proximity sensor with I2C interface. The standard serial digital interface
easily accesses “light intensity” by using simple calculations.
Application circuitry below shows the added MOSFET which is driven by the ASIC’s pin 2. A 1 kΩ pull-up resistor needs to be
added here. The RLED defines the current through the IRED. A small 0.1 μF is sufficient at VDD for power supply noise rejection,
but a 2.2 μF should be placed at VIRED to provide the energy for the IRED.
For the I2C bus design, the pull-up voltage refers to the I/O specification of the baseband due to its “open drain” design. The
pull-high resistors for the I2C bus lines are recommended to be ≥ 2.2 kΩ.
Vpull up
VDD
VIRED
0.1 μF
2.2 kΩ
2.2 kΩ
2.2 μF
1 kΩ
3
VDD
10
SCLK
SCLK
SCK
9
SDA
MCU
S
LED 2
CATHODE
PMOS
G
D
SDAT
VCNL4200
8.2 kΩ
LED+ 6
INT
8
LED- 5
INT
INT
GND
RLED
2.7 Ω
1
Fig. 11 - Application Diagram
Notes
• VDD range: 2.5 V to 3.6 V and VIRED is recommended 5.0 V
• Power path of VDD and VIRED should be routed separately up to stable power source
• The RLED resister value should be evaluated within ready-made application and the current through VCNL4200-internal IRED should not
exceed 800 mA
• LED_I programmed to lowest value of 50 mA is enough to drive the FET
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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Digital Interface
VCNL4200 applies single 7-bit slave address 0x51 (HEX) following I2C protocol. All operations can be controlled by the
command register. The simple command structure helps users easily program the operation setting and latch the light data from
VCNL4200. As fig. 12 shows, VCNL4200’s I2C command format is simple for read and write operations between VCNL4200
and the host. The white sections indicate host activity and the gray sections indicate VCNL4200’s acknowledgement of the host
access activity. Write word and read word protocols are suitable for accessing registers particularly for 16-bit ALS data and
12-bit / 16-bit PS data. Interrupt can be cleared by reading data out from register: INT_Flag.
Send Byte ɦ Write Command to VCNL4200
1
S
1
1
8
1
8
1
8
1
1
Wr
A
Command Code
A
Data Byte Low
A
Data Byte High
A
P
7
Slave Address
Receive Byte ɦ Read Data from VCNL4200
1
7
1
1
8
1
1
7
1
1
8
1
8
1
1
S
Slave Address
Wr
A
Command Code
A
S
Slave Address
Rd
A
Data Byte Low
A
Data Byte High
N
P
S = start condition
P = stop condition
A = acknowledge
N = no acknowledge
Shaded area = VCNL4200 acknowledge
Fig. 12 - Command Protocol Format
Function Description
VCNL4200 applies a 16-bit high resolution ALS that provides the best ambient light sensing capability up to 0.003 lx/step which
works well under a low transmittance lens design (dark lens). Please also note from Fig. 5, that the viewing angle of the ALS is
very small, so accurate values will only be measured, if the light source is directly above the sensor. A flexible interrupt function
of ALS (register: ALS_CONF) is also supported. The INT signal will not be asserted by VCNL4200 if the ALS value is not over
high INT threshold window level, or lower than low INT threshold window level of ALS. As long as the ALS INT is asserted, the
host can read the data from VCNL4200.
For proximity sensor function, VCNL4200 supports different kinds of mechanical design to achieve the best proximity detection
performance for any color object. The basic PS function settings, such as duty ratio, integration time, interrupt, and PS enable
/ disable and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS response time. Integration time
represents the duration for which the detector is sensitive to be reflected light. The interrupt is asserted when the PS detection
goes over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the interrupt
function is enabled, the host reads the PS output data from VCNL4200 that saves host from periodically reading PS data.
Additionaly INT flag (register: INT_Flag) indicates the behavior of INT triggered under different conditions. PS persistence
(PS_PERS) sets up the PS INT asserted conditions as long as the PS output value continually exceeds the threshold level.
PS_MS enables the interrupt logic mode, where the interrupt is triggered by surpassing the high threshold and is automatically
reset when the signal falls below the low threshold.
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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Descriptions of each of these settings are shown in table 1.
TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION
COMMAND
CODE
REGISTER
NAME
R/W
DEFAULT
VALUE
FUNCTION DESCRIPTION
00H_L
ALS_CONF
R/W
01H
00H_H
Reserved
R/W
00H
ALS integration time, persistence, interrupt, and function enable / disable
Reserved
01H_L
ALS_THDH_L
R/W
00H
ALS high interrupt threshold, LSB
01H_H
ALS_THDH_H
R/W
00H
ALS high interrupt threshold, MSB
02H_L
ALS_THDL_L
R/W
00H
ALS low interrupt threshold, LSB
02H_H
ALS_THDL_H
R/W
00H
ALS low interrupt threshold, MSB
03H_L
PS_CONF1
R/W
01H
PS duty ratio, integration time, persistence, and PS enable / disable
03H_H
PS_CONF2
R/W
00H
PS_HD, PS interrupt trigger method
04H_L
PS_CONF3
R/W
00H
PS multi pulse, active force mode, enable sunlight cancellation
04H_H
PS_MS
R/W
00H
PS mode selection, sunlight capability, sunlight protection mode
05H_L
PS_CANC_L
R/W
00H
PS cancellation level setting, LSB
05H_H
PS_CANC_H
R/W
00H
PS cancellation level setting, MSB
06H_L
PS_THDL_L
R/W
00H
PS low interrupt threshold setting, LSB
06H_H
PS_THDL_H
R/W
00H
PS low interrupt threshold setting, MSB
07H_L
PS_THDH_L
R/W
00H
PS high interrupt threshold setting, LSB
PS high interrupt threshold setting, MSB
07H_H
PS_THDH_H
R/W
00H
08H_L
PS_Data_L
R
00H
PS LSB output data
08H_H
PS_Data_H
R
00H
PS MSB output data
09H_L
ALS_Data_L
R
00H
ALS LSB output data
09H_H
ALS_Data_H
R
00H
ALS MSB output data
0AH_L
White_Data_L
R
00H
White LSB output data
0AH_H
White_Data_H
R
00H
White MSB output data
0BH_L
Reserved
R
00H
Reserved
0BH_H
Reserved
R
00H
Reserved
0CH_L
Reserved
R
00H
Reserved
0CH_H
Reserved
R
00H
Reserved
0DH_L
Reserved
R
00H
Reserved
0DH_H
INT_Flag
R
00H
ALS, PS interrupt flags
0EH_L
ID_L
R
58H
Device ID LSB
0EH_H
ID_H
R
10H
Device ID MSB
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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Command Register Format
VCNL4200 provides an 8-bit command register for ALS and PS controlling independently. The description of each command
format is shown in following tables.
TABLE 2 - REGISTER: ALS_CONF DESCRIPTION
REGISTER NAME
Command
COMMAND CODE: 00H_L (00H DATA BYTE LOW)
Bit
7
6
ALS_CONF
Command
ALS_IT
4
Bit
7:6
ALS_INT_SWITCH
5
Reserved
4
ALS_PERS
5
3
2
1
0
COMMAND CODE: 00H_L (00H DATA BYTE LOW)
3:2
Description
(0 : 0) = 50 ms; (0 : 1) = 100 ms; (1 : 0) = 200 ms; (1 : 1) = 400 ms
ALS integration time setting, longer integration time has higher sensitivity
ALS interrupt switch, 0 = ALS channel interrupt, 1 = white channel interrupt
Default = 0, reserved
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8
ALS interrupt persistence setting
ALS_INT_EN
1
0 = ALS interrupt disable, 1 = ALS interrupt enable
ALS_SD
0
0 = ALS power on, 1 = ALS shut down
TABLE 3 - REGISTER: RESERVE COMMAND DESCRIPTION
Reserved
COMMAND CODE: 00H_H (00H DATA BYTE HIGH)
Command
Bit
Reserved
7:0
Description
Default = 00H
TABLE 4 - REGISTER ALS_THDH_L AND ALS_THDH_H DESCRIPTION
ALS_THDH_L
ALS_THDH_H
Register
COMMAND CODE: 01H_L (01H DATA BYTE LOW)
COMMAND CODE: 01H_H (01H DATA BYTE HIGH)
Bit
Description
ALS_THDH_L
7:0
00H to FFH, ALS high interrupt threshold, LSB
ALS_THDH_H
7:0
00H to FFH, ALS high interrupt threshold, MSB
TABLE 5 - REGISTER: ALS_THDL_L AND ALS_THDL_H DESCRIPTION
ALS_THDL_L
ALS_THDL_H
Register
COMMAND CODE: 02H_L (02H DATA BYTE LOW)
COMMAND CODE: 02H_H (02H DATA BYTE HIGH)
Bit
Description
ALS_THDL_L
7:0
00H to FFH, ALS low interrupt threshold, LSB
ALS_THDL_H
7:0
00H to FFH, ALS low interrupt threshold, MSB
TABLE 6 - REGISTER: PS_CONF1 DESCRIPTION
PS_CONF1
Command
COMMAND CODE: 03H_L (03H DATA BYTE LOW)
Bit
Description
PS_Duty
7:6
(0 : 0) = 1/160, (0 : 1) = 1/320, (1 : 0) = 1/640, (1 : 1) = 1/1280
PS IRED on / off duty ratio setting
PS_PERS
5:4
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4
PS interrupt persistence setting
PS_ IT
3:1
(0 : 0 : 0) = 1T, (0 : 0 : 1) = 1.5T, (0 : 1 : 0) = 2T, (0 : 1 : 1) = 4T, (1 : 0 : 0) = 8T, (1 : 0 : 1) = 9T,
(1 : 1 : 0) = reserved, (1 : 1 : 1) = reserved
PS_SD
0
Rev. 1.4, 16-Oct-2019
0 = PS power on, 1 = PS shut down
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TABLE 7 - REGISTER: PS_CONF2 DESCRIPTION
PS_CONF2
COMMAND CODE: 03H_H (03H DATA BYTE HIGH)
Command
Bit
Reserved
7:4
Description
Reserved
PS_HD
3
0 = PS output is 12 bits, 1 = PS output is 16 bits
Reserved
2
Reserved
PS_INT
1:0
Proximity interrupt configuration
(0 : 0) = interrupt disable, (0 : 1) = trigger by closing,
(1 : 0) = trigger by away, (1 : 1) = trigger by closing and away
TABLE 8 - REGISTER: PS_CONF3 DESCRIPTION
PS_CONF3
COMMAND CODE: 04H_L (04H DATA BYTE LOW)
Command
Bit
Reserved
7
PS_MPS
6:5
Description
Default = 0, reserved
Proximity multi pulse numbers
(0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8 multi pulses
PS_SMART_PERS
4
Proximity sensor smart persistence
0 = disable; 1 = enable
PS_AF
3
0 = active force mode disable (normal mode), 1 = active force mode enable
PS_TRIG
2
0 = no PS active force mode trigger, 1 = trigger one time cycle
VCNL4200 output one cycle data every time host writes in “1” to sensor. The state returns to “0”
automatically.
PS_SC_ADV
1
0 = typical sunlight immunity; 1 = 2 x typical sunlight immunity
PS_SC_EN
0
PS sunlight cancel enable setting, 1 = sunlight cancellation function enable
TABLE 9 - REGISTER: PS_MS DESCRIPTION
Reserved
COMMAND CODE: 04H_H (04H DATA BYTE HIGH)
Command
Bit
Reserved
7:6
Description
Default = 0, reserved
PS_MS
5
Proximity operation mode
0 = proximity normal operation with interrupt function, 1 = proximity detection logic output mode enable
PS_SP
4
0 = typical sunlight capability, 1 = 1.5 x typical sunlight capability
PS_SPO
3
0 = output is 00h in sunlight protect mode, 1 = output is FFh in sunlight protect mode
LED_I
2:0
(0 : 0 : 0) = 50 mA, (0 : 0 : 1) = 75 mA, (0 : 1 : 0) = 100 mA, (0 : 1 : 1) = 120 mA, (1 : 0 : 0) = 140 mA,
(1 : 0 : 1) = 160 mA, (1 : 1 : 0) = 180 mA, (1 : 1 : 1) = 200 mA
TABLE 10 - REGISTER: CANC_L AND CANC_H DESCRIPTION
Reserved
Register
COMMAND CODE: 05H_L (05H DATA BYTE LOW)
Bit
Description
PS_CANC_L
7:0
00H to FFH, PS cancellation level setting, LSB
PS_CANC_H
7:0
00H to FFH, PS cancellation level setting, MSB
TABLE 11 - REGISTER: PS_THDL_L AND PS_THDL_H DESCRIPTION
PS_THDL_L
PS_THDL_H
Register
COMMAND CODE: 06H_L (06H DATA BYTE LOW)
COMMAND CODE: 06H_H (06H DATA BYTE HIGH)
Bit
Description
PS_THDL_L
7:0
00H to FFH, PS low interrupt threshold setting, LSB
PS_THDL_H
7:0
00H to FFH, PS low interrupt threshold setting, MSB
Rev. 1.4, 16-Oct-2019
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TABLE 12 - REGISTER: PS_THDH_L AND PS_THDH_H DESCRIPTION
PS_THDH_L
PS_THDH_H
Register
COMMAND CODE: 07H_L (07H DATA BYTE LOW)
COMMAND CODE: 07H_H (07H DATA BYTE HIGH)
Bit
Description
PS_THDH_L
7:0
00H to FFH, PS high interrupt threshold setting, LSB
PS_THDH_H
7:0
00H to FFH, PS high interrupt threshold setting, MSB
TABLE 13 - READ OUT REGISTER DESCRIPTION
REGISTER
PS_Data_L
COMMAND CODE
BIT
DESCRIPTION
08H_L (08H data byte low)
7:0
00H to FFH, PS LSB output data
PS_Data_H
08H_H (08H data byte high)
7:0
00H to FFH, PS MSB output data
ALS_Data_L
09H_L (09H data byte low)
7:0
00H to FFH, ALS LSB output data
ALS_Data_H
09H_H (09H data byte high)
7:0
00H to FFH, ALS MSB output data
White_Data_L
0AH_L (0AH data byte low)
7:0
00H to FFH, white LSB output data
White_Data_H
0AH_H (0AH data byte high)
7:0
00H to FFH, white MSB output data
Reserved
0BH_L (0BH data byte low)
7:0
Default = 00H
Reserved
0BH_H (0BH data byte low)
7:0
Default = 00H
Reserved
0CH_L (0CH data byte low)
7:0
Default = 00H
Reserved
0CH_H (0CH data byte low)
7:0
Default = 00H
Reserved
0DH_L (0DH data byte low)
7:0
Default = 00H
INT_Flag
0DH_H (0DH data byte high)
7
6
5
4
3
2
1
0
ID_L
0x0EH_L (0x0EH data byte low)
7:0
58H for MP version sample, device ID LSB byte
0x0EH_H (0x0EH data byte high)
7:6
5:4
3:0
(0 : 0)
(0 : 1) slave address = 0x51 (7-bit)
Version code (0 : 0 : 0 : 0) = ES1, device ID MSB byte
ID_H
PS_UPFLAG PS code saturation flag
PS_SPFLAG PS enter sunlight protection flag
ALS_IF_L, ALS crossing low THD INT trigger event
ALS_IF_H, ALS crossing high THD INT trigger event
Default = 0, reserved
Default = 0, reserved
PS_IF_CLOSE, PS rise above PS_THDH INT trigger event
PS_IF_AWAY, PS drop below PS_THDL INT trigger event
Adjustable Sampling Time
VCNL4200’s embedded LED driver drives the external IRED with the “LED_CATHODE” pin by a pulsed duty ratio. The IRED
on / off duty ratio can be programmable by I2C command at register: PS_Duty is related to the current consumption and PS
response time. The higher the duty ratio selected, the faster response time achieved with higher power consumption. Please
see also the application note: “Designing VCNL4200 Into an Application”.
Rev. 1.4, 16-Oct-2019
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Threshold Window Setting
• ALS Threshold Window Setting (Applying ALS INT)
Register: ALS_THDH_L and ALS_THDH_H define 16-bit ALS high threshold data for LSB byte and MSB byte. Register:
ALS_THDL_L and ALS_THDL_H define 16-bit ALS low threshold data for LSB byte and MSB byte. As long as ALS INT function
is enabled, INT will be asserted once the ALS data exceeds ALS_THDH or goes below ALS_THDL. To easily define the
threshold range, multiply the value of the resolution (lx/step) by the threshold level (refer table 14)
TABLE 14 - ALS RESOLUTION AND MAXIMUM DETECTION RANGE
ALS_IT
ALS_IT
(7 : 6)
INTEGRATION TIME
SENSITIVITY
(lx/step)
MAXIMUM DETECTION
RANGE
(lx)
(0, 0)
50 ms
0.024
1573
(0, 1)
100 ms
0.012
786
(1, 0)
200 ms
0.006
393
(1, 1)
400 ms
0.003
197
• ALS Persistence
The ALS INT is asserted as long as the ALS value is higher or lower than the threshold window when ALS_PERS
(1 / 2 / 4 / 8 times) is set to one time. If ALS_PERS is set to four times, then the ALS INT will not be asserted if the
ALS value is not over (or lower) than the threshold window for four continued refresh times (integration time)
• Programmable PS Threshold
VCNL4200 provides both high and low thresholds 8-bit data setting for proximity sensor. (register: PS_THDL, PS_THDH) that
fulfills different mechanical designs with the best proximity detection capability for any kind of objects
• PS Persistence
The PS persistence function (PS_PERS 1 / 2 / 3 / 4) helps to avoid false trigger of the PS INT. For example, if
PS_PERS = 3 times, the PS INT will not be asserted unless the PS value is greater than the PS threshold (PS1_THDH)
value for three periods of time continuously
Data Access
All VCNL4200 command registers are readable. To access 16-bit high resolution ALS output data, it is suitable to use read word
protocol to read out data by just one command at register: ALS_Data_L and ALS_Data_H. To represent the 16-bit data of ALS,
it has to apply two bytes. One byte is for LSB, and the other byte is for MSB as shown in table 18. In terms of reading out 8-bit
PS data, host just need to access register: PS_Data.
TABLE 15 - 16-BIT ALS DATA FORMAT
VCNL4200
Bit
15
Register
14
13
12
11
ALS_Data_H
10
9
8
7
6
5
4
3
2
1
0
ALS_Data_L
Interrupt (INT)
VCNL4200 has ALS and PS interrupt feature operated by a single pin “INT”. The purpose of the interrupt feature is to actively
inform the host once INT has been asserted. With the interrupt function applied, the host does not need to constantly poll data
from the sensor, but to only read data from the sensor when receiving interrupt request from the sensor. As long as the host
enables ALS interrupt (register: ALS_INT_EN) or PS interrupt (register: PS_INT) function, the level of INT pin (pin 8) is able to be
pulled low once INT asserted. All of registers are accessible even INT is asserted.
ALS INT asserted when ALS value crosses over the value set by register: ALS_THDH or is lower than the value set by
register: ALS_THDL.
PS INT asserted when PS value crosses over the value set by register: PS_THDH or is lower than the value set by
register: PS_THDL.
Interrupt Flag
Register: INT_Flag represents all of interrupt trigger status for ALS and PS. Any flag value changes from “0” to “1” state, the
level of INT pin will be pulled low. As long as host reads INT_Flag data, the bit will change from “1” state to “0” state after reading
out. The INT level will be returned to high afterwards.
Rev. 1.4, 16-Oct-2019
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PROXIMITY DETECTION LOGIC OUTPUT MODE
VCNL4200 provides a proximity detection logic output mode that uses INT pin as a proximity detection logic high / low output
(register: PS_MS). When this mode is selected, the PS output (INT/POUT) is pulled low when an object is close to being detected
and returned to level high when the object moves away. Register: PS_THDH / PS_THDL defines how sensitive PS detection is.
One thing to be noted is that whenever proximity detection logic mode applied, INT pin is only used as a logic high / low output.
If host would like to use ALS with INT function, register: PS_MS has to be selected to normal operation mode (PS_MS = 0).
Meanwhile, host has to simulate the GPIO pin as an INT pin function. If not, host needs to periodically read the state of INT at
this GPIO pin.
PROXIMITY DETECTION HYSTERESIS
A PS detection hysteresis is important to keep the PS state in a certain range of detection distance. For example, PS INT asserts
when PS value over PS_THDH. Host switches on panel backlight and then clears INT. When PS value is less than PS_THDL,
host switches off panel backlight. Any PS value lower than PS_THDH or higher than PS_THDL PS INT will not be asserted. Host
keeps the same state.
PACKAGE INFORMATION in millimeters
Side View
3.0 ± 0.1
1.8 ± 0.1
5
1.0
5
6
1.7
6
Bottom View
5
7
4
8
3
9
2
10
1
1.7
Ø 1.7
6
5.0
8.0 ± 0.1
LED
1.0 (10 x)
Top View
Ø 2.05
1.6
.6
Sensor
1
10
10
1.2
1
0.8
1.2
2.0
0.8
1.2
For Reflow Soldering (PCB Footprint)
1
GND
6
LED+
2
LED_CATHODE
7
NC
3
VDD
8
INT
4
NC
9
SDAT
5
LED-
10
SCLK
1.7
Fig. 13 - VCNL4200 Package Dimensions
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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APPLICATION CIRCUIT BLOCK REFERENCE
Vpull up
VDD
VIRED
0.1 μF
2.2 kΩ
2.2 kΩ
2.2 μF
1 kΩ
3
VDD
10
SCLK
SCLK
SCK
9
SDA
MCU
S
LED 2
CATHODE
PMOS
G
D
SDAT
VCNL4200
8.2 kΩ
LED+ 6
8
INT
LED- 5
INT
INT
RLED
GND
2.7 Ω
1
Fig. 14 - VCNL4200 Application Circuit
Notes
• VDD range: 2.5 V to 3.6 V and VIRED is recommended 5.0 V
• Power path of VDD and VIRED should be well separated and supply source for V_IRED should be stable enough for the high peak current
• The RLED resistor value is reference for test stage, it should be adjusted again for the product usage basing on the power and the lens final
design
• The FET may be any small device, e.g. a Si2301
• LED_I programmed to lowest value of 50 mA is enough to drive the FET
• If not that high detection distance is needed the application note “Designing the VCNL4200 Into an Application”
(www.vishay.com/doc?84327) shows a circuitry without this added FET
RECOMMENDED STORAGE AND REBAKING CONDITIONS
PARAMETER
MIN.
MAX.
UNIT
Storage temperature
5
50
°C
Relative humidity
-
60
%
Open time
-
168
h
From the date code on the aluminized envelope (unopened)
-
12
months
Tape and reel: 60 °C
-
22
h
Tube: 60 °C
-
22
h
Total time
Rebaking
Rev. 1.4, 16-Oct-2019
CONDITIONS
Document Number: 84430
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RECOMMENDED INFRARED REFLOW
Soldering conditions which are based on J-STD-020 C.
IR REFLOW PROFILE CONDITION
PARAMETER
CONDITIONS
Peak temperature
TEMPERATURE
TIME
255 °C + 0 °C / - 5 °C (max.: 260 °C)
10 s
150 °C to 200 °C
60 s to 180 s
217 °C
60 s to 150 s
Preheat temperature range and timing
Timing within 5 °C to peak temperature
10 s to 30 s
Timing maintained above temperature / time
Timing from 25 °C to peak temperature
8 min (max.)
Ramp-up rate
3 °C/s (max.)
Ramp-down rate
6 °C/s (max.)
Temperature (°C)
Recommend Normal Solder Reflow is 235 °C to 255 °C.
Max. Temperature
(260 °C + 0 °C / - 5 °C)/10 s
255
Ramp-Up Rate
3 °C/s (max.)
217
Ramp-Down Rate
6 °C/s (max.)
200
150
Soldering Zone
60 s to 150 s
Ramp-Up Rate
3 °C/s (max.)
Pre-Heating Time
t2 - t1 = 60 s to 180 s
t2
t1
Time (s)
Fig. 15 - VCNL4200 Solder Reflow Profile Chart
RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING
1. Solder the device with the following conditions:
1.1. Soldering temperature: 400 °C (max.)
1.2. Soldering time: 3 s (max.)
2. If the temperature of the method portion rises in addition to the residual stress between the leads, the possibility that an
open or short circuit occurs due to the deformation or destruction of the resin increases
3. The following methods: VPS and wave soldering, have not been suggested for the component assembly
4. Cleaning method conditions:
4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol
4.2. Solvent temperature < 45 °C (max.)
4.3. Time: 3 min (min.)
Rev. 1.4, 16-Oct-2019
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TAPE PACKAGING INFORMATION in millimeters
2
4
Ø 1.5
1.75
8
8.25
16
7.5
6° max.
3.25
2.05
Fig. 16 - Package Carrier Tape
W1
W0
17.3 ± 0.2
100.0 ± 1.5
Ø 330.0 ± 1.5
2.2 ± 0.2
Ø 13.2 ± 0.2
120°
Fig. 17 - Reel Dimensions
Rev. 1.4, 16-Oct-2019
Document Number: 84430
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Legal Disclaimer Notice
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
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© 2019 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2019
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Document Number: 91000
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