VCUT0505B-HD1
www.vishay.com
Vishay Semiconductors
Bidirectional Symmetrical (BiSy) Single Line ESD Protection Diode
in LLP1006-2L
FEATURES
• Ultra compact LLP1006-2L package
• Low package profile < 0.4 mm
2
1
• 1-line ESD protection
• Working range ± 5 V
21129
• Low leakage current IR < 0.1 μA
20855
• Low load capacitance CD = 18 pF
• ESD Immunity acc. IEC 61000-4-2
± 20 kV contact discharge
± 25 kV air discharge
MARKING (example only)
XY
• Soldering can be checked by standard vision inspection;
no X-ray necessary
21121
• Pin plating NiPdAu (e4) no whisker growth
Bar = pin 1marking
X = date code
Y = type code (see table below)
• e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
• PATENT(S): www.vishay.com/patents
DESIGN SUPPORT TOOLS
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
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Models
Available
ORDERING INFORMATION
DEVICE NAME
VCUT0505B-HD1
ORDERING CODE
TAPED UNITS PER REEL
(8 mm TAPE on 7" REEL)
MINIMUM ORDER QUANTITY
VCUT0505B-HD1-GS08
8000
8000
PACKAGE DATA
DEVICE NAME
PACKAGE
NAME
VCUT0505B-HD1
LLP1006-2L
TYPE
MOLDING COMPOUND
WEIGHT
FLAMMABILITY RATING
CODE
L
0.72 mg
UL 94 V-0
MOISTURE
SENSITIVITY LEVEL
SOLDERING CONDITIONS
MSL level 1
Peak temperature max. 260 °C
(according J-STD-020)
ABSOLUTE MAXIMUM RATINGS VCUT0505B-HD1
PARAMETER
TEST CONDITIONS
SYMBOL
VALUE
UNIT
Peak pulse current
Acc. IEC 61000-4-5; tp = 8/20 μs; single shot
IPPM
3.5
A
Peak pulse power
Pin 1 to pin 2
Acc. IEC 61000-4-5; tp = 8/20 μs; single shot
PPP
56
W
ESD immunity
Operating temperature
Storage temperature
Contact discharge acc. IEC 61000-4-2; 10 pulses
Air discharge acc. IEC 61000-4-2; 10 pulses
Junction temperature
± 20
kV
± 25
kV
TJ
-40 to +125
°C
Tstg
-55 to +150
°C
VESD
PATENT(S): www.vishay.com/patents
This Vishay product is protected by one or more United States and international patents.
Rev. 2.3, 03-Jan-2019
Document Number: 81852
1
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT0505B-HD1
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS VCUT0505B-HD1
(Tamb = 25 °C, unless otherwise specified)
TEST CONDITIONS/REMARKS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Number of lines which can be protected
Nchannel
-
-
1
lines
Max. reverse working voltage
VRWM
-
-
5
V
At IR = 0.1 μA
VR
5
-
-
V
PARAMETER
Protection paths
Reverse stand-off voltage
Reverse voltage
Reverse current
At VR = 5 V
IR
-
-
0.1
μA
Reverse breakdown voltage
At IR = 1 mA
VBR
7
-
-
V
V
Reverse clamping voltage
Capacitance
At IPP = 1 A
VC
-
-
12
At IPP = IPPM = 3.5 A
VC
-
-
16
V
At VR = 0 V; f = 1 MHz
CD
-
18
20
pF
At VR = 2.5 V; f = 1 MHz
CD
-
14.5
-
pF
CUT THE SPIKES WITH VCUT0505B-HD1:
The VCUT0505B-HD1 is a bidirectional and symmetrical (BiSy) ESD protection device which clamps positive and negative
overvoltage transients to ground. Connected between the signal or data line and the ground the VCUT0505B-HD1 offers a high
isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package
size of the tiny LLP1006-2L package the line inductance is very low, so that fast transients like an ESD strike can be clamped
with minimal over- or undershoots.
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
20
10000
120
100
16
14
1st line
2nd line
60
53
40
CD (pF)
1000
80
2nd line
IESD (%)
f = 1 MHz
18
Rise time = 0.7 ns to 1 ns
12
10
8
100
6
27
4
20
2
0
10
-10 0
0
10 20 30 40 50 60 70 80 90 100
0
t (ns)
2nd line
20557
1
2
21122
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 /150 pF)
3
4
5
6
VR (V)
Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR
Axis Title
10000
100
10
8 µs to 100 %
8
Pin 1 to 2
6
80
4
20 µs to 50 %
40
100
20
VR (V)
60
1st line
2nd line
2nd line
IPPM (%)
1000
2
0
-2
-4
-6
-8
0
10
0
10
20
30
40
t (µs)
2nd line
20548
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
Rev. 2.3, 03-Jan-2019
-10
0.01
21123
0.1
1
10
100
1000 10 000
IR (µA)
Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR
Document Number: 81852
2
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT0505B-HD1
www.vishay.com
Vishay Semiconductors
40
10
Pin 2 to 1
8
Pin 2 to 1
6
4
0
VC-ESD (V)
VR (V)
Acc. IEC 61000-4-2
-8 kV
contact discharge
20
2
0
-2
-20
-40
-4
-6
-60
-8
- 10
0.01
0.1
1
10
-80
-10 0
100 1000 10 000
Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR
t (ns)
Fig. 8 - Typical Clamping Performance at - 8 kV
Contact Discharge (acc. IEC 61000-4-2)
200
20
Pin 2 to 1
15
Pin 2 to 1
Positive surge
150
Positive discharge
100
Measured
acc. IEC 61000-4-5
(8/20 µs - wave form)
5
0
50
VC-ESD (V)
10
VC (V)
10 20 30 40 50 60 70 80 90
21127
IR (µA)
21124
VC
-5
VC-ESD
0
-50
-100
-10
Negative discharge
-150
Negative surge
Acc. IEC 61000-4-2 contact discharge
-200
-15
0
1
21125
2
3
0
4
IPP (A)
Fig. 6 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
21128
5
10
15
20
25
VESD (kV)
Fig. 9 - Typical Peak. Clamping Voltage at ESD Contact Discharge
(acc. IEC 61000-4-2)
80
70
60
Pin 2 to 1
Acc. IEC 61000-4-2
+8 kV
contact discharge
VC-ESD (V)
50
40
30
20
10
0
-10
-20
-10 0
21126
10 20 30 40 50 60 70 80 90
t (ns)
Fig. 7 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
Rev. 2.3, 03-Jan-2019
Document Number: 81852
3
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VCUT0505B-HD1
www.vishay.com
Vishay Semiconductors
0.25 [0.010]
0.15 [0.006]
PACKAGE DIMENSIONS in millimeters (Inches): LLP1006-2L
0.65 [0.026]
0.55 [0.022]
Orientation identification
0.05 [0.002]
0 [0.000]
0.4 [0.016]
0.33 [0.013]
0.45 [0.018]
0.35 [0.014]
0.125 [0.005] ref.
0.55 [0.022]
0.45 [0.018]
0.3 [0.012]
0.2 [0.008]
1.05 [0.041]
0.95 [0.037]
1 [0.039]
Solder
resist mask
0.2 [0.008]
0.5 [0.020]
0.6 [0.024]
Foot print recommendation:
Solder pad
0.5 [0.020]
0.05 [0.002]
0.25 [0.010]
Pad Design Patented:
( P US 9.018.537 B2)
Document no.: S8-V-3906.04-005 (4)
Rev. 7 - Date: 11.May 2016
20812
Unreeling direction
LLP1006-2X
Orientation
identification
Top view
S8-V-3906.04-017 (4)
02.05.2017
22965
Rev. 2.3, 03-Jan-2019
Pad layout - view from top
seen at bottom side
Document Number: 81852
4
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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www.vishay.com
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Revision: 01-Jan-2023
1
Document Number: 91000