VEML7700
www.vishay.com
Vishay Semiconductors
High Accuracy Ambient Light Sensor With I2C Interface
FEATURES
• Package type: surface-mount
• Package: side view
• Dimensions (L x W x H in mm): 6.8 x 2.35 x 3.0
• Integrated modules: ambient light sensor (ALS)
• Supply voltage range VDD: 2.5 V to 3.6 V
• Communication via I2C interface
• Floor life: 72 h, MSL 4, according to J-STD-020
4
• Low shut down current consumption: typ. 0.5 μA
3
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
2
1
AMBIENT LIGHT FUNCTION
Pinning
• FiltronTM technology adaption: close to real human eye
response
1: SCL
• O-TrimTM technology adoption: ALS output tolerance
≤ 10 %
2: VDD
3: GND
• 16-bit dynamic range for ambient light detection from
0 lx to about 120 klx with resolution down to 0.0036 lx/ct,
supports low transmittance (dark) lens design
4: SDA
DESCRIPTION
VEML7700 is a high accuracy ambient light digital 16-bit
resolution sensor in a miniature transparent 6.8 mm x
2.35 mm x 3.0 mm package. It includes a high sensitive
photo diode, a low noise amplifier, a 16-bit A/D converter
and supports an easy to use I2C bus communication
interface.
The ambient light result is as digital value available.
• 100 Hz and 120 Hz flicker noise rejection
• Excellent temperature compensation
• High dynamic detection resolution
• Software shutdown mode control
APPLICATIONS
• Ambient light sensor for backlight dimming of e.g. TV
displays, smart phones, touch phones, PDA, GPS
• Ambient light sensor for industrial on- / off-lighting
operation
• Optical switch for consumer, computing, and industrial
devices and displays
PRODUCT SUMMARY
PART NUMBER
VEML7700
OPERATING
RANGE
(mm)
OPERATING
VOLTAGE
RANGE
(V)
I2C BUS
VOLTAGE
RANGE
(V)
AMBIENT
LIGHT RANGE
(lx)
AMBIENT
LIGHT
RESOLUTION
(lx)
OUTPUT
CODE
ADC RESOLUTION
PROXIMITY /
AMBIENT LIGHT
n/a
2.5 to 3.6
1.7 to 3.6
0 to 120 000
0.0036
16 bit, I2C
- / 0.0036
ORDERING INFORMATION
ORDERING CODE
PACKAGING
VOLUME (1)
REMARKS
VEML7700-TR
Tape and reel
MOQ: 2300 (MOQ is one reel)
Side view
VEML7700-TT
Tape and reel
MOQ: 2200 (MOQ is one reel)
Top view
Note
(1) MOQ: minimum order quantity
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Supply voltage
TEST CONDITION
VDD
0
4
V
Operation temperature range
Tamb
-25
+85
°C
Storage temperature range
Tstg
-25
+85
°C
Ptot
-
50
mW
Tj
-
100
°C
Tamb ≤ 25 °C
Total power dissipation
Junction temperature
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
VDD
2.5
3.3
3.6
V
VDD is 3.3 V
Isd
-
0.5
-
μA
VDD is 3.3 V, PSM = 11, refresh time 4100 ms
IDD
-
2
-
μA
VDD is 3.3 V, PSM = 00, refresh time 600 ms
IDD
-
μA
VDD is 3.3 V, PSM_EN = 0, refresh time 100 ms
IDD
Supply voltage
Shut down current (rem_2)
Operation mode current (rem_2)
I2C clock rate range
fSCL
10
UNIT
8
-
45
-
μA
-
400
kHz
I2C bus input H-level range
VDD is 3.3 V
Vih
1.3
-
3.6
V
I2C bus input L-level range
VDD is 3.3 V
Vil
-0.3
-
0.4
V
Iol
3
-
-
mA
lx/step
Digital current out
(low, current sink)
Digital resolution (LSB count)
With ALS_GAIN = “01”
-
0.0036
-
Detectable minimum illuminance
With ALS_GAIN = “01”
EV min.
-
0.0072
-
lx
Detectable maximum illuminance
With ALS_GAIN = “10”
EV max.
-
120 000
-
lx
Dark offset (rem_2)
With ALS_GAIN = “01”
-
3
-
step
Note
• rem_1: light source: white LED
rem_2: light conditions: dark
CIRCUIT BLOCK DIAGRAM
VEML7700
SCL 1
Temperature
sensor
2
GND 3
Low pass
filter
Timing
controller
Output buffer
I2C interface
ALS-PD
VDD
Oscillator
SDA 4
Fig. 1 - Block Diagram
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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I2C TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
Clock frequency
STANDARD MODE (1)
MIN.
MAX.
f(SMBCLK)
10
t(BUF)
4.7
t(HDSTA)
Repeated start condition setup time
Stop condition setup time
Data hold time
Data setup time
I2C clock (SCK) low period
I2C clock (SCK) high period
UNIT
MAX.
100
10
400
kHz
-
1.3
-
μs
4.0
-
0.6
-
μs
t(SUSTA)
4.7
-
0.6
-
μs
t(SUSTO)
4.0
-
0.6
-
μs
t(HDDAT)
0
3450
0
900
ns
t(SUDAT)
250
-
100
-
ns
t(LOW)
4.7
-
1.3
-
μs
Bus free time between start and stop condition
Hold time after (repeated) start condition;
after this period, the first clock is generated
FAST MODE (1)
MIN.
t(HIGH)
4.0
-
0.6
-
μs
t(TIMEOUT)
25
35
-
-
ms
Clock / data fall time
t(F)
-
300
-
300
ns
Clock / data rise time
t(R)
-
1000
-
300
ns
Detect clock / data low timeout
Note
(1) Data based on standard I2C protocol requirement, not tested in production
t(LOW)
I2C bus
clock
(SLCK)
t(R)
t(F)
VIH
VIL
t(HDSTA)
t(HIGH)
t(SUSTA)
t(SUSTO)
t(BUF)
t(HDDAT)
I2C bus
data
(SDAT)
t(SUDAT)
VIH
Start
{
S
Start condition
{
P
Stop condition
{
{
VIL
S
P
Stop
t(LOSEXT)
SCLKACK
t(LOWMEXT)
SDAACK
t(LOWMEXT)
t(LOWMEXT)
I2C bus
clock
(SLCK)
I2C bus
data
(SDAT)
Fig. 2 - I2C Timing Diagram
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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PARAMETER TIMING INFORMATION
I2C bus
clock
(SCLK)
I2C bus
data
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA7
W
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK
Start by
master
ACK
I2C bus slave address byte
Command code
I2C bus
clock
(SCLK)
I2C bus
data
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
SA6
SA7
SA5
SA4
SA3
SA2
SA1
SA0
ACK
ACK
Data byte low
Stop by
master
Data byte high
Fig. 3 - I2C Bus Timing for Sending Word Command Format
I2C bus
clock
(SCLK)
I2C bus
data
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA7
W
SA6
SA5
SA4
SA3
SA2
SA1
SA0
ACK
Start by
master
ACK
I2C bus slave address byte
Command code
I2C bus
clock
(SCLK)
I2C bus
data
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
R
SA1
SA7
SA6
SA5
SA4
SA3
ACK
Start by
master
SA2
SA1
SA0
ACK by
master
I2C bus slave address byte
Data byte low
I2C bus
clock
(SCLK)
I2C bus
data
(SDAT)
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
NACK by
master
Stop by
master
Data byte high
Fig. 4 - I2C Bus Timing for Receive Word Command Format
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title
100
VEML7700
80
60
V(λ)
40
20
0
400
500
600
700
800
900
90
80
70
1000
60
1st line
2nd line
2nd line
S(λ)φ, rel - Relative Spectral Sensitivity
120
Normalized Responsivity
10000
100
50
40
100
30
20
10
10
0
1000
350
450
λ - Wavelength (nm)
550
650
750
850
950 1050
λ - Wavelength (nm)
Fig. 5 - Spectral Response
Fig. 6 - White Channel Sensitivity Spectrum
ALS sensitivity spectrum close to human eye photopic curve v(λ). Human eye curve adaption achieved by FiltronTM technology.
Axis Title
20°
0.8
0.7
60°
0.6
1000
80
1st line
2nd line
40°
nom. -10 %
nom.
nom. +10 %
100
2nd line
Reading of ALS (klx)
1.0
0.9
10000
120
ϕ - Angular Displacement
Srel - Relative Sensitivity
0°
60
100
40
20
80°
10
0
0.5 0.4 0.3 0.2 0.1 0
22308
Fig. 7 - Relative Radiant Sensitivity vs. Angular Displacement
Rev. 1.6, 28-Apr-2022
0
20
40
60
80
100
120
Brightness According Calibrated Luxmeter (klx)
Fig. 8 - ALS measurement deviation between different light sources:
≤ 10 %
Document Number: 84286
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APPLICATION INFORMATION
VEML7700 is a cost effective solution of ambient light sensor with I2C bus interface. The standard serial digital interface is easy
to access “Ambient Light Signal” without complex calculation and programming by external controller.
1. Application Circuit
2.5 V to 3.6 V
R3
10R
10 μF
1.7 V to 3.6 V
C1
C2
100 nF
R1
R2
VDD (2)
C1 and R3
are optional
for very
disturbed
supply
Host
Micro Controller
VEML7700
SDA (4)
I2C bus sata SDA
SCL (1)
I2C bus clock SCL
GND (3)
Fig. 9 - Application Diagram
Notes
• Proposed values for the pull-up resistor R1 and R2 should be > 1 kΩ, e.g. 2.2 kΩ to 4.7 kΩ.
For detailed description about set-up and use as well as more application related information see AN: “Designing VEML7700 into an
Application”
2. I2C Interface
The VEML7700 contains actual six 16 bit command codes for operation control, parameter setup, and result buffering. All
registers are accessible via I2C communication. Fig. 10 shows the basic I2C communication with VEML7700.
The built in I2C interface is compatible with I2C modes “standard” and “fast”: 10 kHz to 400 kHz.
I2C H-level range = 1.3 V to 3.6 V.
Please refer to the I2C specification from NXP for details.
Send byte
S
Write command to VEML7700
Slave address
Receive byte
S
Wr
A
Command code
A
Data byte (LSB)
A
Data byte (MSB)
A
P
Read data from VEML7700
Slave address
S = start condition
P = stop condition
A = acknowledge
N = no acknowledge
Wr
A
A
Command code
S
Slave address
Rd
A
Data byte (LSB)
A
Data byte (MSB)
N
P
Host action
VEML7700 response
Fig. 10 - Send Byte / Receive Byte Protocol
Register Addresses
VEML7700 has actual six user accessible 16 bit command
codes.
The addresses are 00h to 06h (03h not defined / reserved).
Device Address
The VEML7700 has a fix slave address for the host
programming and accessing selection.
The slave address (7 bit) is set to 0010000 = 0x10.
The least significant bit (LSB) defines read or write mode.
Rev. 1.6, 28-Apr-2022
According 8 bit the bus address is then 0010 0000 = 20h for
write and 0010 0001 = 21h for read.
Auto-Memorization
VEML7700 can memorize the last ambient data before
shutdown and keep this data before waking up.
When VEML7700 is in shutdown mode, the host can freely
read this data via read command directly.
When VEML7700 wakes up, the data will be refreshed by
new detection.
Document Number: 84286
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Interrupt pin not available for VEML7700
COMMAND REGISTER FORMAT
COMMAND CODE
REGISTER NAME
BIT
00
ALS_CONF_0
15 : 0
ALS gain, integration time, interrupt, and shutdown
W
15 : 8
ALS high threshold window setting (MSB)
W
W
01
ALS_WH
02
ALS_WL
03
Power saving
04
ALS
05
WHITE
06
ALS_INT
FUNCTION / DESCRIPTION
R/W
7:0
ALS high threshold window setting (LSB)
15 : 8
ALS low threshold window setting (MSB)
W
7:0
ALS low threshold window setting (LSB)
W
15 : 0
Set (15 : 3) 0000 0000 0000 0b
15 : 8
MSB 8 bits data of whole ALS 16 bits
R
7:0
LSB 8 bits data of whole ALS 16 bits
R
15 : 8
MSB 8 bits data of whole WHITE 16 bits
R
7:0
LSB 8 bits data of whole WHITE 16 bits
R
15 : 0
ALS INT trigger event
R
Note
• Command code 0 default value is 01 = devices is shut down
Command Code #0: Configuration Register
Register address = 00h
The command code #0 is for configuration of the ambient light measurements.
TABLE 1 - CONFIGURATION REGISTER #0
REGISTER NAME
BIT
Reserved
15 : 13
Set 000b
W
ALS_GAIN
12 : 11
Gain selection
00 = ALS gain x 1
01 = ALS gain x 2
10 = ALS gain x (1/8)
11 = ALS gain x (1/4)
W
reserved
10
Set 0b
W
9:6
ALS integration time setting
1100 = 25 ms
1000 = 50 ms
0000 = 100 ms
0001 = 200 ms
0010 = 400 ms
0011 = 800 ms
W
ALS_PERS
5:4
ALS persistence protect number setting
00 = 1
01 = 2
10 = 4
11 = 8
W
Reserved
3:2
Set 00b
W
W
W
ALS_IT
FUNCTION / DESCRIPTION
ALS_INT_EN
1
ALS interrupt enable setting
0 = ALS INT disable
1 = ALS INT enable
ALS_SD
0
ALS shut down setting
0 = ALS power on
1 = ALS shut down
R/W
Note
• Light level [lx] is (ALS OUTPUT DATA [dec.] / ALS Gain x responsivity). Please study also the application note
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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Command Code #1: High Threshold Windows Setting
Command code address = 01h. Once enable INT function and use high / low windows threshold, bit 15:0 provides 16 bit register
for high bound threshold windows setting.
TABLE 2 - HIGH THRESHOLD WINDOWS SETTING #1
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Description
ALS high threshold window setting (15:8 MSB 8 bits of whole 16 bits)
ALS high threshold window setting (7:0 LSB 8 bits of whole 16 bits)
Command Code #2: Low Threshold Windows Setting
Command code address = 02h. Once enable INT function and use high / low windows threshold, bit 15:0 provides 16 bit register
for low bound threshold windows setting.
TABLE 3 - LOW THRESHOLD WINDOWS SETTING #2
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Description
ALS low threshold window setting (15:8 MSB 8 bits of whole 16 bits)
ALS low threshold window setting (7:0 LSB 8 bits of whole 16 bits)
Command Code #3: Power Saving Mode: PSM
Command code address = 03h. Bits 2 and 1 define the power saving modes. Bits 15 : 3 are reserved.
TABLE 4 - POWER SAVING MODES
REGISTER NAME
BIT
PSM
2:1
PSM_EN
0
FUNCTION / DESCRIPTION
R/W
Power saving mode; see table “Refresh time”
00 = mode 1
01 = mode 2
10 = mode 3
11 = mode 4
W
Power saving mode enable setting
0 = disable
1 = enable
W
Command Code #4: ALS High Resolution Output Data
Command code address = 04h. To access 16 bit high resolution ALS output, it is suitable to follow read protocol to read from
command code 04 16 bits register.
TABLE 5 - ALS HIGH RESOLUTION OUTPUT DATA #4
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Description
ALS high resolution output data (15 : 8 MSB 8 bits of whole 16 bits)
ALS high resolution output data (7 : 0 LSB 8 bits of whole 16 bits)
Command Code #5: White Channel Output Data
Command code address = 05h. To access 16 bit WHITE output, it is suitable to follow read protocol to read from command
code 05 16 bits register.
TABLE 6 - WHITE CHANNEL OUTPUT DATA #5
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Description
WHITE output data (15 : 8 MSB 8 bits of whole 16 bits)
WHITE output data (7 : 0 LSB 8 bits of whole 16 bits)
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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Command Code #6: Interrupt Status
Command code address = 06h. Bit 15 defines interrupt flag while trigger occurred due to data crossing low threshold windows.
Bit 14 defines interrupt flag while trigger occurred due to data crossing high threshold windows.
TABLE 7 - INTERRUPT STATUS #6
Bit 15
Bit 14
int_th_low
int_th_high
Bit 13 to 0
reserved
Description
int_th_low
R bit. Indicated a low threshold exceed
int_th_high
R bit. Indicated a high threshold exceed
REFRESH TIME DETERMINATION OF PSM
VEML7700’s refresh time can be determined by PSM and ALS_IT setting in power saving mode (PSM). Cooperating with the
command register setting, the designer has a flexible method in defining the timing, power consumption, and sensitivity for light
data collection.
REFRESH TIME, IDD, AND RESOLUTION RELATION
ALS_GAIN
PSM
ALS_IT
REFRESH TIME (ms)
IDD (μA)
RESOLUTION (lx/bit)
01
00
0000
600
8
0.0288
01
01
0000
1100
5
0.0288
01
10
0000
2100
3
0.0288
01
11
0000
4100
2
0.0288
01
00
0001
700
13
0.0144
01
01
0001
1200
8
0.0144
01
10
0001
2200
5
0.0144
01
11
0001
4200
3
0.0144
01
00
0010
900
20
0.0072
01
01
0010
1400
13
0.0072
01
10
0010
2400
8
0.0072
01
11
0010
4400
5
0.0072
01
00
0011
1300
28
0.0036
01
01
0011
1800
20
0.0036
01
10
0011
2800
13
0.0036
01
11
0011
4800
8
0.0036
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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PACKAGE DIMENSIONS in millimeters
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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3.6
0.3
TAPING SIDE VIEW (-TR VERSION) in millimeters
16
1.75
7.5
Ø 1.5
4
Direction of feed
8
2
Ø 1.5
Drawing-No.: 9.700-5342.01-4
Issue: 2; 12.06.13
Rev. 1.6, 28-Apr-2022
technical drawings
according to DIN
specifications
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TAPING TOP VIEW (-TT VERSION) in millimeters
0.3
2.7
4°
7.1
16
7.5
3.3
4°
1.75
Ø 1.5
Direction of feed
4
8
2
Ø 1.5 min.
technical drawings
according to DIN
specifications
Drawing-No.: 9.700-5341.01-4
Issue: 2: 23.03.09
21666
Rev. 1.6, 28-Apr-2022
Document Number: 84286
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REEL DIMENSIONS in millimeters
16734
LEADER AND TRAILER DIMENSIONS in millimeters
Trailer
no devices
Leader
devices
no devices
End
Start
min. 200
min. 400
96 11818
Rev. 1.6, 28-Apr-2022
Document Number: 84286
13
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML7700
www.vishay.com
Vishay Semiconductors
REFLOW SOLDER PROFILE
DRYPACK
Devices are packed in moisture barrier bags (MBB) to
prevent the products from moisture absorption during
transportation and storage. Each bag contains a desiccant.
Axis Title
10000
300
Max. 260 °C
255 °C
240 °C
217 °C
245 °C
FLOOR LIFE
1000
200
Max. 30 s
1st line
2nd line
2nd line
Temperature (°C)
250
150
Max. 120 s
100
Max. 100 s
Max. ramp down 6 °C/s
100
Floor life (time between soldering and removing from MBB)
must not exceed the time indicated on MBB label:
Floor life: 72 h
Conditions: Tamb < 30 °C, RH < 60 %
Moisture sensitivity level 4, according to J-STD-020.
Max. ramp up 3 °C/s
50
DRYING
10
0
0
50
100
150
200
250
300
Time (s)
19841
Fig. 11 - Lead (Pb)-free Reflow Solder Profile
According to J-STD-020
Rev. 1.6, 28-Apr-2022
In case of moisture absorption devices should be baked
before soldering. Conditions see J-STD-020 or label.
Devices taped on reel dry using recommended conditions
192 h at 40 °C (+ 5 °C), RH < 5 %.
Document Number: 84286
14
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Vishay
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Revision: 01-Jan-2022
1
Document Number: 91000
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