VS-3C08ET07S2L-M3
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650 V Gen 3 Power SiC Merged PIN Schottky Diode, 8 A
FEATURES
Base
cathode
4
4
• Majority carrier diode using Schottky technology
on SiC wide band gap material
• Improved VF and efficiency by thin wafer
technology
• Positive VF temperature coefficient for easy
paralleling
• Virtually no recovery tail and no switching losses
• Temperature invariant switching behavior
• 175 °C maximum operating junction temperature
• Meets MSL level 1, per J-STD-020, LF maximum peak
of 245 °C
• MPS structure for high ruggedness to forward current
surge events
• Meets JESD 201 class 1A whisker test
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
3
Anode
1
N/C
D2PAK 2L (TO-263AB 2L)
LINKS TO ADDITIONAL RESOURCES
3D 3D
3D Models
Application
Notes
PRIMARY CHARACTERISTICS
DESCRIPTION / APPLICATIONS
IF(AV)
8A
VR
650 V
VF at IF at 150 °C
1.5 V
TJ max.
175 °C
IR at VR at 175 °C
1.9 μA
QC (VR = 400 V)
22 nC
Package
D2PAK 2L (TO-263AB 2L)
Circuit configuration
Single
Wide band gap SiC based 650 V Schottky diode, designed
for high performance and ruggedness.
Optimum choice for high speed hard switching and efficient
operation over a wide temperature range, it is also
recommended for all applications suffering from Silicon
ultrafast recovery behavior.
Typical applications include AC/DC PFC and DC/DC ultra
high frequency output rectification in FBPS and LLC
converters.
MECHANICAL DATA
Case: D2PAK 2L (TO-263AB 2L)
Molding compound meets UL 94 V-0 flammability rating
Base P/N-M3 - halogen-free, RoHS-compliant
Terminals: matte tin plated leads, solderable per
J-STD-002 and JESD 22-B102
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C unless otherwise specified)
PARAMETER
SYMBOL
Peak repetitive reverse voltage
VRRM
Average rectified forward current
IF(AV)
DC blocking voltage
VDC
Repetitive peak forward current
IFRM
Non-repetitive peak forward surge current
IFSM
Power dissipation
Ptot (1)
I2t value
i
Operating junction and storage temperatures
2
dt
TEST CONDITIONS
TC = 135 °C (DC)
VALUES
UNITS
650
V
8
A
650
V
TC = 25 °C, f = 50 Hz, square wave, DC = 25 %
35
TC = 25 °C, tp = 10 ms, half sine wave
54
TC = 110 °C, tp = 10 ms, half sine wave
52
TC = 25 °C
58
TC = 110 °C
25
TC = 25 °C
13.5
TC = 110 °C
12.5
TJ (2), TStg
-55 to +175
A
W
A2s
°C
Notes
(1) Based on maximum R
th
(2) The heat generated must be less than the thermal conductivity from junction-to-ambient: dP /dT < 1/R
D
J
θJA
Revision: 07-Dec-2022
Document Number: 96955
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VS-3C08ET07S2L-M3
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ELECTRICAL SPECIFICATIONS (TJ = 25 °C unless otherwise specified)
PARAMETER
SYMBOL
Forward voltage
VF
Reverse leakage current
IR
Total capacitance
C
Total capacitive charge
QC
MIN.
TYP.
MAX.
IF = 8 A
TEST CONDITIONS
-
1.3
1.5
IF = 8 A, TJ = 150 °C
-
1.5
1.8
IF = 8 A, TJ = 175 °C
-
1.58
-
UNITS
V
VR = VR rated
-
0.25
45
VR = VR rated, TJ = 150 °C
-
1.1
100
VR = VR rated, TJ = 175 °C
-
1.9
-
VR = 1 V, f = 1 MHz
-
340
-
VR = 400 V, f = 1 MHz
-
34
-
VR = 400 V, f = 1 MHz
-
22
-
nC
MIN.
TYP.
MAX.
UNITS
-
2.0
2.6
°C/W
μA
pF
THERMAL - MECHANICAL SPECIFICATIONS (TA = 25 °C unless otherwise specified)
PARAMETER
SYMBOL
Thermal resistance, junction to case
TEST CONDITIONS
RthJC
Marking device
3C08ET07S
Axis Title
Axis Title
30
20
100
TJ = 125 °C
TJ = 150 °C
TJ = 175 °C
10
0
10
1000
1st line
2nd line
1000
TJ = -55 °C
2nd line
CT - Junction Capacitance (pF)
TJ = 25 °C
1st line
2nd line
2nd line
IF - Instantaneous Forward Current (A)
50
40
10000
1000
10000
60
100
100
TJ = 25 °C
f = 1.0 MHz
10
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0.1
1
10
100
10
1000
VF - Forward Voltage Drop (V)
VR - Reverse Voltage (V)
Fig. 1 - Typical Forward Voltage Drop Characteristics
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
Axis Title
Axis Title
10000
10000
10
TJ = 175 °C
TJ = 25 °C
TJ = 150 °C
1000
0.1
0.01
2nd line
IFSM (A)
1000
1st line
2nd line
1
1st line
2nd line
2nd line
IR - Reverse Current (µA)
1000
TJ = 110 °C
100
100
0.001
100
TJ = 125 °C
TJ = 25 °C
TJ = -55 °C
10
0.0001
0
100
200
300
400
500
600
700
10
0.01
10
0.1
1
10
VR - Reverse Voltage (V)
tp (ms)
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
Fig. 4 - Non-Repetitive Peak Forward Surge Current vs.
Pulse Duration (Square Wave)
Revision: 07-Dec-2022
Document Number: 96955
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Vishay Semiconductors
Axis Title
10000
1000
1st line
2nd line
ZthJC - Thermal Impedance
Junction to Case (°C/W)
10
1
D = 0.5
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
DC
0.1
0.00001
0.0001
0.001
100
10
0.01
0.1
1
10
t1 - Rectangular Pulse Duration (s)
Fig. 5 - Typical Thermal Impedance ZthJC Characteristics
Axis Title
Axis Title
10000
8
10000
1000
140
100
120
6
1000
5
1st line
2nd line
160
2nd line
Capacitive Energy (µJ)
7
1st line
2nd line
2nd line
Allowable Case Temperature (°C)
180
4
3
100
TJ = 25 °C
2
1
10
100
0
2
4
6
8
10
0
10
0
100
200
400
500
600
700
IF - Continuous Forward Current (A)
Reverse Voltage (V)
Fig. 6 - Maximum Allowable Case Temperature vs.
Average Forward Current
Fig. 8 - Typical Capacitive Energy vs. Reverse Voltage
Axis Title
Axis Title
80
10000
35
10000
70
40
RthJC max.
30
100
20
25
1000
1st line
2nd line
1000
RthJC typ.
50
2nd line
Capacitive Charge (nC)
30
60
1st line
2nd line
2nd line
Allowable Input Power (W)
300
20
15
100
TJ = 25 °C
10
5
10
0
10
25
50
75
100
125
150
175
10
0
0
100
200
300
400
500
600
700
Case Temperature (°C)
Reverse Voltage (V)
Fig. 7 - Forward Power Loss Characteristics
Fig. 9 - Typical Capacitive Charge vs. Reverse Voltage
Revision: 07-Dec-2022
Document Number: 96955
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-3C08ET07S2L-M3
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Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS-
3C
08
E
T
07
S
2
L
-M3
1
2
3
4
5
6
7
8
9
10
1
-
Vishay Semiconductors product
2
-
3C = SiC diode, generation 3
3
-
Current rating (08 = 8 A)
4
-
E = single diode
5
-
T = D2PAK package
6
-
Voltage rating: (07 = 650 V)
7
-
S = surface mountable
8
-
2 = true 2 pin D2PAK
9
-
L = tape and reel (left oriented)
10
-
Environmental digit:
-M3 = halogen-free, RoHS-compliant, and termination lead (Pb)-free
ORDERING INFORMATION
PREFERRED P/N
VS-3C08ET07S2L-M3
BASE QUANTITY
PACKAGING DESCRIPTION
800 per reel
13" diameter reel
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?96683
Part marking information
www.vishay.com/doc?96693
Packaging information
www.vishay.com/doc?95032
Revision: 07-Dec-2022
Document Number: 96955
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
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Vishay Semiconductors
D2PAK 2L (TO-263AB 2L)
DIMENSIONS in millimeters and inches
Conforms to JEDEC® outline D2 PAK (SMD-220)
(2)(3)
E
B
Pad layout
A
A
(E)
c2
11.00
MIN.
(0.43)
A
(3) L1
4
9.65
MIN.
(0.38)
(D1) (3)
Detail A
D
H
1
B
17.90 (0.70)
15.00 (0.625)
(2)
3
3.81
MIN.
(0.15)
B
2.32
MIN.
(0.08)
A
2 x b2
c
2.64 (0.103)
2.41 (0.096)
(3)
E1
C
View A - A
2xb
± 0.004 M B
0.010 M A M B
Plating
Base
Metal
(4)
b1, b3
H
2x e
Gauge
plane
c1 (4)
(c)
B
0° to 8°
Seating
plane
L3
Lead tip
A1
L
(b, b2)
L4
Section B - B and C - C
Scale: None
Detail “A”
Rotated 90 °CW
Scale: 8:1
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
A
4.06
4.83
0.160
0.190
D1
6.86
8.00
0.270
0.315
3
A1
0.00
0.254
0.000
0.010
E
9.65
10.67
0.380
0.420
2, 3
E1
7.90
8.80
0.311
0.346
3
b
0.51
0.99
0.020
0.039
b1
0.51
0.89
0.020
0.035
b2
1.14
1.78
0.045
0.070
b3
1.14
1.73
0.045
0.068
c
0.38
0.74
0.015
0.029
c1
0.38
0.58
0.015
0.023
c2
1.14
1.65
0.045
0.065
D
8.51
9.65
0.335
0.380
4
4
4
e
2.54 BSC
0.100 BSC
H
14.61
15.88
0.575
0.625
L
1.78
2.79
0.070
0.110
L1
-
1.65
-
0.066
L3
L4
0.25 BSC
4.78
5.28
3
0.010 BSC
0.188
0.208
2
Notes
(1) Dimensioning and tolerancing per ASME Y14.5 M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Datum A and B to be determined at datum plane H
(6) Controlling dimension: inch
(7) Outline conforms to JEDEC® outline TO-263AB
Revision: 14-Mar-2022
Document Number: 96683
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Disclaimer
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
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Document Number: 91000
