VS-40L15CTS-M3, VS-40L15CT-1-M3
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Vishay Semiconductors
High Performance Schottky Rectifier, 2 x 20 A
FEATURES
•
•
•
•
•
•
125 °C TJ operation (VR < 5 V)
Center tap module
Optimized for OR-ing applications
Ultralow forward voltage drop
High frequency operation
High purity, high temperature epoxy encapsulation for
enhanced mechanical strength and moisture resistance
• Guard ring for enhanced ruggedness and long term
reliability
• Meets MSL level 1, per J-STD-020, LF maximum peak
of 245 °C
2
1
1
3
D2PAK (TO-263AB)
2
Base
common
cathode
2
TO-262AA
3
Base
common
cathode
2
• Designed and qualified according to JEDEC®-JESD 47
2
1 Common
3
Anode cathode Anode
2
1 Common
3
Anode cathode Anode
VS-40L15CTS-M3
VS-40L15CT-1-M3
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
The center tap Schottky rectifier module has been optimized
for ultralow forward voltage drop specifically for the OR-ing
of parallel power supplies. The proprietary barrier
technology allows for reliable operation up to 125 °C
junction temperature. Typical applications are in parallel
switching power supplies, converters, reverse battery
protection, and redundant power subsystems.
PRIMARY CHARACTERISTICS
IF(AV)
2 x 20 A
VR
15 V
VF at IF
0.33 V
IRM max.
600 mA at 100 °C
TJ max.
125 °C
EAS
10 mJ
Package
D2PAK (TO-263AB), TO-262AA
Circuit configuration
Common cathode
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
IF(AV)
CHARACTERISTICS
Rectangular waveform
VRRM
VALUES
UNITS
40
A
15
V
A
IFSM
tp = 5 μs sine
700
VF
19 Apk, TJ = 125 °C (per leg, typical)
0.25
V
-55 to +125
°C
VS-40L15CTS-M3
VS-40L15CT-1-M3
UNITS
15
V
TJ
VOLTAGE RATINGS
PARAMETER
Maximum DC reverse voltage
Maximum working peak reverse voltage
SYMBOL
VR
VRWM
TEST CONDITIONS
TJ = 100 °C
Revision: 21-Dec-2021
Document Number: 95733
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ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average forward
current, see fig. 5
SYMBOL
per leg
per device
IF(AV)
TEST CONDITIONS
VALUES
50 % duty cycle at TC = 85 °C, rectangular waveform
5 μs sine or 3 μs rect. pulse
UNITS
20
40
Following any rated load
condition and with rated
VRRM applied
A
700
Maximum peak one cycle non-repetitive
surge current per leg, see fig. 7
IFSM
Non-repetitive avalanche energy per leg
EAS
TJ = 25 °C, IAS = 2 A, L = 6 mH
10
mJ
IAR
Current decaying linearly to zero in 1 μs
Frequency limited by TJ maximum VA = 1.5 x VR typical
2
A
Repetitive avalanche current per leg
10 ms sine or 6 ms rect. pulse
330
ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
19 A
Maximum forward voltage drop per leg
See fig. 1
VFM (1)
TJ = 25 °C
40 A
19 A
TJ = 125 °C
40 A
Reverse leakage current per leg
See fig. 2
IRM (1)
Threshold voltage
VF(TO)
Forward slope resistance
rt
TJ = 25 °C
VR = Rated VR
TJ = 100 °C
TYP.
MAX.
-
0.41
-
0.52
0.25
0.33
0.37
0.50
-
10
-
600
TJ = TJ maximum
UNITS
V
mA
0.182
V
7.6
mΩ
Maximum junction capacitance per leg
CT
VR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C
-
2000
pF
Typical series inductance per leg
LS
Measured lead to lead 5 mm from package body
8
-
nH
Maximum voltage rate of change
dV/dt
Rated VR
10 000
V/μs
Note
(1) Pulse width < 300 μs, duty cycle < 2 %
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
Maximum junction temperature range
TJ
-55 to +125
Maximum storage temperature range
TStg
-55 to +150
Maximum thermal resistance,
junction to case per leg
RthJC
DC operation
See fig. 4
1.5
Typical thermal resistance,
case to heatsink
RthCS
Mounting surface, smooth and greased
0.50
Maximum thermal resistance,
junction to ambient
RthJA
DC operation
Approximate weight
Mounting torque
Marking device
minimum
maximum
Non-lubricated threads
UNITS
°C
°C/W
40
2
g
0.07
oz.
6 (5)
kgf ⋅ cm
(lbf ⋅ in)
12 (10)
Case style D2PAK (TO-263AB)
40L15CTS
Case style TO-262AA
40L15CT-1
Revision: 21-Dec-2021
Document Number: 95733
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VS-40L15CTS-M3, VS-40L15CT-1-M3
Vishay Semiconductors
1000
1000
100
TJ = 125 °C
TJ = 75 °C
TJ = 25 °C
10
TJ = 100 °C
IR - Reverse Current (mA)
IF - Instantaneous Forward Current (A)
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100
TJ = 75 °C
TJ = 50 °C
10
TJ = 25 °C
1
0.1
1
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
1.6
3
6
9
12
15
VFM - Forward Voltage Drop (V)
VR - Reverse Voltage (V)
Fig. 1 - Maximum Forward Voltage Drop Characteristics
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
CT - Junction Capacitance (pF)
10 000
TJ = 25 °C
1000
100
0
5
10
15
20
VR - Reverse Voltage (V)
ZthJC - Thermal Impedance (°C/W)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
10
1
PDM
t1
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
0.1
Single pulse
(thermal resistance)
0.01
0.00001
0.0001
0.001
0.01
t2
Notes:
1. Duty factor D = t1/t2
2. Peak TJ = PDM x ZthJC + TC
0.1
1
10
100
t1 - Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics
Revision: 21-Dec-2021
Document Number: 95733
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VS-40L15CTS-M3, VS-40L15CT-1-M3
Vishay Semiconductors
100
14
95
12
Average Power Loss (W)
Allowable Case Temperature (°C)
www.vishay.com
90
85
Square wave (D = 0.50)
80
75
D = 0.20
D = 0.25
D = 0.33
D = 0.50
D = 0.75
10
8
RMS Limit
6
DC
4
2
See note (1)
70
0
0
4
8
12
20
16
24
0
5
10
15
20
25
30
IF(AV) - Average Forward Current (A)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current
Fig. 6 - Forward Power Loss Characteristics
IFSM - Non-Repetitive Surge Current (A)
IF(AV) - Average Forward Current (A)
1000
At any rated load condition
and with rated VRRM applied
following surge
100
10
100
1000
10 000
tp - Square Wave Pulse Duration (µs)
Fig. 7 - Maximum Non-Repetitive Surge Current
L
D.U.T.
IRFP460
Rg = 25 Ω
Current
monitor
High-speed
switch
Freewheel
diode
+ Vd = 25 V
40HFL40S02
Fig. 8 - Unclamped Inductive Test Circuit
Note
(1) Formula used: T = T - (Pd + Pd
C
J
REV) x RthJC;
Pd = forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6);
PdREV = inverse power loss = VR1 x IR (1 - D); IR at VR1 = 80 % rated VR
Revision: 21-Dec-2021
Document Number: 95733
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-40L15CTS-M3, VS-40L15CT-1-M3
www.vishay.com
Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS-
40
L
15
C
T
S
1
2
3
4
5
6
7
1
-
Vishay Semiconductors product
2
-
Current rating (40 A)
3
-
L = Schottky “L” series
4
-
Voltage rating (15 V)
5
-
C = common cathode
6
-
T = TO-220
7
-
TRL -M3
8
9
S = D2PAK (TO-263AB)
-1 = TO-262AA
8
-
None = tube
TRL = tape and reel (left oriented - for D2PAK (TO-263AB) only)
TRR = tape and reel (right oriented - for D2PAK (TO-263AB) only)
9
-
-M3 = halogen-free, RoHS-compliant, and termination lead (Pb)-free
ORDERING INFORMATION (Example)
PREFERRED P/N
BASE QUANTITY
PACKAGING DESCRIPTION
VS-40L15CTS-M3
50
Antistatic plastic tubes
VS-40L15CTSTRL-M3
800
13" diameter plastic tape and reel
VS-40L15CTSTRR-M3
800
13" diameter plastic tape and reel
VS-40L15CT-1-M3
50
Antistatic plastic tubes
LINKS TO RELATED DOCUMENTS
Dimensions
Part marking information
Packaging information
D2PAK (TO-263AB)
www.vishay.com/doc?96164
TO-262AA
www.vishay.com/doc?96165
D2PAK (TO-263AB)
www.vishay.com/doc?95444
TO-262AA
www.vishay.com/doc?95443
www.vishay.com/doc?96424
Revision: 21-Dec-2021
Document Number: 95733
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
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Vishay Semiconductors
D2PAK
DIMENSIONS in millimeters and inches
Conforms to JEDEC® outline D2 PAK (SMD-220)
(2)(3)
E
B
Pad layout
A
A
(E)
c2
11.00
MIN.
(0.43)
A
(3) L1
4
9.65
MIN.
(0.38)
(D1) (3)
Detail A
D
H
1
2
17.90 (0.70)
15.00 (0.625)
(2)
3
3.81
MIN.
(0.15)
L2
B
B
2.32
MIN.
(0.08)
A
2 x b2
c
2.64 (0.103)
2.41 (0.096)
(3)
E1
C
View A - A
2xb
± 0.004 M B
0.010 M A M B
Plating
Base
Metal
(4)
b1, b3
H
2x e
Gauge
plane
c1 (4)
(c)
B
0° to 8°
Seating
plane
L3
Lead tip
A1
L
(b, b2)
L4
Section B - B and C - C
Scale: None
Detail “A”
Rotated 90 °CW
Scale: 8:1
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
SYMBOL
MILLIMETERS
MIN.
MAX.
INCHES
MIN.
MAX.
NOTES
A
4.06
4.83
0.160
0.190
D1
6.86
8.00
0.270
0.315
3
A1
0.00
0.254
0.000
0.010
E
9.65
10.67
0.380
0.420
2, 3
E1
7.90
8.80
0.311
0.346
3
b
0.51
0.99
0.020
0.039
b1
0.51
0.89
0.020
0.035
b2
1.14
1.78
0.045
0.070
b3
1.14
1.73
0.045
0.068
c
0.38
0.74
0.015
0.029
c1
0.38
0.58
0.015
0.023
c2
1.14
1.65
0.045
0.065
D
8.51
9.65
0.335
0.380
4
e
2.54 BSC
0.100 BSC
H
14.61
15.88
0.575
0.625
4
L
1.78
2.79
0.070
0.110
L1
-
1.65
-
0.066
4
L2
1.27
1.78
0.050
0.070
2
L4
L3
0.25 BSC
4.78
5.28
3
0.010 BSC
0.188
0.208
Notes
(1) Dimensioning and tolerancing per ASME Y14.5 M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Datum A and B to be determined at datum plane H
(6) Controlling dimension: inch
(7) Outline conforms to JEDEC® outline TO-263AB
Revision: 08-Jul-15
Document Number: 95046
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Outline Dimensions
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Vishay Semiconductors
TO-262
DIMENSIONS in millimeters and inches
Modified JEDEC® outline TO-262
(Datum A) (2) (3)
E
A
A
c2
B
E
A
(3) L1
Seating
plane
D
1
2 3
C
L2
B
D1 (3)
B
C
L (2)
A
c
3 x b2
3xb
E1
A1
(3)
Section A - A
2xe
Plating
0.010 M A M B
(4)
b1, b3
Base
metal
Lead assignments
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
Lead tip
SYMBOL
c1
c
(4)
(b, b2)
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
0.190
NOTES
A
4.06
4.83
0.160
A1
2.03
3.02
0.080
0.119
b
0.51
0.99
0.020
0.039
b1
0.51
0.89
0.020
0.035
b2
1.14
1.78
0.045
0.070
b3
1.14
1.73
0.045
0.068
c
0.38
0.74
0.015
0.029
c1
0.38
0.58
0.015
0.023
c2
1.14
1.65
0.045
0.065
D
8.51
9.65
0.335
0.380
D1
6.86
8.00
0.270
0.315
3
E
9.65
10.67
0.380
0.420
2, 3
E1
7.90
8.80
0.311
0.346
3
e
L
2.54 BSC
4
4
4
2
0.100 BSC
13.46
14.10
0.530
0.555
L1
-
L2
3.36
1.65
-
0.065
3.71
0.132
0.146
Notes
(1) Dimensioning and tolerancing as per ASME Y14.5M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall
not exceed 0.127 mm (0.005") per side. These dimensions are
measured at the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4)
(5)
(6)
3
Dimension b1 and c1 apply to base metal only
Controlling dimension: inches
Outline conform to JEDEC TO-262 except A1 (maximum),
b (minimum) , D1 (minimum) and L2 where dimensions derived
the actual package outline
Revision: 11-Jul-2019
Document Number: 95419
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